arch/powerpc/platforms/pseries/setup.c

   1 /*
   2  *  64-bit pSeries and RS/6000 setup code.
   3  *
   4  *  Copyright (C) 1995  Linus Torvalds
   5  *  Adapted from 'alpha' version by Gary Thomas
   6  *  Modified by Cort Dougan (cort@cs.nmt.edu)
   7  *  Modified by PPC64 Team, IBM Corp
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License
  11  * as published by the Free Software Foundation; either version
  12  * 2 of the License, or (at your option) any later version.
  13  */
  14
  15 /*
  16  * bootup setup stuff..
  17  */
  18
  19 #include <linux/cpu.h>
  20 #include <linux/errno.h>
  21 #include <linux/sched.h>
  22 #include <linux/kernel.h>
  23 #include <linux/mm.h>
  24 #include <linux/stddef.h>
  25 #include <linux/unistd.h>
  26 #include <linux/user.h>
  27 #include <linux/tty.h>
  28 #include <linux/major.h>
  29 #include <linux/interrupt.h>
  30 #include <linux/reboot.h>
  31 #include <linux/init.h>
  32 #include <linux/ioport.h>
  33 #include <linux/console.h>
  34 #include <linux/pci.h>
  35 #include <linux/utsname.h>
  36 #include <linux/adb.h>
  37 #include <linux/export.h>
  38 #include <linux/delay.h>
  39 #include <linux/irq.h>
  40 #include <linux/seq_file.h>
  41 #include <linux/root_dev.h>
  42 #include <linux/of.h>
  43 #include <linux/of_pci.h>
  44 #include <linux/memblock.h>
  45
  46 #include <asm/mmu.h>
  47 #include <asm/processor.h>
  48 #include <asm/io.h>
  49 #include <asm/pgtable.h>
  50 #include <asm/prom.h>
  51 #include <asm/rtas.h>
  52 #include <asm/pci-bridge.h>
  53 #include <asm/iommu.h>
  54 #include <asm/dma.h>
  55 #include <asm/machdep.h>
  56 #include <asm/irq.h>
  57 #include <asm/time.h>
  58 #include <asm/nvram.h>
  59 #include <asm/pmc.h>
  60 #include <asm/xics.h>
  61 #include <asm/xive.h>
  62 #include <asm/ppc-pci.h>
  63 #include <asm/i8259.h>
  64 #include <asm/udbg.h>
  65 #include <asm/smp.h>
  66 #include <asm/firmware.h>
  67 #include <asm/eeh.h>
  68 #include <asm/reg.h>
  69 #include <asm/plpar_wrappers.h>
  70 #include <asm/kexec.h>
  71 #include <asm/isa-bridge.h>
  72 #include <asm/security_features.h>
  73 #include <asm/asm-const.h>
  74
  75 #include "pseries.h"
  76 #include "../../../../drivers/pci/pci.h"
  77
  78 int CMO_PrPSP = -1;
  79 int CMO_SecPSP = -1;
  80 unsigned long CMO_PageSize = (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K);
  81 EXPORT_SYMBOL(CMO_PageSize);
  82
  83 int fwnmi_active;  /* TRUE if an FWNMI handler is present */
  84
  85 static void pSeries_show_cpuinfo(struct seq_file *m)
  86 {
  87         struct device_node *root;
  88         const char *model = "";
  89
  90         root = of_find_node_by_path("/");
  91         if (root)
  92                 model = of_get_property(root, "model", NULL);
  93         seq_printf(m, "machine\t\t: CHRP %s\n", model);
  94         of_node_put(root);
  95         if (radix_enabled())
  96                 seq_printf(m, "MMU\t\t: Radix\n");
  97         else
  98                 seq_printf(m, "MMU\t\t: Hash\n");
  99 }
 100
 101 /* Initialize firmware assisted non-maskable interrupts if
 102  * the firmware supports this feature.
 103  */
 104 static void __init fwnmi_init(void)
 105 {
 106         unsigned long system_reset_addr, machine_check_addr;
 107         u8 *mce_data_buf;
 108         unsigned int i;
 109         int nr_cpus = num_possible_cpus();
 110 #ifdef CONFIG_PPC_BOOK3S_64
 111         struct slb_entry *slb_ptr;
 112         size_t size;
 113 #endif
 114
 115         int ibm_nmi_register = rtas_token("ibm,nmi-register");
 116         if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE)
 117                 return;
 118
 119         /* If the kernel's not linked at zero we point the firmware at low
 120          * addresses anyway, and use a trampoline to get to the real code. */
 121         system_reset_addr  = __pa(system_reset_fwnmi) - PHYSICAL_START;
 122         machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START;
 123
 124         if (0 == rtas_call(ibm_nmi_register, 2, 1, NULL, system_reset_addr,
 125                                 machine_check_addr))
 126                 fwnmi_active = 1;
 127
 128         /*
 129          * Allocate a chunk for per cpu buffer to hold rtas errorlog.
 130          * It will be used in real mode mce handler, hence it needs to be
 131          * below RMA.
 132          */
 133         mce_data_buf = memblock_alloc_try_nid_raw(RTAS_ERROR_LOG_MAX * nr_cpus,
 134                                         RTAS_ERROR_LOG_MAX, MEMBLOCK_LOW_LIMIT,
 135                                         ppc64_rma_size, NUMA_NO_NODE);
 136         if (!mce_data_buf)
 137                 panic("Failed to allocate %d bytes below %pa for MCE buffer\n",
 138                       RTAS_ERROR_LOG_MAX * nr_cpus, &ppc64_rma_size);
 139
 140         for_each_possible_cpu(i) {
 141                 paca_ptrs[i]->mce_data_buf = mce_data_buf +
 142                                                 (RTAS_ERROR_LOG_MAX * i);
 143         }
 144
 145 #ifdef CONFIG_PPC_BOOK3S_64
 146         /* Allocate per cpu slb area to save old slb contents during MCE */
 147         size = sizeof(struct slb_entry) * mmu_slb_size * nr_cpus;
 148         slb_ptr = memblock_alloc_try_nid_raw(size, sizeof(struct slb_entry),
 149                                         MEMBLOCK_LOW_LIMIT, ppc64_rma_size,
 150                                         NUMA_NO_NODE);
 151         if (!slb_ptr)
 152                 panic("Failed to allocate %zu bytes below %pa for slb area\n",
 153                       size, &ppc64_rma_size);
 154
 155         for_each_possible_cpu(i)
 156                 paca_ptrs[i]->mce_faulty_slbs = slb_ptr + (mmu_slb_size * i);
 157 #endif
 158 }
 159
 160 static void pseries_8259_cascade(struct irq_desc *desc)
 161 {
 162         struct irq_chip *chip = irq_desc_get_chip(desc);
 163         unsigned int cascade_irq = i8259_irq();
 164
 165         if (cascade_irq)
 166                 generic_handle_irq(cascade_irq);
 167
 168         chip->irq_eoi(&desc->irq_data);
 169 }
 170
 171 static void __init pseries_setup_i8259_cascade(void)
 172 {
 173         struct device_node *np, *old, *found = NULL;
 174         unsigned int cascade;
 175         const u32 *addrp;
 176         unsigned long intack = 0;
 177         int naddr;
 178
 179         for_each_node_by_type(np, "interrupt-controller") {
 180                 if (of_device_is_compatible(np, "chrp,iic")) {
 181                         found = np;
 182                         break;
 183                 }
 184         }
 185
 186         if (found == NULL) {
 187                 printk(KERN_DEBUG "pic: no ISA interrupt controller\n");
 188                 return;
 189         }
 190
 191         cascade = irq_of_parse_and_map(found, 0);
 192         if (!cascade) {
 193                 printk(KERN_ERR "pic: failed to map cascade interrupt");
 194                 return;
 195         }
 196         pr_debug("pic: cascade mapped to irq %d\n", cascade);
 197
 198         for (old = of_node_get(found); old != NULL ; old = np) {
 199                 np = of_get_parent(old);
 200                 of_node_put(old);
 201                 if (np == NULL)
 202                         break;
 203                 if (!of_node_name_eq(np, "pci"))
 204                         continue;
 205                 addrp = of_get_property(np, "8259-interrupt-acknowledge", NULL);
 206                 if (addrp == NULL)
 207                         continue;
 208                 naddr = of_n_addr_cells(np);
 209                 intack = addrp[naddr-1];
 210                 if (naddr > 1)
 211                         intack |= ((unsigned long)addrp[naddr-2]) << 32;
 212         }
 213         if (intack)
 214                 printk(KERN_DEBUG "pic: PCI 8259 intack at 0x%016lx\n", intack);
 215         i8259_init(found, intack);
 216         of_node_put(found);
 217         irq_set_chained_handler(cascade, pseries_8259_cascade);
 218 }
 219
 220 static void __init pseries_init_irq(void)
 221 {
 222         /* Try using a XIVE if available, otherwise use a XICS */
 223         if (!xive_spapr_init()) {
 224                 xics_init();
 225                 pseries_setup_i8259_cascade();
 226         }
 227 }
 228
 229 static void pseries_lpar_enable_pmcs(void)
 230 {
 231         unsigned long set, reset;
 232
 233         set = 1UL << 63;
 234         reset = 0;
 235         plpar_hcall_norets(H_PERFMON, set, reset);
 236 }
 237
 238 static int pci_dn_reconfig_notifier(struct notifier_block *nb, unsigned long action, void *data)
 239 {
 240         struct of_reconfig_data *rd = data;
 241         struct device_node *parent, *np = rd->dn;
 242         struct pci_dn *pdn;
 243         int err = NOTIFY_OK;
 244
 245         switch (action) {
 246         case OF_RECONFIG_ATTACH_NODE:
 247                 parent = of_get_parent(np);
 248                 pdn = parent ? PCI_DN(parent) : NULL;
 249                 if (pdn)
 250                         pci_add_device_node_info(pdn->phb, np);
 251
 252                 of_node_put(parent);
 253                 break;
 254         case OF_RECONFIG_DETACH_NODE:
 255                 pdn = PCI_DN(np);
 256                 if (pdn)
 257                         list_del(&pdn->list);
 258                 break;
 259         default:
 260                 err = NOTIFY_DONE;
 261                 break;
 262         }
 263         return err;
 264 }
 265
 266 static struct notifier_block pci_dn_reconfig_nb = {
 267         .notifier_call = pci_dn_reconfig_notifier,
 268 };
 269
 270 struct kmem_cache *dtl_cache;
 271
 272 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
 273 /*
 274  * Allocate space for the dispatch trace log for all possible cpus
 275  * and register the buffers with the hypervisor.  This is used for
 276  * computing time stolen by the hypervisor.
 277  */
 278 static int alloc_dispatch_logs(void)
 279 {
 280         int cpu, ret;
 281         struct paca_struct *pp;
 282         struct dtl_entry *dtl;
 283
 284         if (!firmware_has_feature(FW_FEATURE_SPLPAR))
 285                 return 0;
 286
 287         if (!dtl_cache)
 288                 return 0;
 289
 290         for_each_possible_cpu(cpu) {
 291                 pp = paca_ptrs[cpu];
 292                 dtl = kmem_cache_alloc(dtl_cache, GFP_KERNEL);
 293                 if (!dtl) {
 294                         pr_warn("Failed to allocate dispatch trace log for cpu %d\n",
 295                                 cpu);
 296                         pr_warn("Stolen time statistics will be unreliable\n");
 297                         break;
 298                 }
 299
 300                 pp->dtl_ridx = 0;
 301                 pp->dispatch_log = dtl;
 302                 pp->dispatch_log_end = dtl + N_DISPATCH_LOG;
 303                 pp->dtl_curr = dtl;
 304         }
 305
 306         /* Register the DTL for the current (boot) cpu */
 307         dtl = get_paca()->dispatch_log;
 308         get_paca()->dtl_ridx = 0;
 309         get_paca()->dtl_curr = dtl;
 310         get_paca()->lppaca_ptr->dtl_idx = 0;
 311
 312         /* hypervisor reads buffer length from this field */
 313         dtl->enqueue_to_dispatch_time = cpu_to_be32(DISPATCH_LOG_BYTES);
 314         ret = register_dtl(hard_smp_processor_id(), __pa(dtl));
 315         if (ret)
 316                 pr_err("WARNING: DTL registration of cpu %d (hw %d) failed "
 317                        "with %d\n", smp_processor_id(),
 318                        hard_smp_processor_id(), ret);
 319         get_paca()->lppaca_ptr->dtl_enable_mask = 2;
 320
 321         return 0;
 322 }
 323 #else /* !CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */
 324 static inline int alloc_dispatch_logs(void)
 325 {
 326         return 0;
 327 }
 328 #endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */
 329
 330 static int alloc_dispatch_log_kmem_cache(void)
 331 {
 332         dtl_cache = kmem_cache_create("dtl", DISPATCH_LOG_BYTES,
 333                                                 DISPATCH_LOG_BYTES, 0, NULL);
 334         if (!dtl_cache) {
 335                 pr_warn("Failed to create dispatch trace log buffer cache\n");
 336                 pr_warn("Stolen time statistics will be unreliable\n");
 337                 return 0;
 338         }
 339
 340         return alloc_dispatch_logs();
 341 }
 342 machine_early_initcall(pseries, alloc_dispatch_log_kmem_cache);
 343
 344 static void pseries_lpar_idle(void)
 345 {
 346         /*
 347          * Default handler to go into low thread priority and possibly
 348          * low power mode by ceding processor to hypervisor
 349          */
 350
 351         /* Indicate to hypervisor that we are idle. */
 352         get_lppaca()->idle = 1;
 353
 354         /*
 355          * Yield the processor to the hypervisor.  We return if
 356          * an external interrupt occurs (which are driven prior
 357          * to returning here) or if a prod occurs from another
 358          * processor. When returning here, external interrupts
 359          * are enabled.
 360          */
 361         cede_processor();
 362
 363         get_lppaca()->idle = 0;
 364 }
 365
 366 /*
 367  * Enable relocation on during exceptions. This has partition wide scope and
 368  * may take a while to complete, if it takes longer than one second we will
 369  * just give up rather than wasting any more time on this - if that turns out
 370  * to ever be a problem in practice we can move this into a kernel thread to
 371  * finish off the process later in boot.
 372  */
 373 void pseries_enable_reloc_on_exc(void)
 374 {
 375         long rc;
 376         unsigned int delay, total_delay = 0;
 377
 378         while (1) {
 379                 rc = enable_reloc_on_exceptions();
 380                 if (!H_IS_LONG_BUSY(rc)) {
 381                         if (rc == H_P2) {
 382                                 pr_info("Relocation on exceptions not"
 383                                         " supported\n");
 384                         } else if (rc != H_SUCCESS) {
 385                                 pr_warn("Unable to enable relocation"
 386                                         " on exceptions: %ld\n", rc);
 387                         }
 388                         break;
 389                 }
 390
 391                 delay = get_longbusy_msecs(rc);
 392                 total_delay += delay;
 393                 if (total_delay > 1000) {
 394                         pr_warn("Warning: Giving up waiting to enable "
 395                                 "relocation on exceptions (%u msec)!\n",
 396                                 total_delay);
 397                         return;
 398                 }
 399
 400                 mdelay(delay);
 401         }
 402 }
 403 EXPORT_SYMBOL(pseries_enable_reloc_on_exc);
 404
 405 void pseries_disable_reloc_on_exc(void)
 406 {
 407         long rc;
 408
 409         while (1) {
 410                 rc = disable_reloc_on_exceptions();
 411                 if (!H_IS_LONG_BUSY(rc))
 412                         break;
 413                 mdelay(get_longbusy_msecs(rc));
 414         }
 415         if (rc != H_SUCCESS)
 416                 pr_warn("Warning: Failed to disable relocation on exceptions: %ld\n",
 417                         rc);
 418 }
 419 EXPORT_SYMBOL(pseries_disable_reloc_on_exc);
 420
 421 #ifdef CONFIG_KEXEC_CORE
 422 static void pSeries_machine_kexec(struct kimage *image)
 423 {
 424         if (firmware_has_feature(FW_FEATURE_SET_MODE))
 425                 pseries_disable_reloc_on_exc();
 426
 427         default_machine_kexec(image);
 428 }
 429 #endif
 430
 431 #ifdef __LITTLE_ENDIAN__
 432 void pseries_big_endian_exceptions(void)
 433 {
 434         long rc;
 435
 436         while (1) {
 437                 rc = enable_big_endian_exceptions();
 438                 if (!H_IS_LONG_BUSY(rc))
 439                         break;
 440                 mdelay(get_longbusy_msecs(rc));
 441         }
 442
 443         /*
 444          * At this point it is unlikely panic() will get anything
 445          * out to the user, since this is called very late in kexec
 446          * but at least this will stop us from continuing on further
 447          * and creating an even more difficult to debug situation.
 448          *
 449          * There is a known problem when kdump'ing, if cpus are offline
 450          * the above call will fail. Rather than panicking again, keep
 451          * going and hope the kdump kernel is also little endian, which
 452          * it usually is.
 453          */
 454         if (rc && !kdump_in_progress())
 455                 panic("Could not enable big endian exceptions");
 456 }
 457
 458 void pseries_little_endian_exceptions(void)
 459 {
 460         long rc;
 461
 462         while (1) {
 463                 rc = enable_little_endian_exceptions();
 464                 if (!H_IS_LONG_BUSY(rc))
 465                         break;
 466                 mdelay(get_longbusy_msecs(rc));
 467         }
 468         if (rc) {
 469                 ppc_md.progress("H_SET_MODE LE exception fail", 0);
 470                 panic("Could not enable little endian exceptions");
 471         }
 472 }
 473 #endif
 474
 475 static void __init find_and_init_phbs(void)
 476 {
 477         struct device_node *node;
 478         struct pci_controller *phb;
 479         struct device_node *root = of_find_node_by_path("/");
 480
 481         for_each_child_of_node(root, node) {
 482                 if (!of_node_is_type(node, "pci") &&
 483                     !of_node_is_type(node, "pciex"))
 484                         continue;
 485
 486                 phb = pcibios_alloc_controller(node);
 487                 if (!phb)
 488                         continue;
 489                 rtas_setup_phb(phb);
 490                 pci_process_bridge_OF_ranges(phb, node, 0);
 491                 isa_bridge_find_early(phb);
 492                 phb->controller_ops = pseries_pci_controller_ops;
 493         }
 494
 495         of_node_put(root);
 496
 497         /*
 498          * PCI_PROBE_ONLY and PCI_REASSIGN_ALL_BUS can be set via properties
 499          * in chosen.
 500          */
 501         of_pci_check_probe_only();
 502 }
 503
 504 static void init_cpu_char_feature_flags(struct h_cpu_char_result *result)
 505 {
 506         /*
 507          * The features below are disabled by default, so we instead look to see
 508          * if firmware has *enabled* them, and set them if so.
 509          */
 510         if (result->character & H_CPU_CHAR_SPEC_BAR_ORI31)
 511                 security_ftr_set(SEC_FTR_SPEC_BAR_ORI31);
 512
 513         if (result->character & H_CPU_CHAR_BCCTRL_SERIALISED)
 514                 security_ftr_set(SEC_FTR_BCCTRL_SERIALISED);
 515
 516         if (result->character & H_CPU_CHAR_L1D_FLUSH_ORI30)
 517                 security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30);
 518
 519         if (result->character & H_CPU_CHAR_L1D_FLUSH_TRIG2)
 520                 security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2);
 521
 522         if (result->character & H_CPU_CHAR_L1D_THREAD_PRIV)
 523                 security_ftr_set(SEC_FTR_L1D_THREAD_PRIV);
 524
 525         if (result->character & H_CPU_CHAR_COUNT_CACHE_DISABLED)
 526                 security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED);
 527
 528         if (result->character & H_CPU_CHAR_BCCTR_FLUSH_ASSIST)
 529                 security_ftr_set(SEC_FTR_BCCTR_FLUSH_ASSIST);
 530
 531         if (result->behaviour & H_CPU_BEHAV_FLUSH_COUNT_CACHE)
 532                 security_ftr_set(SEC_FTR_FLUSH_COUNT_CACHE);
 533
 534         /*
 535          * The features below are enabled by default, so we instead look to see
 536          * if firmware has *disabled* them, and clear them if so.
 537          */
 538         if (!(result->behaviour & H_CPU_BEHAV_FAVOUR_SECURITY))
 539                 security_ftr_clear(SEC_FTR_FAVOUR_SECURITY);
 540
 541         if (!(result->behaviour & H_CPU_BEHAV_L1D_FLUSH_PR))
 542                 security_ftr_clear(SEC_FTR_L1D_FLUSH_PR);
 543
 544         if (!(result->behaviour & H_CPU_BEHAV_BNDS_CHK_SPEC_BAR))
 545                 security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR);
 546 }
 547
 548 void pseries_setup_rfi_flush(void)
 549 {
 550         struct h_cpu_char_result result;
 551         enum l1d_flush_type types;
 552         bool enable;
 553         long rc;
 554
 555         /*
 556          * Set features to the defaults assumed by init_cpu_char_feature_flags()
 557          * so it can set/clear again any features that might have changed after
 558          * migration, and in case the hypercall fails and it is not even called.
 559          */
 560         powerpc_security_features = SEC_FTR_DEFAULT;
 561
 562         rc = plpar_get_cpu_characteristics(&result);
 563         if (rc == H_SUCCESS)
 564                 init_cpu_char_feature_flags(&result);
 565
 566         /*
 567          * We're the guest so this doesn't apply to us, clear it to simplify
 568          * handling of it elsewhere.
 569          */
 570         security_ftr_clear(SEC_FTR_L1D_FLUSH_HV);
 571
 572         types = L1D_FLUSH_FALLBACK;
 573
 574         if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_TRIG2))
 575                 types |= L1D_FLUSH_MTTRIG;
 576
 577         if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_ORI30))
 578                 types |= L1D_FLUSH_ORI;
 579
 580         enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && \
 581                  security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR);
 582
 583         setup_rfi_flush(types, enable);
 584         setup_count_cache_flush();
 585 }
 586
 587 #ifdef CONFIG_PCI_IOV
 588 enum rtas_iov_fw_value_map {
 589         NUM_RES_PROPERTY  = 0, /* Number of Resources */
 590         LOW_INT           = 1, /* Lowest 32 bits of Address */
 591         START_OF_ENTRIES  = 2, /* Always start of entry */
 592         APERTURE_PROPERTY = 2, /* Start of entry+ to  Aperture Size */
 593         WDW_SIZE_PROPERTY = 4, /* Start of entry+ to Window Size */
 594         NEXT_ENTRY        = 7  /* Go to next entry on array */
 595 };
 596
 597 enum get_iov_fw_value_index {
 598         BAR_ADDRS     = 1,    /*  Get Bar Address */
 599         APERTURE_SIZE = 2,    /*  Get Aperture Size */
 600         WDW_SIZE      = 3     /*  Get Window Size */
 601 };
 602
 603 resource_size_t pseries_get_iov_fw_value(struct pci_dev *dev, int resno,
 604                                          enum get_iov_fw_value_index value)
 605 {
 606         const int *indexes;
 607         struct device_node *dn = pci_device_to_OF_node(dev);
 608         int i, num_res, ret = 0;
 609
 610         indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL);
 611         if (!indexes)
 612                 return  0;
 613
 614         /*
 615          * First element in the array is the number of Bars
 616          * returned.  Search through the list to find the matching
 617          * bar
 618          */
 619         num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1);
 620         if (resno >= num_res)
 621                 return 0; /* or an errror */
 622
 623         i = START_OF_ENTRIES + NEXT_ENTRY * resno;
 624         switch (value) {
 625         case BAR_ADDRS:
 626                 ret = of_read_number(&indexes[i], 2);
 627                 break;
 628         case APERTURE_SIZE:
 629                 ret = of_read_number(&indexes[i + APERTURE_PROPERTY], 2);
 630                 break;
 631         case WDW_SIZE:
 632                 ret = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2);
 633                 break;
 634         }
 635
 636         return ret;
 637 }
 638
 639 void of_pci_set_vf_bar_size(struct pci_dev *dev, const int *indexes)
 640 {
 641         struct resource *res;
 642         resource_size_t base, size;
 643         int i, r, num_res;
 644
 645         num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1);
 646         num_res = min_t(int, num_res, PCI_SRIOV_NUM_BARS);
 647         for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS;
 648              i += NEXT_ENTRY, r++) {
 649                 res = &dev->resource[r + PCI_IOV_RESOURCES];
 650                 base = of_read_number(&indexes[i], 2);
 651                 size = of_read_number(&indexes[i + APERTURE_PROPERTY], 2);
 652                 res->flags = pci_parse_of_flags(of_read_number
 653                                                 (&indexes[i + LOW_INT], 1), 0);
 654                 res->flags |= (IORESOURCE_MEM_64 | IORESOURCE_PCI_FIXED);
 655                 res->name = pci_name(dev);
 656                 res->start = base;
 657                 res->end = base + size - 1;
 658         }
 659 }
 660
 661 void of_pci_parse_iov_addrs(struct pci_dev *dev, const int *indexes)
 662 {
 663         struct resource *res, *root, *conflict;
 664         resource_size_t base, size;
 665         int i, r, num_res;
 666
 667         /*
 668          * First element in the array is the number of Bars
 669          * returned.  Search through the list to find the matching
 670          * bars assign them from firmware into resources structure.
 671          */
 672         num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1);
 673         for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS;
 674              i += NEXT_ENTRY, r++) {
 675                 res = &dev->resource[r + PCI_IOV_RESOURCES];
 676                 base = of_read_number(&indexes[i], 2);
 677                 size = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2);
 678                 res->name = pci_name(dev);
 679                 res->start = base;
 680                 res->end = base + size - 1;
 681                 root = &iomem_resource;
 682                 dev_dbg(&dev->dev,
 683                         "pSeries IOV BAR %d: trying firmware assignment %pR\n",
 684                          r + PCI_IOV_RESOURCES, res);
 685                 conflict = request_resource_conflict(root, res);
 686                 if (conflict) {
 687                         dev_info(&dev->dev,
 688                                  "BAR %d: %pR conflicts with %s %pR\n",
 689                                  r + PCI_IOV_RESOURCES, res,
 690                                  conflict->name, conflict);
 691                         res->flags |= IORESOURCE_UNSET;
 692                 }
 693         }
 694 }
 695
 696 static void pseries_disable_sriov_resources(struct pci_dev *pdev)
 697 {
 698         int i;
 699
 700         pci_warn(pdev, "No hypervisor support for SR-IOV on this device, IOV BARs disabled.\n");
 701         for (i = 0; i < PCI_SRIOV_NUM_BARS; i++)
 702                 pdev->resource[i + PCI_IOV_RESOURCES].flags = 0;
 703 }
 704
 705 static void pseries_pci_fixup_resources(struct pci_dev *pdev)
 706 {
 707         const int *indexes;
 708         struct device_node *dn = pci_device_to_OF_node(pdev);
 709
 710         /*Firmware must support open sriov otherwise dont configure*/
 711         indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL);
 712         if (indexes)
 713                 of_pci_set_vf_bar_size(pdev, indexes);
 714         else
 715                 pseries_disable_sriov_resources(pdev);
 716 }
 717
 718 static void pseries_pci_fixup_iov_resources(struct pci_dev *pdev)
 719 {
 720         const int *indexes;
 721         struct device_node *dn = pci_device_to_OF_node(pdev);
 722
 723         if (!pdev->is_physfn || pci_dev_is_added(pdev))
 724                 return;
 725         /*Firmware must support open sriov otherwise dont configure*/
 726         indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL);
 727         if (indexes)
 728                 of_pci_parse_iov_addrs(pdev, indexes);
 729         else
 730                 pseries_disable_sriov_resources(pdev);
 731 }
 732
 733 static resource_size_t pseries_pci_iov_resource_alignment(struct pci_dev *pdev,
 734                                                           int resno)
 735 {
 736         const __be32 *reg;
 737         struct device_node *dn = pci_device_to_OF_node(pdev);
 738
 739         /*Firmware must support open sriov otherwise report regular alignment*/
 740         reg = of_get_property(dn, "ibm,is-open-sriov-pf", NULL);
 741         if (!reg)
 742                 return pci_iov_resource_size(pdev, resno);
 743
 744         if (!pdev->is_physfn)
 745                 return 0;
 746         return pseries_get_iov_fw_value(pdev,
 747                                         resno - PCI_IOV_RESOURCES,
 748                                         APERTURE_SIZE);
 749 }
 750 #endif
 751
 752 static void __init pSeries_setup_arch(void)
 753 {
 754         set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
 755
 756         /* Discover PIC type and setup ppc_md accordingly */
 757         smp_init_pseries();
 758
 759
 760         /* openpic global configuration register (64-bit format). */
 761         /* openpic Interrupt Source Unit pointer (64-bit format). */
 762         /* python0 facility area (mmio) (64-bit format) REAL address. */
 763
 764         /* init to some ~sane value until calibrate_delay() runs */
 765         loops_per_jiffy = 50000000;
 766
 767         fwnmi_init();
 768
 769         pseries_setup_rfi_flush();
 770         setup_stf_barrier();
 771
 772         /* By default, only probe PCI (can be overridden by rtas_pci) */
 773         pci_add_flags(PCI_PROBE_ONLY);
 774
 775         /* Find and initialize PCI host bridges */
 776         init_pci_config_tokens();
 777         find_and_init_phbs();
 778         of_reconfig_notifier_register(&pci_dn_reconfig_nb);
 779
 780         pSeries_nvram_init();
 781
 782         if (firmware_has_feature(FW_FEATURE_LPAR)) {
 783                 vpa_init(boot_cpuid);
 784                 ppc_md.power_save = pseries_lpar_idle;
 785                 ppc_md.enable_pmcs = pseries_lpar_enable_pmcs;
 786 #ifdef CONFIG_PCI_IOV
 787                 ppc_md.pcibios_fixup_resources =
 788                         pseries_pci_fixup_resources;
 789                 ppc_md.pcibios_fixup_sriov =
 790                         pseries_pci_fixup_iov_resources;
 791                 ppc_md.pcibios_iov_resource_alignment =
 792                         pseries_pci_iov_resource_alignment;
 793 #endif
 794         } else {
 795                 /* No special idle routine */
 796                 ppc_md.enable_pmcs = power4_enable_pmcs;
 797         }
 798
 799         ppc_md.pcibios_root_bridge_prepare = pseries_root_bridge_prepare;
 800 }
 801
 802 static void pseries_panic(char *str)
 803 {
 804         panic_flush_kmsg_end();
 805         rtas_os_term(str);
 806 }
 807
 808 static int __init pSeries_init_panel(void)
 809 {
 810         /* Manually leave the kernel version on the panel. */
 811 #ifdef __BIG_ENDIAN__
 812         ppc_md.progress("Linux ppc64\n", 0);
 813 #else
 814         ppc_md.progress("Linux ppc64le\n", 0);
 815 #endif
 816         ppc_md.progress(init_utsname()->version, 0);
 817
 818         return 0;
 819 }
 820 machine_arch_initcall(pseries, pSeries_init_panel);
 821
 822 static int pseries_set_dabr(unsigned long dabr, unsigned long dabrx)
 823 {
 824         return plpar_hcall_norets(H_SET_DABR, dabr);
 825 }
 826
 827 static int pseries_set_xdabr(unsigned long dabr, unsigned long dabrx)
 828 {
 829         /* Have to set at least one bit in the DABRX according to PAPR */
 830         if (dabrx == 0 && dabr == 0)
 831                 dabrx = DABRX_USER;
 832         /* PAPR says we can only set kernel and user bits */
 833         dabrx &= DABRX_KERNEL | DABRX_USER;
 834
 835         return plpar_hcall_norets(H_SET_XDABR, dabr, dabrx);
 836 }
 837
 838 static int pseries_set_dawr(unsigned long dawr, unsigned long dawrx)
 839 {
 840         /* PAPR says we can't set HYP */
 841         dawrx &= ~DAWRX_HYP;
 842
 843         return  plpar_set_watchpoint0(dawr, dawrx);
 844 }
 845
 846 #define CMO_CHARACTERISTICS_TOKEN 44
 847 #define CMO_MAXLENGTH 1026
 848
 849 void pSeries_coalesce_init(void)
 850 {
 851         struct hvcall_mpp_x_data mpp_x_data;
 852
 853         if (firmware_has_feature(FW_FEATURE_CMO) && !h_get_mpp_x(&mpp_x_data))
 854                 powerpc_firmware_features |= FW_FEATURE_XCMO;
 855         else
 856                 powerpc_firmware_features &= ~FW_FEATURE_XCMO;
 857 }
 858
 859 /**
 860  * fw_cmo_feature_init - FW_FEATURE_CMO is not stored in ibm,hypertas-functions,
 861  * handle that here. (Stolen from parse_system_parameter_string)
 862  */
 863 static void pSeries_cmo_feature_init(void)
 864 {
 865         char *ptr, *key, *value, *end;
 866         int call_status;
 867         int page_order = IOMMU_PAGE_SHIFT_4K;
 868
 869         pr_debug(" -> fw_cmo_feature_init()\n");
 870         spin_lock(&rtas_data_buf_lock);
 871         memset(rtas_data_buf, 0, RTAS_DATA_BUF_SIZE);
 872         call_status = rtas_call(rtas_token("ibm,get-system-parameter"), 3, 1,
 873                                 NULL,
 874                                 CMO_CHARACTERISTICS_TOKEN,
 875                                 __pa(rtas_data_buf),
 876                                 RTAS_DATA_BUF_SIZE);
 877
 878         if (call_status != 0) {
 879                 spin_unlock(&rtas_data_buf_lock);
 880                 pr_debug("CMO not available\n");
 881                 pr_debug(" <- fw_cmo_feature_init()\n");
 882                 return;
 883         }
 884
 885         end = rtas_data_buf + CMO_MAXLENGTH - 2;
 886         ptr = rtas_data_buf + 2;        /* step over strlen value */
 887         key = value = ptr;
 888
 889         while (*ptr && (ptr <= end)) {
 890                 /* Separate the key and value by replacing '=' with '\0' and
 891                  * point the value at the string after the '='
 892                  */
 893                 if (ptr[0] == '=') {
 894                         ptr[0] = '\0';
 895                         value = ptr + 1;
 896                 } else if (ptr[0] == '\0' || ptr[0] == ',') {
 897                         /* Terminate the string containing the key/value pair */
 898                         ptr[0] = '\0';
 899
 900                         if (key == value) {
 901                                 pr_debug("Malformed key/value pair\n");
 902                                 /* Never found a '=', end processing */
 903                                 break;
 904                         }
 905
 906                         if (0 == strcmp(key, "CMOPageSize"))
 907                                 page_order = simple_strtol(value, NULL, 10);
 908                         else if (0 == strcmp(key, "PrPSP"))
 909                                 CMO_PrPSP = simple_strtol(value, NULL, 10);
 910                         else if (0 == strcmp(key, "SecPSP"))
 911                                 CMO_SecPSP = simple_strtol(value, NULL, 10);
 912                         value = key = ptr + 1;
 913                 }
 914                 ptr++;
 915         }
 916
 917         /* Page size is returned as the power of 2 of the page size,
 918          * convert to the page size in bytes before returning
 919          */
 920         CMO_PageSize = 1 << page_order;
 921         pr_debug("CMO_PageSize = %lu\n", CMO_PageSize);
 922
 923         if (CMO_PrPSP != -1 || CMO_SecPSP != -1) {
 924                 pr_info("CMO enabled\n");
 925                 pr_debug("CMO enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP,
 926                          CMO_SecPSP);
 927                 powerpc_firmware_features |= FW_FEATURE_CMO;
 928                 pSeries_coalesce_init();
 929         } else
 930                 pr_debug("CMO not enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP,
 931                          CMO_SecPSP);
 932         spin_unlock(&rtas_data_buf_lock);
 933         pr_debug(" <- fw_cmo_feature_init()\n");
 934 }
 935
 936 /*
 937  * Early initialization.  Relocation is on but do not reference unbolted pages
 938  */
 939 static void __init pseries_init(void)
 940 {
 941         pr_debug(" -> pseries_init()\n");
 942
 943 #ifdef CONFIG_HVC_CONSOLE
 944         if (firmware_has_feature(FW_FEATURE_LPAR))
 945                 hvc_vio_init_early();
 946 #endif
 947         if (firmware_has_feature(FW_FEATURE_XDABR))
 948                 ppc_md.set_dabr = pseries_set_xdabr;
 949         else if (firmware_has_feature(FW_FEATURE_DABR))
 950                 ppc_md.set_dabr = pseries_set_dabr;
 951
 952         if (firmware_has_feature(FW_FEATURE_SET_MODE))
 953                 ppc_md.set_dawr = pseries_set_dawr;
 954
 955         pSeries_cmo_feature_init();
 956         iommu_init_early_pSeries();
 957
 958         pr_debug(" <- pseries_init()\n");
 959 }
 960
 961 /**
 962  * pseries_power_off - tell firmware about how to power off the system.
 963  *
 964  * This function calls either the power-off rtas token in normal cases
 965  * or the ibm,power-off-ups token (if present & requested) in case of
 966  * a power failure. If power-off token is used, power on will only be
 967  * possible with power button press. If ibm,power-off-ups token is used
 968  * it will allow auto poweron after power is restored.
 969  */
 970 static void pseries_power_off(void)
 971 {
 972         int rc;
 973         int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups");
 974
 975         if (rtas_flash_term_hook)
 976                 rtas_flash_term_hook(SYS_POWER_OFF);
 977
 978         if (rtas_poweron_auto == 0 ||
 979                 rtas_poweroff_ups_token == RTAS_UNKNOWN_SERVICE) {
 980                 rc = rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1);
 981                 printk(KERN_INFO "RTAS power-off returned %d\n", rc);
 982         } else {
 983                 rc = rtas_call(rtas_poweroff_ups_token, 0, 1, NULL);
 984                 printk(KERN_INFO "RTAS ibm,power-off-ups returned %d\n", rc);
 985         }
 986         for (;;);
 987 }
 988
 989 static int __init pSeries_probe(void)
 990 {
 991         if (!of_node_is_type(of_root, "chrp"))
 992                 return 0;
 993
 994         /* Cell blades firmware claims to be chrp while it's not. Until this
 995          * is fixed, we need to avoid those here.
 996          */
 997         if (of_machine_is_compatible("IBM,CPBW-1.0") ||
 998             of_machine_is_compatible("IBM,CBEA"))
 999                 return 0;
1000
1001         pm_power_off = pseries_power_off;
1002
1003         pr_debug("Machine is%s LPAR !\n",
1004                  (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not");
1005
1006         pseries_init();
1007
1008         return 1;
1009 }
1010
1011 static int pSeries_pci_probe_mode(struct pci_bus *bus)
1012 {
1013         if (firmware_has_feature(FW_FEATURE_LPAR))
1014                 return PCI_PROBE_DEVTREE;
1015         return PCI_PROBE_NORMAL;
1016 }
1017
1018 struct pci_controller_ops pseries_pci_controller_ops = {
1019         .probe_mode             = pSeries_pci_probe_mode,
1020 };
1021
1022 define_machine(pseries) {
1023         .name                   = "pSeries",
1024         .probe                  = pSeries_probe,
1025         .setup_arch             = pSeries_setup_arch,
1026         .init_IRQ               = pseries_init_irq,
1027         .show_cpuinfo           = pSeries_show_cpuinfo,
1028         .log_error              = pSeries_log_error,
1029         .pcibios_fixup          = pSeries_final_fixup,
1030         .restart                = rtas_restart,
1031         .halt                   = rtas_halt,
1032         .panic                  = pseries_panic,
1033         .get_boot_time          = rtas_get_boot_time,
1034         .get_rtc_time           = rtas_get_rtc_time,
1035         .set_rtc_time           = rtas_set_rtc_time,
1036         .calibrate_decr         = generic_calibrate_decr,
1037         .progress               = rtas_progress,
1038         .system_reset_exception = pSeries_system_reset_exception,
1039         .machine_check_early    = pseries_machine_check_realmode,
1040         .machine_check_exception = pSeries_machine_check_exception,
1041 #ifdef CONFIG_KEXEC_CORE
1042         .machine_kexec          = pSeries_machine_kexec,
1043         .kexec_cpu_down         = pseries_kexec_cpu_down,
1044 #endif
1045 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
1046         .memory_block_size      = pseries_memory_block_size,
1047 #endif
1048 };