arch/powerpc/platforms/pseries/setup.c

   1 /*
   2  *  64-bit pSeries and RS/6000 setup code.
   3  *
   4  *  Copyright (C) 1995  Linus Torvalds
   5  *  Adapted from 'alpha' version by Gary Thomas
   6  *  Modified by Cort Dougan (cort@cs.nmt.edu)
   7  *  Modified by PPC64 Team, IBM Corp
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License
  11  * as published by the Free Software Foundation; either version
  12  * 2 of the License, or (at your option) any later version.
  13  */
  14
  15 /*
  16  * bootup setup stuff..
  17  */
  18
  19 #include <linux/cpu.h>
  20 #include <linux/errno.h>
  21 #include <linux/sched.h>
  22 #include <linux/kernel.h>
  23 #include <linux/mm.h>
  24 #include <linux/stddef.h>
  25 #include <linux/unistd.h>
  26 #include <linux/user.h>
  27 #include <linux/tty.h>
  28 #include <linux/major.h>
  29 #include <linux/interrupt.h>
  30 #include <linux/reboot.h>
  31 #include <linux/init.h>
  32 #include <linux/ioport.h>
  33 #include <linux/console.h>
  34 #include <linux/pci.h>
  35 #include <linux/utsname.h>
  36 #include <linux/adb.h>
  37 #include <linux/export.h>
  38 #include <linux/delay.h>
  39 #include <linux/irq.h>
  40 #include <linux/seq_file.h>
  41 #include <linux/root_dev.h>
  42 #include <linux/of.h>
  43 #include <linux/of_pci.h>
  44 #include <linux/memblock.h>
  45 #include <linux/swiotlb.h>
  46
  47 #include <asm/mmu.h>
  48 #include <asm/processor.h>
  49 #include <asm/io.h>
  50 #include <asm/pgtable.h>
  51 #include <asm/prom.h>
  52 #include <asm/rtas.h>
  53 #include <asm/pci-bridge.h>
  54 #include <asm/iommu.h>
  55 #include <asm/dma.h>
  56 #include <asm/machdep.h>
  57 #include <asm/irq.h>
  58 #include <asm/time.h>
  59 #include <asm/nvram.h>
  60 #include <asm/pmc.h>
  61 #include <asm/xics.h>
  62 #include <asm/xive.h>
  63 #include <asm/ppc-pci.h>
  64 #include <asm/i8259.h>
  65 #include <asm/udbg.h>
  66 #include <asm/smp.h>
  67 #include <asm/firmware.h>
  68 #include <asm/eeh.h>
  69 #include <asm/reg.h>
  70 #include <asm/plpar_wrappers.h>
  71 #include <asm/kexec.h>
  72 #include <asm/isa-bridge.h>
  73 #include <asm/security_features.h>
  74 #include <asm/asm-const.h>
  75 #include <asm/swiotlb.h>
  76
  77 #include "pseries.h"
  78 #include "../../../../drivers/pci/pci.h"
  79
  80 int CMO_PrPSP = -1;
  81 int CMO_SecPSP = -1;
  82 unsigned long CMO_PageSize = (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K);
  83 EXPORT_SYMBOL(CMO_PageSize);
  84
  85 int fwnmi_active;  /* TRUE if an FWNMI handler is present */
  86
  87 static void pSeries_show_cpuinfo(struct seq_file *m)
  88 {
  89         struct device_node *root;
  90         const char *model = "";
  91
  92         root = of_find_node_by_path("/");
  93         if (root)
  94                 model = of_get_property(root, "model", NULL);
  95         seq_printf(m, "machine\t\t: CHRP %s\n", model);
  96         of_node_put(root);
  97         if (radix_enabled())
  98                 seq_printf(m, "MMU\t\t: Radix\n");
  99         else
 100                 seq_printf(m, "MMU\t\t: Hash\n");
 101 }
 102
 103 /* Initialize firmware assisted non-maskable interrupts if
 104  * the firmware supports this feature.
 105  */
 106 static void __init fwnmi_init(void)
 107 {
 108         unsigned long system_reset_addr, machine_check_addr;
 109         u8 *mce_data_buf;
 110         unsigned int i;
 111         int nr_cpus = num_possible_cpus();
 112 #ifdef CONFIG_PPC_BOOK3S_64
 113         struct slb_entry *slb_ptr;
 114         size_t size;
 115 #endif
 116
 117         int ibm_nmi_register = rtas_token("ibm,nmi-register");
 118         if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE)
 119                 return;
 120
 121         /* If the kernel's not linked at zero we point the firmware at low
 122          * addresses anyway, and use a trampoline to get to the real code. */
 123         system_reset_addr  = __pa(system_reset_fwnmi) - PHYSICAL_START;
 124         machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START;
 125
 126         if (0 == rtas_call(ibm_nmi_register, 2, 1, NULL, system_reset_addr,
 127                                 machine_check_addr))
 128                 fwnmi_active = 1;
 129
 130         /*
 131          * Allocate a chunk for per cpu buffer to hold rtas errorlog.
 132          * It will be used in real mode mce handler, hence it needs to be
 133          * below RMA.
 134          */
 135         mce_data_buf = memblock_alloc_try_nid_raw(RTAS_ERROR_LOG_MAX * nr_cpus,
 136                                         RTAS_ERROR_LOG_MAX, MEMBLOCK_LOW_LIMIT,
 137                                         ppc64_rma_size, NUMA_NO_NODE);
 138         if (!mce_data_buf)
 139                 panic("Failed to allocate %d bytes below %pa for MCE buffer\n",
 140                       RTAS_ERROR_LOG_MAX * nr_cpus, &ppc64_rma_size);
 141
 142         for_each_possible_cpu(i) {
 143                 paca_ptrs[i]->mce_data_buf = mce_data_buf +
 144                                                 (RTAS_ERROR_LOG_MAX * i);
 145         }
 146
 147 #ifdef CONFIG_PPC_BOOK3S_64
 148         /* Allocate per cpu slb area to save old slb contents during MCE */
 149         size = sizeof(struct slb_entry) * mmu_slb_size * nr_cpus;
 150         slb_ptr = memblock_alloc_try_nid_raw(size, sizeof(struct slb_entry),
 151                                         MEMBLOCK_LOW_LIMIT, ppc64_rma_size,
 152                                         NUMA_NO_NODE);
 153         if (!slb_ptr)
 154                 panic("Failed to allocate %zu bytes below %pa for slb area\n",
 155                       size, &ppc64_rma_size);
 156
 157         for_each_possible_cpu(i)
 158                 paca_ptrs[i]->mce_faulty_slbs = slb_ptr + (mmu_slb_size * i);
 159 #endif
 160 }
 161
 162 static void pseries_8259_cascade(struct irq_desc *desc)
 163 {
 164         struct irq_chip *chip = irq_desc_get_chip(desc);
 165         unsigned int cascade_irq = i8259_irq();
 166
 167         if (cascade_irq)
 168                 generic_handle_irq(cascade_irq);
 169
 170         chip->irq_eoi(&desc->irq_data);
 171 }
 172
 173 static void __init pseries_setup_i8259_cascade(void)
 174 {
 175         struct device_node *np, *old, *found = NULL;
 176         unsigned int cascade;
 177         const u32 *addrp;
 178         unsigned long intack = 0;
 179         int naddr;
 180
 181         for_each_node_by_type(np, "interrupt-controller") {
 182                 if (of_device_is_compatible(np, "chrp,iic")) {
 183                         found = np;
 184                         break;
 185                 }
 186         }
 187
 188         if (found == NULL) {
 189                 printk(KERN_DEBUG "pic: no ISA interrupt controller\n");
 190                 return;
 191         }
 192
 193         cascade = irq_of_parse_and_map(found, 0);
 194         if (!cascade) {
 195                 printk(KERN_ERR "pic: failed to map cascade interrupt");
 196                 return;
 197         }
 198         pr_debug("pic: cascade mapped to irq %d\n", cascade);
 199
 200         for (old = of_node_get(found); old != NULL ; old = np) {
 201                 np = of_get_parent(old);
 202                 of_node_put(old);
 203                 if (np == NULL)
 204                         break;
 205                 if (!of_node_name_eq(np, "pci"))
 206                         continue;
 207                 addrp = of_get_property(np, "8259-interrupt-acknowledge", NULL);
 208                 if (addrp == NULL)
 209                         continue;
 210                 naddr = of_n_addr_cells(np);
 211                 intack = addrp[naddr-1];
 212                 if (naddr > 1)
 213                         intack |= ((unsigned long)addrp[naddr-2]) << 32;
 214         }
 215         if (intack)
 216                 printk(KERN_DEBUG "pic: PCI 8259 intack at 0x%016lx\n", intack);
 217         i8259_init(found, intack);
 218         of_node_put(found);
 219         irq_set_chained_handler(cascade, pseries_8259_cascade);
 220 }
 221
 222 static void __init pseries_init_irq(void)
 223 {
 224         /* Try using a XIVE if available, otherwise use a XICS */
 225         if (!xive_spapr_init()) {
 226                 xics_init();
 227                 pseries_setup_i8259_cascade();
 228         }
 229 }
 230
 231 static void pseries_lpar_enable_pmcs(void)
 232 {
 233         unsigned long set, reset;
 234
 235         set = 1UL << 63;
 236         reset = 0;
 237         plpar_hcall_norets(H_PERFMON, set, reset);
 238 }
 239
 240 static int pci_dn_reconfig_notifier(struct notifier_block *nb, unsigned long action, void *data)
 241 {
 242         struct of_reconfig_data *rd = data;
 243         struct device_node *parent, *np = rd->dn;
 244         struct pci_dn *pdn;
 245         int err = NOTIFY_OK;
 246
 247         switch (action) {
 248         case OF_RECONFIG_ATTACH_NODE:
 249                 parent = of_get_parent(np);
 250                 pdn = parent ? PCI_DN(parent) : NULL;
 251                 if (pdn)
 252                         pci_add_device_node_info(pdn->phb, np);
 253
 254                 of_node_put(parent);
 255                 break;
 256         case OF_RECONFIG_DETACH_NODE:
 257                 pdn = PCI_DN(np);
 258                 if (pdn)
 259                         list_del(&pdn->list);
 260                 break;
 261         default:
 262                 err = NOTIFY_DONE;
 263                 break;
 264         }
 265         return err;
 266 }
 267
 268 static struct notifier_block pci_dn_reconfig_nb = {
 269         .notifier_call = pci_dn_reconfig_notifier,
 270 };
 271
 272 struct kmem_cache *dtl_cache;
 273
 274 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
 275 /*
 276  * Allocate space for the dispatch trace log for all possible cpus
 277  * and register the buffers with the hypervisor.  This is used for
 278  * computing time stolen by the hypervisor.
 279  */
 280 static int alloc_dispatch_logs(void)
 281 {
 282         int cpu, ret;
 283         struct paca_struct *pp;
 284         struct dtl_entry *dtl;
 285
 286         if (!firmware_has_feature(FW_FEATURE_SPLPAR))
 287                 return 0;
 288
 289         if (!dtl_cache)
 290                 return 0;
 291
 292         for_each_possible_cpu(cpu) {
 293                 pp = paca_ptrs[cpu];
 294                 dtl = kmem_cache_alloc(dtl_cache, GFP_KERNEL);
 295                 if (!dtl) {
 296                         pr_warn("Failed to allocate dispatch trace log for cpu %d\n",
 297                                 cpu);
 298                         pr_warn("Stolen time statistics will be unreliable\n");
 299                         break;
 300                 }
 301
 302                 pp->dtl_ridx = 0;
 303                 pp->dispatch_log = dtl;
 304                 pp->dispatch_log_end = dtl + N_DISPATCH_LOG;
 305                 pp->dtl_curr = dtl;
 306         }
 307
 308         /* Register the DTL for the current (boot) cpu */
 309         dtl = get_paca()->dispatch_log;
 310         get_paca()->dtl_ridx = 0;
 311         get_paca()->dtl_curr = dtl;
 312         get_paca()->lppaca_ptr->dtl_idx = 0;
 313
 314         /* hypervisor reads buffer length from this field */
 315         dtl->enqueue_to_dispatch_time = cpu_to_be32(DISPATCH_LOG_BYTES);
 316         ret = register_dtl(hard_smp_processor_id(), __pa(dtl));
 317         if (ret)
 318                 pr_err("WARNING: DTL registration of cpu %d (hw %d) failed "
 319                        "with %d\n", smp_processor_id(),
 320                        hard_smp_processor_id(), ret);
 321         get_paca()->lppaca_ptr->dtl_enable_mask = 2;
 322
 323         return 0;
 324 }
 325 #else /* !CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */
 326 static inline int alloc_dispatch_logs(void)
 327 {
 328         return 0;
 329 }
 330 #endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */
 331
 332 static int alloc_dispatch_log_kmem_cache(void)
 333 {
 334         dtl_cache = kmem_cache_create("dtl", DISPATCH_LOG_BYTES,
 335                                                 DISPATCH_LOG_BYTES, 0, NULL);
 336         if (!dtl_cache) {
 337                 pr_warn("Failed to create dispatch trace log buffer cache\n");
 338                 pr_warn("Stolen time statistics will be unreliable\n");
 339                 return 0;
 340         }
 341
 342         return alloc_dispatch_logs();
 343 }
 344 machine_early_initcall(pseries, alloc_dispatch_log_kmem_cache);
 345
 346 static void pseries_lpar_idle(void)
 347 {
 348         /*
 349          * Default handler to go into low thread priority and possibly
 350          * low power mode by ceding processor to hypervisor
 351          */
 352
 353         /* Indicate to hypervisor that we are idle. */
 354         get_lppaca()->idle = 1;
 355
 356         /*
 357          * Yield the processor to the hypervisor.  We return if
 358          * an external interrupt occurs (which are driven prior
 359          * to returning here) or if a prod occurs from another
 360          * processor. When returning here, external interrupts
 361          * are enabled.
 362          */
 363         cede_processor();
 364
 365         get_lppaca()->idle = 0;
 366 }
 367
 368 /*
 369  * Enable relocation on during exceptions. This has partition wide scope and
 370  * may take a while to complete, if it takes longer than one second we will
 371  * just give up rather than wasting any more time on this - if that turns out
 372  * to ever be a problem in practice we can move this into a kernel thread to
 373  * finish off the process later in boot.
 374  */
 375 void pseries_enable_reloc_on_exc(void)
 376 {
 377         long rc;
 378         unsigned int delay, total_delay = 0;
 379
 380         while (1) {
 381                 rc = enable_reloc_on_exceptions();
 382                 if (!H_IS_LONG_BUSY(rc)) {
 383                         if (rc == H_P2) {
 384                                 pr_info("Relocation on exceptions not"
 385                                         " supported\n");
 386                         } else if (rc != H_SUCCESS) {
 387                                 pr_warn("Unable to enable relocation"
 388                                         " on exceptions: %ld\n", rc);
 389                         }
 390                         break;
 391                 }
 392
 393                 delay = get_longbusy_msecs(rc);
 394                 total_delay += delay;
 395                 if (total_delay > 1000) {
 396                         pr_warn("Warning: Giving up waiting to enable "
 397                                 "relocation on exceptions (%u msec)!\n",
 398                                 total_delay);
 399                         return;
 400                 }
 401
 402                 mdelay(delay);
 403         }
 404 }
 405 EXPORT_SYMBOL(pseries_enable_reloc_on_exc);
 406
 407 void pseries_disable_reloc_on_exc(void)
 408 {
 409         long rc;
 410
 411         while (1) {
 412                 rc = disable_reloc_on_exceptions();
 413                 if (!H_IS_LONG_BUSY(rc))
 414                         break;
 415                 mdelay(get_longbusy_msecs(rc));
 416         }
 417         if (rc != H_SUCCESS)
 418                 pr_warn("Warning: Failed to disable relocation on exceptions: %ld\n",
 419                         rc);
 420 }
 421 EXPORT_SYMBOL(pseries_disable_reloc_on_exc);
 422
 423 #ifdef CONFIG_KEXEC_CORE
 424 static void pSeries_machine_kexec(struct kimage *image)
 425 {
 426         if (firmware_has_feature(FW_FEATURE_SET_MODE))
 427                 pseries_disable_reloc_on_exc();
 428
 429         default_machine_kexec(image);
 430 }
 431 #endif
 432
 433 #ifdef __LITTLE_ENDIAN__
 434 void pseries_big_endian_exceptions(void)
 435 {
 436         long rc;
 437
 438         while (1) {
 439                 rc = enable_big_endian_exceptions();
 440                 if (!H_IS_LONG_BUSY(rc))
 441                         break;
 442                 mdelay(get_longbusy_msecs(rc));
 443         }
 444
 445         /*
 446          * At this point it is unlikely panic() will get anything
 447          * out to the user, since this is called very late in kexec
 448          * but at least this will stop us from continuing on further
 449          * and creating an even more difficult to debug situation.
 450          *
 451          * There is a known problem when kdump'ing, if cpus are offline
 452          * the above call will fail. Rather than panicking again, keep
 453          * going and hope the kdump kernel is also little endian, which
 454          * it usually is.
 455          */
 456         if (rc && !kdump_in_progress())
 457                 panic("Could not enable big endian exceptions");
 458 }
 459
 460 void pseries_little_endian_exceptions(void)
 461 {
 462         long rc;
 463
 464         while (1) {
 465                 rc = enable_little_endian_exceptions();
 466                 if (!H_IS_LONG_BUSY(rc))
 467                         break;
 468                 mdelay(get_longbusy_msecs(rc));
 469         }
 470         if (rc) {
 471                 ppc_md.progress("H_SET_MODE LE exception fail", 0);
 472                 panic("Could not enable little endian exceptions");
 473         }
 474 }
 475 #endif
 476
 477 static void __init find_and_init_phbs(void)
 478 {
 479         struct device_node *node;
 480         struct pci_controller *phb;
 481         struct device_node *root = of_find_node_by_path("/");
 482
 483         for_each_child_of_node(root, node) {
 484                 if (!of_node_is_type(node, "pci") &&
 485                     !of_node_is_type(node, "pciex"))
 486                         continue;
 487
 488                 phb = pcibios_alloc_controller(node);
 489                 if (!phb)
 490                         continue;
 491                 rtas_setup_phb(phb);
 492                 pci_process_bridge_OF_ranges(phb, node, 0);
 493                 isa_bridge_find_early(phb);
 494                 phb->controller_ops = pseries_pci_controller_ops;
 495         }
 496
 497         of_node_put(root);
 498
 499         /*
 500          * PCI_PROBE_ONLY and PCI_REASSIGN_ALL_BUS can be set via properties
 501          * in chosen.
 502          */
 503         of_pci_check_probe_only();
 504 }
 505
 506 static void init_cpu_char_feature_flags(struct h_cpu_char_result *result)
 507 {
 508         /*
 509          * The features below are disabled by default, so we instead look to see
 510          * if firmware has *enabled* them, and set them if so.
 511          */
 512         if (result->character & H_CPU_CHAR_SPEC_BAR_ORI31)
 513                 security_ftr_set(SEC_FTR_SPEC_BAR_ORI31);
 514
 515         if (result->character & H_CPU_CHAR_BCCTRL_SERIALISED)
 516                 security_ftr_set(SEC_FTR_BCCTRL_SERIALISED);
 517
 518         if (result->character & H_CPU_CHAR_L1D_FLUSH_ORI30)
 519                 security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30);
 520
 521         if (result->character & H_CPU_CHAR_L1D_FLUSH_TRIG2)
 522                 security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2);
 523
 524         if (result->character & H_CPU_CHAR_L1D_THREAD_PRIV)
 525                 security_ftr_set(SEC_FTR_L1D_THREAD_PRIV);
 526
 527         if (result->character & H_CPU_CHAR_COUNT_CACHE_DISABLED)
 528                 security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED);
 529
 530         if (result->character & H_CPU_CHAR_BCCTR_FLUSH_ASSIST)
 531                 security_ftr_set(SEC_FTR_BCCTR_FLUSH_ASSIST);
 532
 533         if (result->behaviour & H_CPU_BEHAV_FLUSH_COUNT_CACHE)
 534                 security_ftr_set(SEC_FTR_FLUSH_COUNT_CACHE);
 535
 536         /*
 537          * The features below are enabled by default, so we instead look to see
 538          * if firmware has *disabled* them, and clear them if so.
 539          */
 540         if (!(result->behaviour & H_CPU_BEHAV_FAVOUR_SECURITY))
 541                 security_ftr_clear(SEC_FTR_FAVOUR_SECURITY);
 542
 543         if (!(result->behaviour & H_CPU_BEHAV_L1D_FLUSH_PR))
 544                 security_ftr_clear(SEC_FTR_L1D_FLUSH_PR);
 545
 546         if (!(result->behaviour & H_CPU_BEHAV_BNDS_CHK_SPEC_BAR))
 547                 security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR);
 548 }
 549
 550 void pseries_setup_rfi_flush(void)
 551 {
 552         struct h_cpu_char_result result;
 553         enum l1d_flush_type types;
 554         bool enable;
 555         long rc;
 556
 557         /*
 558          * Set features to the defaults assumed by init_cpu_char_feature_flags()
 559          * so it can set/clear again any features that might have changed after
 560          * migration, and in case the hypercall fails and it is not even called.
 561          */
 562         powerpc_security_features = SEC_FTR_DEFAULT;
 563
 564         rc = plpar_get_cpu_characteristics(&result);
 565         if (rc == H_SUCCESS)
 566                 init_cpu_char_feature_flags(&result);
 567
 568         /*
 569          * We're the guest so this doesn't apply to us, clear it to simplify
 570          * handling of it elsewhere.
 571          */
 572         security_ftr_clear(SEC_FTR_L1D_FLUSH_HV);
 573
 574         types = L1D_FLUSH_FALLBACK;
 575
 576         if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_TRIG2))
 577                 types |= L1D_FLUSH_MTTRIG;
 578
 579         if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_ORI30))
 580                 types |= L1D_FLUSH_ORI;
 581
 582         enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && \
 583                  security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR);
 584
 585         setup_rfi_flush(types, enable);
 586         setup_count_cache_flush();
 587 }
 588
 589 #ifdef CONFIG_PCI_IOV
 590 enum rtas_iov_fw_value_map {
 591         NUM_RES_PROPERTY  = 0, /* Number of Resources */
 592         LOW_INT           = 1, /* Lowest 32 bits of Address */
 593         START_OF_ENTRIES  = 2, /* Always start of entry */
 594         APERTURE_PROPERTY = 2, /* Start of entry+ to  Aperture Size */
 595         WDW_SIZE_PROPERTY = 4, /* Start of entry+ to Window Size */
 596         NEXT_ENTRY        = 7  /* Go to next entry on array */
 597 };
 598
 599 enum get_iov_fw_value_index {
 600         BAR_ADDRS     = 1,    /*  Get Bar Address */
 601         APERTURE_SIZE = 2,    /*  Get Aperture Size */
 602         WDW_SIZE      = 3     /*  Get Window Size */
 603 };
 604
 605 resource_size_t pseries_get_iov_fw_value(struct pci_dev *dev, int resno,
 606                                          enum get_iov_fw_value_index value)
 607 {
 608         const int *indexes;
 609         struct device_node *dn = pci_device_to_OF_node(dev);
 610         int i, num_res, ret = 0;
 611
 612         indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL);
 613         if (!indexes)
 614                 return  0;
 615
 616         /*
 617          * First element in the array is the number of Bars
 618          * returned.  Search through the list to find the matching
 619          * bar
 620          */
 621         num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1);
 622         if (resno >= num_res)
 623                 return 0; /* or an errror */
 624
 625         i = START_OF_ENTRIES + NEXT_ENTRY * resno;
 626         switch (value) {
 627         case BAR_ADDRS:
 628                 ret = of_read_number(&indexes[i], 2);
 629                 break;
 630         case APERTURE_SIZE:
 631                 ret = of_read_number(&indexes[i + APERTURE_PROPERTY], 2);
 632                 break;
 633         case WDW_SIZE:
 634                 ret = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2);
 635                 break;
 636         }
 637
 638         return ret;
 639 }
 640
 641 void of_pci_set_vf_bar_size(struct pci_dev *dev, const int *indexes)
 642 {
 643         struct resource *res;
 644         resource_size_t base, size;
 645         int i, r, num_res;
 646
 647         num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1);
 648         num_res = min_t(int, num_res, PCI_SRIOV_NUM_BARS);
 649         for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS;
 650              i += NEXT_ENTRY, r++) {
 651                 res = &dev->resource[r + PCI_IOV_RESOURCES];
 652                 base = of_read_number(&indexes[i], 2);
 653                 size = of_read_number(&indexes[i + APERTURE_PROPERTY], 2);
 654                 res->flags = pci_parse_of_flags(of_read_number
 655                                                 (&indexes[i + LOW_INT], 1), 0);
 656                 res->flags |= (IORESOURCE_MEM_64 | IORESOURCE_PCI_FIXED);
 657                 res->name = pci_name(dev);
 658                 res->start = base;
 659                 res->end = base + size - 1;
 660         }
 661 }
 662
 663 void of_pci_parse_iov_addrs(struct pci_dev *dev, const int *indexes)
 664 {
 665         struct resource *res, *root, *conflict;
 666         resource_size_t base, size;
 667         int i, r, num_res;
 668
 669         /*
 670          * First element in the array is the number of Bars
 671          * returned.  Search through the list to find the matching
 672          * bars assign them from firmware into resources structure.
 673          */
 674         num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1);
 675         for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS;
 676              i += NEXT_ENTRY, r++) {
 677                 res = &dev->resource[r + PCI_IOV_RESOURCES];
 678                 base = of_read_number(&indexes[i], 2);
 679                 size = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2);
 680                 res->name = pci_name(dev);
 681                 res->start = base;
 682                 res->end = base + size - 1;
 683                 root = &iomem_resource;
 684                 dev_dbg(&dev->dev,
 685                         "pSeries IOV BAR %d: trying firmware assignment %pR\n",
 686                          r + PCI_IOV_RESOURCES, res);
 687                 conflict = request_resource_conflict(root, res);
 688                 if (conflict) {
 689                         dev_info(&dev->dev,
 690                                  "BAR %d: %pR conflicts with %s %pR\n",
 691                                  r + PCI_IOV_RESOURCES, res,
 692                                  conflict->name, conflict);
 693                         res->flags |= IORESOURCE_UNSET;
 694                 }
 695         }
 696 }
 697
 698 static void pseries_disable_sriov_resources(struct pci_dev *pdev)
 699 {
 700         int i;
 701
 702         pci_warn(pdev, "No hypervisor support for SR-IOV on this device, IOV BARs disabled.\n");
 703         for (i = 0; i < PCI_SRIOV_NUM_BARS; i++)
 704                 pdev->resource[i + PCI_IOV_RESOURCES].flags = 0;
 705 }
 706
 707 static void pseries_pci_fixup_resources(struct pci_dev *pdev)
 708 {
 709         const int *indexes;
 710         struct device_node *dn = pci_device_to_OF_node(pdev);
 711
 712         /*Firmware must support open sriov otherwise dont configure*/
 713         indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL);
 714         if (indexes)
 715                 of_pci_set_vf_bar_size(pdev, indexes);
 716         else
 717                 pseries_disable_sriov_resources(pdev);
 718 }
 719
 720 static void pseries_pci_fixup_iov_resources(struct pci_dev *pdev)
 721 {
 722         const int *indexes;
 723         struct device_node *dn = pci_device_to_OF_node(pdev);
 724
 725         if (!pdev->is_physfn || pci_dev_is_added(pdev))
 726                 return;
 727         /*Firmware must support open sriov otherwise dont configure*/
 728         indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL);
 729         if (indexes)
 730                 of_pci_parse_iov_addrs(pdev, indexes);
 731         else
 732                 pseries_disable_sriov_resources(pdev);
 733 }
 734
 735 static resource_size_t pseries_pci_iov_resource_alignment(struct pci_dev *pdev,
 736                                                           int resno)
 737 {
 738         const __be32 *reg;
 739         struct device_node *dn = pci_device_to_OF_node(pdev);
 740
 741         /*Firmware must support open sriov otherwise report regular alignment*/
 742         reg = of_get_property(dn, "ibm,is-open-sriov-pf", NULL);
 743         if (!reg)
 744                 return pci_iov_resource_size(pdev, resno);
 745
 746         if (!pdev->is_physfn)
 747                 return 0;
 748         return pseries_get_iov_fw_value(pdev,
 749                                         resno - PCI_IOV_RESOURCES,
 750                                         APERTURE_SIZE);
 751 }
 752 #endif
 753
 754 static void __init pSeries_setup_arch(void)
 755 {
 756         set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
 757
 758         /* Discover PIC type and setup ppc_md accordingly */
 759         smp_init_pseries();
 760
 761
 762         /* openpic global configuration register (64-bit format). */
 763         /* openpic Interrupt Source Unit pointer (64-bit format). */
 764         /* python0 facility area (mmio) (64-bit format) REAL address. */
 765
 766         /* init to some ~sane value until calibrate_delay() runs */
 767         loops_per_jiffy = 50000000;
 768
 769         fwnmi_init();
 770
 771         pseries_setup_rfi_flush();
 772         setup_stf_barrier();
 773
 774         /* By default, only probe PCI (can be overridden by rtas_pci) */
 775         pci_add_flags(PCI_PROBE_ONLY);
 776
 777         /* Find and initialize PCI host bridges */
 778         init_pci_config_tokens();
 779         find_and_init_phbs();
 780         of_reconfig_notifier_register(&pci_dn_reconfig_nb);
 781
 782         pSeries_nvram_init();
 783
 784         if (firmware_has_feature(FW_FEATURE_LPAR)) {
 785                 vpa_init(boot_cpuid);
 786                 ppc_md.power_save = pseries_lpar_idle;
 787                 ppc_md.enable_pmcs = pseries_lpar_enable_pmcs;
 788 #ifdef CONFIG_PCI_IOV
 789                 ppc_md.pcibios_fixup_resources =
 790                         pseries_pci_fixup_resources;
 791                 ppc_md.pcibios_fixup_sriov =
 792                         pseries_pci_fixup_iov_resources;
 793                 ppc_md.pcibios_iov_resource_alignment =
 794                         pseries_pci_iov_resource_alignment;
 795 #endif
 796         } else {
 797                 /* No special idle routine */
 798                 ppc_md.enable_pmcs = power4_enable_pmcs;
 799         }
 800
 801         ppc_md.pcibios_root_bridge_prepare = pseries_root_bridge_prepare;
 802
 803         if (swiotlb_force == SWIOTLB_FORCE)
 804                 ppc_swiotlb_enable = 1;
 805 }
 806
 807 static void pseries_panic(char *str)
 808 {
 809         panic_flush_kmsg_end();
 810         rtas_os_term(str);
 811 }
 812
 813 static int __init pSeries_init_panel(void)
 814 {
 815         /* Manually leave the kernel version on the panel. */
 816 #ifdef __BIG_ENDIAN__
 817         ppc_md.progress("Linux ppc64\n", 0);
 818 #else
 819         ppc_md.progress("Linux ppc64le\n", 0);
 820 #endif
 821         ppc_md.progress(init_utsname()->version, 0);
 822
 823         return 0;
 824 }
 825 machine_arch_initcall(pseries, pSeries_init_panel);
 826
 827 static int pseries_set_dabr(unsigned long dabr, unsigned long dabrx)
 828 {
 829         return plpar_hcall_norets(H_SET_DABR, dabr);
 830 }
 831
 832 static int pseries_set_xdabr(unsigned long dabr, unsigned long dabrx)
 833 {
 834         /* Have to set at least one bit in the DABRX according to PAPR */
 835         if (dabrx == 0 && dabr == 0)
 836                 dabrx = DABRX_USER;
 837         /* PAPR says we can only set kernel and user bits */
 838         dabrx &= DABRX_KERNEL | DABRX_USER;
 839
 840         return plpar_hcall_norets(H_SET_XDABR, dabr, dabrx);
 841 }
 842
 843 static int pseries_set_dawr(unsigned long dawr, unsigned long dawrx)
 844 {
 845         /* PAPR says we can't set HYP */
 846         dawrx &= ~DAWRX_HYP;
 847
 848         return  plpar_set_watchpoint0(dawr, dawrx);
 849 }
 850
 851 #define CMO_CHARACTERISTICS_TOKEN 44
 852 #define CMO_MAXLENGTH 1026
 853
 854 void pSeries_coalesce_init(void)
 855 {
 856         struct hvcall_mpp_x_data mpp_x_data;
 857
 858         if (firmware_has_feature(FW_FEATURE_CMO) && !h_get_mpp_x(&mpp_x_data))
 859                 powerpc_firmware_features |= FW_FEATURE_XCMO;
 860         else
 861                 powerpc_firmware_features &= ~FW_FEATURE_XCMO;
 862 }
 863
 864 /**
 865  * fw_cmo_feature_init - FW_FEATURE_CMO is not stored in ibm,hypertas-functions,
 866  * handle that here. (Stolen from parse_system_parameter_string)
 867  */
 868 static void pSeries_cmo_feature_init(void)
 869 {
 870         char *ptr, *key, *value, *end;
 871         int call_status;
 872         int page_order = IOMMU_PAGE_SHIFT_4K;
 873
 874         pr_debug(" -> fw_cmo_feature_init()\n");
 875         spin_lock(&rtas_data_buf_lock);
 876         memset(rtas_data_buf, 0, RTAS_DATA_BUF_SIZE);
 877         call_status = rtas_call(rtas_token("ibm,get-system-parameter"), 3, 1,
 878                                 NULL,
 879                                 CMO_CHARACTERISTICS_TOKEN,
 880                                 __pa(rtas_data_buf),
 881                                 RTAS_DATA_BUF_SIZE);
 882
 883         if (call_status != 0) {
 884                 spin_unlock(&rtas_data_buf_lock);
 885                 pr_debug("CMO not available\n");
 886                 pr_debug(" <- fw_cmo_feature_init()\n");
 887                 return;
 888         }
 889
 890         end = rtas_data_buf + CMO_MAXLENGTH - 2;
 891         ptr = rtas_data_buf + 2;        /* step over strlen value */
 892         key = value = ptr;
 893
 894         while (*ptr && (ptr <= end)) {
 895                 /* Separate the key and value by replacing '=' with '\0' and
 896                  * point the value at the string after the '='
 897                  */
 898                 if (ptr[0] == '=') {
 899                         ptr[0] = '\0';
 900                         value = ptr + 1;
 901                 } else if (ptr[0] == '\0' || ptr[0] == ',') {
 902                         /* Terminate the string containing the key/value pair */
 903                         ptr[0] = '\0';
 904
 905                         if (key == value) {
 906                                 pr_debug("Malformed key/value pair\n");
 907                                 /* Never found a '=', end processing */
 908                                 break;
 909                         }
 910
 911                         if (0 == strcmp(key, "CMOPageSize"))
 912                                 page_order = simple_strtol(value, NULL, 10);
 913                         else if (0 == strcmp(key, "PrPSP"))
 914                                 CMO_PrPSP = simple_strtol(value, NULL, 10);
 915                         else if (0 == strcmp(key, "SecPSP"))
 916                                 CMO_SecPSP = simple_strtol(value, NULL, 10);
 917                         value = key = ptr + 1;
 918                 }
 919                 ptr++;
 920         }
 921
 922         /* Page size is returned as the power of 2 of the page size,
 923          * convert to the page size in bytes before returning
 924          */
 925         CMO_PageSize = 1 << page_order;
 926         pr_debug("CMO_PageSize = %lu\n", CMO_PageSize);
 927
 928         if (CMO_PrPSP != -1 || CMO_SecPSP != -1) {
 929                 pr_info("CMO enabled\n");
 930                 pr_debug("CMO enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP,
 931                          CMO_SecPSP);
 932                 powerpc_firmware_features |= FW_FEATURE_CMO;
 933                 pSeries_coalesce_init();
 934         } else
 935                 pr_debug("CMO not enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP,
 936                          CMO_SecPSP);
 937         spin_unlock(&rtas_data_buf_lock);
 938         pr_debug(" <- fw_cmo_feature_init()\n");
 939 }
 940
 941 /*
 942  * Early initialization.  Relocation is on but do not reference unbolted pages
 943  */
 944 static void __init pseries_init(void)
 945 {
 946         pr_debug(" -> pseries_init()\n");
 947
 948 #ifdef CONFIG_HVC_CONSOLE
 949         if (firmware_has_feature(FW_FEATURE_LPAR))
 950                 hvc_vio_init_early();
 951 #endif
 952         if (firmware_has_feature(FW_FEATURE_XDABR))
 953                 ppc_md.set_dabr = pseries_set_xdabr;
 954         else if (firmware_has_feature(FW_FEATURE_DABR))
 955                 ppc_md.set_dabr = pseries_set_dabr;
 956
 957         if (firmware_has_feature(FW_FEATURE_SET_MODE))
 958                 ppc_md.set_dawr = pseries_set_dawr;
 959
 960         pSeries_cmo_feature_init();
 961         iommu_init_early_pSeries();
 962
 963         pr_debug(" <- pseries_init()\n");
 964 }
 965
 966 /**
 967  * pseries_power_off - tell firmware about how to power off the system.
 968  *
 969  * This function calls either the power-off rtas token in normal cases
 970  * or the ibm,power-off-ups token (if present & requested) in case of
 971  * a power failure. If power-off token is used, power on will only be
 972  * possible with power button press. If ibm,power-off-ups token is used
 973  * it will allow auto poweron after power is restored.
 974  */
 975 static void pseries_power_off(void)
 976 {
 977         int rc;
 978         int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups");
 979
 980         if (rtas_flash_term_hook)
 981                 rtas_flash_term_hook(SYS_POWER_OFF);
 982
 983         if (rtas_poweron_auto == 0 ||
 984                 rtas_poweroff_ups_token == RTAS_UNKNOWN_SERVICE) {
 985                 rc = rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1);
 986                 printk(KERN_INFO "RTAS power-off returned %d\n", rc);
 987         } else {
 988                 rc = rtas_call(rtas_poweroff_ups_token, 0, 1, NULL);
 989                 printk(KERN_INFO "RTAS ibm,power-off-ups returned %d\n", rc);
 990         }
 991         for (;;);
 992 }
 993
 994 static int __init pSeries_probe(void)
 995 {
 996         if (!of_node_is_type(of_root, "chrp"))
 997                 return 0;
 998
 999         /* Cell blades firmware claims to be chrp while it's not. Until this
1000          * is fixed, we need to avoid those here.
1001          */
1002         if (of_machine_is_compatible("IBM,CPBW-1.0") ||
1003             of_machine_is_compatible("IBM,CBEA"))
1004                 return 0;
1005
1006         pm_power_off = pseries_power_off;
1007
1008         pr_debug("Machine is%s LPAR !\n",
1009                  (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not");
1010
1011         pseries_init();
1012
1013         return 1;
1014 }
1015
1016 static int pSeries_pci_probe_mode(struct pci_bus *bus)
1017 {
1018         if (firmware_has_feature(FW_FEATURE_LPAR))
1019                 return PCI_PROBE_DEVTREE;
1020         return PCI_PROBE_NORMAL;
1021 }
1022
1023 struct pci_controller_ops pseries_pci_controller_ops = {
1024         .probe_mode             = pSeries_pci_probe_mode,
1025 };
1026
1027 define_machine(pseries) {
1028         .name                   = "pSeries",
1029         .probe                  = pSeries_probe,
1030         .setup_arch             = pSeries_setup_arch,
1031         .init_IRQ               = pseries_init_irq,
1032         .show_cpuinfo           = pSeries_show_cpuinfo,
1033         .log_error              = pSeries_log_error,
1034         .pcibios_fixup          = pSeries_final_fixup,
1035         .restart                = rtas_restart,
1036         .halt                   = rtas_halt,
1037         .panic                  = pseries_panic,
1038         .get_boot_time          = rtas_get_boot_time,
1039         .get_rtc_time           = rtas_get_rtc_time,
1040         .set_rtc_time           = rtas_set_rtc_time,
1041         .calibrate_decr         = generic_calibrate_decr,
1042         .progress               = rtas_progress,
1043         .system_reset_exception = pSeries_system_reset_exception,
1044         .machine_check_early    = pseries_machine_check_realmode,
1045         .machine_check_exception = pSeries_machine_check_exception,
1046 #ifdef CONFIG_KEXEC_CORE
1047         .machine_kexec          = pSeries_machine_kexec,
1048         .kexec_cpu_down         = pseries_kexec_cpu_down,
1049 #endif
1050 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
1051         .memory_block_size      = pseries_memory_block_size,
1052 #endif
1053 };