arch/powerpc/platforms/powermac/low_i2c.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * arch/powerpc/platforms/powermac/low_i2c.c
   4  *
   5  *  Copyright (C) 2003-2005 Ben. Herrenschmidt (benh@kernel.crashing.org)
   6  *
   7  * The linux i2c layer isn't completely suitable for our needs for various
   8  * reasons ranging from too late initialisation to semantics not perfectly
   9  * matching some requirements of the apple platform functions etc...
  10  *
  11  * This file thus provides a simple low level unified i2c interface for
  12  * powermac that covers the various types of i2c busses used in Apple machines.
  13  * For now, keywest, PMU and SMU, though we could add Cuda, or other bit
  14  * banging busses found on older chipsets in earlier machines if we ever need
  15  * one of them.
  16  *
  17  * The drivers in this file are synchronous/blocking. In addition, the
  18  * keywest one is fairly slow due to the use of msleep instead of interrupts
  19  * as the interrupt is currently used by i2c-keywest. In the long run, we
  20  * might want to get rid of those high-level interfaces to linux i2c layer
  21  * either completely (converting all drivers) or replacing them all with a
  22  * single stub driver on top of this one. Once done, the interrupt will be
  23  * available for our use.
  24  */
  25
  26 #undef DEBUG
  27 #undef DEBUG_LOW
  28
  29 #include <linux/types.h>
  30 #include <linux/sched.h>
  31 #include <linux/init.h>
  32 #include <linux/export.h>
  33 #include <linux/adb.h>
  34 #include <linux/pmu.h>
  35 #include <linux/delay.h>
  36 #include <linux/completion.h>
  37 #include <linux/platform_device.h>
  38 #include <linux/interrupt.h>
  39 #include <linux/timer.h>
  40 #include <linux/mutex.h>
  41 #include <linux/i2c.h>
  42 #include <linux/slab.h>
  43 #include <asm/keylargo.h>
  44 #include <asm/uninorth.h>
  45 #include <asm/io.h>
  46 #include <asm/prom.h>
  47 #include <asm/machdep.h>
  48 #include <asm/smu.h>
  49 #include <asm/pmac_pfunc.h>
  50 #include <asm/pmac_low_i2c.h>
  51
  52 #ifdef DEBUG
  53 #define DBG(x...) do {\
  54                 printk(KERN_DEBUG "low_i2c:" x);        \
  55         } while(0)
  56 #else
  57 #define DBG(x...)
  58 #endif
  59
  60 #ifdef DEBUG_LOW
  61 #define DBG_LOW(x...) do {\
  62                 printk(KERN_DEBUG "low_i2c:" x);        \
  63         } while(0)
  64 #else
  65 #define DBG_LOW(x...)
  66 #endif
  67
  68
  69 static int pmac_i2c_force_poll = 1;
  70
  71 /*
  72  * A bus structure. Each bus in the system has such a structure associated.
  73  */
  74 struct pmac_i2c_bus
  75 {
  76         struct list_head        link;
  77         struct device_node      *controller;
  78         struct device_node      *busnode;
  79         int                     type;
  80         int                     flags;
  81         struct i2c_adapter      adapter;
  82         void                    *hostdata;
  83         int                     channel;        /* some hosts have multiple */
  84         int                     mode;           /* current mode */
  85         struct mutex            mutex;
  86         int                     opened;
  87         int                     polled;         /* open mode */
  88         struct platform_device  *platform_dev;
  89         struct lock_class_key   lock_key;
  90
  91         /* ops */
  92         int (*open)(struct pmac_i2c_bus *bus);
  93         void (*close)(struct pmac_i2c_bus *bus);
  94         int (*xfer)(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
  95                     u32 subaddr, u8 *data, int len);
  96 };
  97
  98 static LIST_HEAD(pmac_i2c_busses);
  99
 100 /*
 101  * Keywest implementation
 102  */
 103
 104 struct pmac_i2c_host_kw
 105 {
 106         struct mutex            mutex;          /* Access mutex for use by
 107                                                  * i2c-keywest */
 108         void __iomem            *base;          /* register base address */
 109         int                     bsteps;         /* register stepping */
 110         int                     speed;          /* speed */
 111         int                     irq;
 112         u8                      *data;
 113         unsigned                len;
 114         int                     state;
 115         int                     rw;
 116         int                     polled;
 117         int                     result;
 118         struct completion       complete;
 119         spinlock_t              lock;
 120         struct timer_list       timeout_timer;
 121 };
 122
 123 /* Register indices */
 124 typedef enum {
 125         reg_mode = 0,
 126         reg_control,
 127         reg_status,
 128         reg_isr,
 129         reg_ier,
 130         reg_addr,
 131         reg_subaddr,
 132         reg_data
 133 } reg_t;
 134
 135 /* The Tumbler audio equalizer can be really slow sometimes */
 136 #define KW_POLL_TIMEOUT         (2*HZ)
 137
 138 /* Mode register */
 139 #define KW_I2C_MODE_100KHZ      0x00
 140 #define KW_I2C_MODE_50KHZ       0x01
 141 #define KW_I2C_MODE_25KHZ       0x02
 142 #define KW_I2C_MODE_DUMB        0x00
 143 #define KW_I2C_MODE_STANDARD    0x04
 144 #define KW_I2C_MODE_STANDARDSUB 0x08
 145 #define KW_I2C_MODE_COMBINED    0x0C
 146 #define KW_I2C_MODE_MODE_MASK   0x0C
 147 #define KW_I2C_MODE_CHAN_MASK   0xF0
 148
 149 /* Control register */
 150 #define KW_I2C_CTL_AAK          0x01
 151 #define KW_I2C_CTL_XADDR        0x02
 152 #define KW_I2C_CTL_STOP         0x04
 153 #define KW_I2C_CTL_START        0x08
 154
 155 /* Status register */
 156 #define KW_I2C_STAT_BUSY        0x01
 157 #define KW_I2C_STAT_LAST_AAK    0x02
 158 #define KW_I2C_STAT_LAST_RW     0x04
 159 #define KW_I2C_STAT_SDA         0x08
 160 #define KW_I2C_STAT_SCL         0x10
 161
 162 /* IER & ISR registers */
 163 #define KW_I2C_IRQ_DATA         0x01
 164 #define KW_I2C_IRQ_ADDR         0x02
 165 #define KW_I2C_IRQ_STOP         0x04
 166 #define KW_I2C_IRQ_START        0x08
 167 #define KW_I2C_IRQ_MASK         0x0F
 168
 169 /* State machine states */
 170 enum {
 171         state_idle,
 172         state_addr,
 173         state_read,
 174         state_write,
 175         state_stop,
 176         state_dead
 177 };
 178
 179 #define WRONG_STATE(name) do {\
 180                 printk(KERN_DEBUG "KW: wrong state. Got %s, state: %s " \
 181                        "(isr: %02x)\n", \
 182                        name, __kw_state_names[host->state], isr); \
 183         } while(0)
 184
 185 static const char *__kw_state_names[] = {
 186         "state_idle",
 187         "state_addr",
 188         "state_read",
 189         "state_write",
 190         "state_stop",
 191         "state_dead"
 192 };
 193
 194 static inline u8 __kw_read_reg(struct pmac_i2c_host_kw *host, reg_t reg)
 195 {
 196         return readb(host->base + (((unsigned int)reg) << host->bsteps));
 197 }
 198
 199 static inline void __kw_write_reg(struct pmac_i2c_host_kw *host,
 200                                   reg_t reg, u8 val)
 201 {
 202         writeb(val, host->base + (((unsigned)reg) << host->bsteps));
 203         (void)__kw_read_reg(host, reg_subaddr);
 204 }
 205
 206 #define kw_write_reg(reg, val)  __kw_write_reg(host, reg, val)
 207 #define kw_read_reg(reg)        __kw_read_reg(host, reg)
 208
 209 static u8 kw_i2c_wait_interrupt(struct pmac_i2c_host_kw *host)
 210 {
 211         int i, j;
 212         u8 isr;
 213
 214         for (i = 0; i < 1000; i++) {
 215                 isr = kw_read_reg(reg_isr) & KW_I2C_IRQ_MASK;
 216                 if (isr != 0)
 217                         return isr;
 218
 219                 /* This code is used with the timebase frozen, we cannot rely
 220                  * on udelay nor schedule when in polled mode !
 221                  * For now, just use a bogus loop....
 222                  */
 223                 if (host->polled) {
 224                         for (j = 1; j < 100000; j++)
 225                                 mb();
 226                 } else
 227                         msleep(1);
 228         }
 229         return isr;
 230 }
 231
 232 static void kw_i2c_do_stop(struct pmac_i2c_host_kw *host, int result)
 233 {
 234         kw_write_reg(reg_control, KW_I2C_CTL_STOP);
 235         host->state = state_stop;
 236         host->result = result;
 237 }
 238
 239
 240 static void kw_i2c_handle_interrupt(struct pmac_i2c_host_kw *host, u8 isr)
 241 {
 242         u8 ack;
 243
 244         DBG_LOW("kw_handle_interrupt(%s, isr: %x)\n",
 245                 __kw_state_names[host->state], isr);
 246
 247         if (host->state == state_idle) {
 248                 printk(KERN_WARNING "low_i2c: Keywest got an out of state"
 249                        " interrupt, ignoring\n");
 250                 kw_write_reg(reg_isr, isr);
 251                 return;
 252         }
 253
 254         if (isr == 0) {
 255                 printk(KERN_WARNING "low_i2c: Timeout in i2c transfer"
 256                        " on keywest !\n");
 257                 if (host->state != state_stop) {
 258                         kw_i2c_do_stop(host, -EIO);
 259                         return;
 260                 }
 261                 ack = kw_read_reg(reg_status);
 262                 if (ack & KW_I2C_STAT_BUSY)
 263                         kw_write_reg(reg_status, 0);
 264                 host->state = state_idle;
 265                 kw_write_reg(reg_ier, 0x00);
 266                 if (!host->polled)
 267                         complete(&host->complete);
 268                 return;
 269         }
 270
 271         if (isr & KW_I2C_IRQ_ADDR) {
 272                 ack = kw_read_reg(reg_status);
 273                 if (host->state != state_addr) {
 274                         WRONG_STATE("KW_I2C_IRQ_ADDR");
 275                         kw_i2c_do_stop(host, -EIO);
 276                 }
 277                 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
 278                         host->result = -ENXIO;
 279                         host->state = state_stop;
 280                         DBG_LOW("KW: NAK on address\n");
 281                 } else {
 282                         if (host->len == 0)
 283                                 kw_i2c_do_stop(host, 0);
 284                         else if (host->rw) {
 285                                 host->state = state_read;
 286                                 if (host->len > 1)
 287                                         kw_write_reg(reg_control,
 288                                                      KW_I2C_CTL_AAK);
 289                         } else {
 290                                 host->state = state_write;
 291                                 kw_write_reg(reg_data, *(host->data++));
 292                                 host->len--;
 293                         }
 294                 }
 295                 kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR);
 296         }
 297
 298         if (isr & KW_I2C_IRQ_DATA) {
 299                 if (host->state == state_read) {
 300                         *(host->data++) = kw_read_reg(reg_data);
 301                         host->len--;
 302                         kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
 303                         if (host->len == 0)
 304                                 host->state = state_stop;
 305                         else if (host->len == 1)
 306                                 kw_write_reg(reg_control, 0);
 307                 } else if (host->state == state_write) {
 308                         ack = kw_read_reg(reg_status);
 309                         if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
 310                                 DBG_LOW("KW: nack on data write\n");
 311                                 host->result = -EFBIG;
 312                                 host->state = state_stop;
 313                         } else if (host->len) {
 314                                 kw_write_reg(reg_data, *(host->data++));
 315                                 host->len--;
 316                         } else
 317                                 kw_i2c_do_stop(host, 0);
 318                 } else {
 319                         WRONG_STATE("KW_I2C_IRQ_DATA");
 320                         if (host->state != state_stop)
 321                                 kw_i2c_do_stop(host, -EIO);
 322                 }
 323                 kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
 324         }
 325
 326         if (isr & KW_I2C_IRQ_STOP) {
 327                 kw_write_reg(reg_isr, KW_I2C_IRQ_STOP);
 328                 if (host->state != state_stop) {
 329                         WRONG_STATE("KW_I2C_IRQ_STOP");
 330                         host->result = -EIO;
 331                 }
 332                 host->state = state_idle;
 333                 if (!host->polled)
 334                         complete(&host->complete);
 335         }
 336
 337         /* Below should only happen in manual mode which we don't use ... */
 338         if (isr & KW_I2C_IRQ_START)
 339                 kw_write_reg(reg_isr, KW_I2C_IRQ_START);
 340
 341 }
 342
 343 /* Interrupt handler */
 344 static irqreturn_t kw_i2c_irq(int irq, void *dev_id)
 345 {
 346         struct pmac_i2c_host_kw *host = dev_id;
 347         unsigned long flags;
 348
 349         spin_lock_irqsave(&host->lock, flags);
 350         del_timer(&host->timeout_timer);
 351         kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
 352         if (host->state != state_idle) {
 353                 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
 354                 add_timer(&host->timeout_timer);
 355         }
 356         spin_unlock_irqrestore(&host->lock, flags);
 357         return IRQ_HANDLED;
 358 }
 359
 360 static void kw_i2c_timeout(struct timer_list *t)
 361 {
 362         struct pmac_i2c_host_kw *host = from_timer(host, t, timeout_timer);
 363         unsigned long flags;
 364
 365         spin_lock_irqsave(&host->lock, flags);
 366
 367         /*
 368          * If the timer is pending, that means we raced with the
 369          * irq, in which case we just return
 370          */
 371         if (timer_pending(&host->timeout_timer))
 372                 goto skip;
 373
 374         kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
 375         if (host->state != state_idle) {
 376                 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
 377                 add_timer(&host->timeout_timer);
 378         }
 379  skip:
 380         spin_unlock_irqrestore(&host->lock, flags);
 381 }
 382
 383 static int kw_i2c_open(struct pmac_i2c_bus *bus)
 384 {
 385         struct pmac_i2c_host_kw *host = bus->hostdata;
 386         mutex_lock(&host->mutex);
 387         return 0;
 388 }
 389
 390 static void kw_i2c_close(struct pmac_i2c_bus *bus)
 391 {
 392         struct pmac_i2c_host_kw *host = bus->hostdata;
 393         mutex_unlock(&host->mutex);
 394 }
 395
 396 static int kw_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
 397                        u32 subaddr, u8 *data, int len)
 398 {
 399         struct pmac_i2c_host_kw *host = bus->hostdata;
 400         u8 mode_reg = host->speed;
 401         int use_irq = host->irq && !bus->polled;
 402
 403         /* Setup mode & subaddress if any */
 404         switch(bus->mode) {
 405         case pmac_i2c_mode_dumb:
 406                 return -EINVAL;
 407         case pmac_i2c_mode_std:
 408                 mode_reg |= KW_I2C_MODE_STANDARD;
 409                 if (subsize != 0)
 410                         return -EINVAL;
 411                 break;
 412         case pmac_i2c_mode_stdsub:
 413                 mode_reg |= KW_I2C_MODE_STANDARDSUB;
 414                 if (subsize != 1)
 415                         return -EINVAL;
 416                 break;
 417         case pmac_i2c_mode_combined:
 418                 mode_reg |= KW_I2C_MODE_COMBINED;
 419                 if (subsize != 1)
 420                         return -EINVAL;
 421                 break;
 422         }
 423
 424         /* Setup channel & clear pending irqs */
 425         kw_write_reg(reg_isr, kw_read_reg(reg_isr));
 426         kw_write_reg(reg_mode, mode_reg | (bus->channel << 4));
 427         kw_write_reg(reg_status, 0);
 428
 429         /* Set up address and r/w bit, strip possible stale bus number from
 430          * address top bits
 431          */
 432         kw_write_reg(reg_addr, addrdir & 0xff);
 433
 434         /* Set up the sub address */
 435         if ((mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB
 436             || (mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED)
 437                 kw_write_reg(reg_subaddr, subaddr);
 438
 439         /* Prepare for async operations */
 440         host->data = data;
 441         host->len = len;
 442         host->state = state_addr;
 443         host->result = 0;
 444         host->rw = (addrdir & 1);
 445         host->polled = bus->polled;
 446
 447         /* Enable interrupt if not using polled mode and interrupt is
 448          * available
 449          */
 450         if (use_irq) {
 451                 /* Clear completion */
 452                 reinit_completion(&host->complete);
 453                 /* Ack stale interrupts */
 454                 kw_write_reg(reg_isr, kw_read_reg(reg_isr));
 455                 /* Arm timeout */
 456                 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
 457                 add_timer(&host->timeout_timer);
 458                 /* Enable emission */
 459                 kw_write_reg(reg_ier, KW_I2C_IRQ_MASK);
 460         }
 461
 462         /* Start sending address */
 463         kw_write_reg(reg_control, KW_I2C_CTL_XADDR);
 464
 465         /* Wait for completion */
 466         if (use_irq)
 467                 wait_for_completion(&host->complete);
 468         else {
 469                 while(host->state != state_idle) {
 470                         unsigned long flags;
 471
 472                         u8 isr = kw_i2c_wait_interrupt(host);
 473                         spin_lock_irqsave(&host->lock, flags);
 474                         kw_i2c_handle_interrupt(host, isr);
 475                         spin_unlock_irqrestore(&host->lock, flags);
 476                 }
 477         }
 478
 479         /* Disable emission */
 480         kw_write_reg(reg_ier, 0);
 481
 482         return host->result;
 483 }
 484
 485 static struct pmac_i2c_host_kw *__init kw_i2c_host_init(struct device_node *np)
 486 {
 487         struct pmac_i2c_host_kw *host;
 488         const u32               *psteps, *prate, *addrp;
 489         u32                     steps;
 490
 491         host = kzalloc(sizeof(*host), GFP_KERNEL);
 492         if (host == NULL) {
 493                 printk(KERN_ERR "low_i2c: Can't allocate host for %pOF\n",
 494                        np);
 495                 return NULL;
 496         }
 497
 498         /* Apple is kind enough to provide a valid AAPL,address property
 499          * on all i2c keywest nodes so far ... we would have to fallback
 500          * to macio parsing if that wasn't the case
 501          */
 502         addrp = of_get_property(np, "AAPL,address", NULL);
 503         if (addrp == NULL) {
 504                 printk(KERN_ERR "low_i2c: Can't find address for %pOF\n",
 505                        np);
 506                 kfree(host);
 507                 return NULL;
 508         }
 509         mutex_init(&host->mutex);
 510         init_completion(&host->complete);
 511         spin_lock_init(&host->lock);
 512         timer_setup(&host->timeout_timer, kw_i2c_timeout, 0);
 513
 514         psteps = of_get_property(np, "AAPL,address-step", NULL);
 515         steps = psteps ? (*psteps) : 0x10;
 516         for (host->bsteps = 0; (steps & 0x01) == 0; host->bsteps++)
 517                 steps >>= 1;
 518         /* Select interface rate */
 519         host->speed = KW_I2C_MODE_25KHZ;
 520         prate = of_get_property(np, "AAPL,i2c-rate", NULL);
 521         if (prate) switch(*prate) {
 522         case 100:
 523                 host->speed = KW_I2C_MODE_100KHZ;
 524                 break;
 525         case 50:
 526                 host->speed = KW_I2C_MODE_50KHZ;
 527                 break;
 528         case 25:
 529                 host->speed = KW_I2C_MODE_25KHZ;
 530                 break;
 531         }
 532         host->irq = irq_of_parse_and_map(np, 0);
 533         if (!host->irq)
 534                 printk(KERN_WARNING
 535                        "low_i2c: Failed to map interrupt for %pOF\n",
 536                        np);
 537
 538         host->base = ioremap((*addrp), 0x1000);
 539         if (host->base == NULL) {
 540                 printk(KERN_ERR "low_i2c: Can't map registers for %pOF\n",
 541                        np);
 542                 kfree(host);
 543                 return NULL;
 544         }
 545
 546         /* Make sure IRQ is disabled */
 547         kw_write_reg(reg_ier, 0);
 548
 549         /* Request chip interrupt. We set IRQF_NO_SUSPEND because we don't
 550          * want that interrupt disabled between the 2 passes of driver
 551          * suspend or we'll have issues running the pfuncs
 552          */
 553         if (request_irq(host->irq, kw_i2c_irq, IRQF_NO_SUSPEND,
 554                         "keywest i2c", host))
 555                 host->irq = 0;
 556
 557         printk(KERN_INFO "KeyWest i2c @0x%08x irq %d %pOF\n",
 558                *addrp, host->irq, np);
 559
 560         return host;
 561 }
 562
 563
 564 static void __init kw_i2c_add(struct pmac_i2c_host_kw *host,
 565                               struct device_node *controller,
 566                               struct device_node *busnode,
 567                               int channel)
 568 {
 569         struct pmac_i2c_bus *bus;
 570
 571         bus = kzalloc(sizeof(struct pmac_i2c_bus), GFP_KERNEL);
 572         if (bus == NULL)
 573                 return;
 574
 575         bus->controller = of_node_get(controller);
 576         bus->busnode = of_node_get(busnode);
 577         bus->type = pmac_i2c_bus_keywest;
 578         bus->hostdata = host;
 579         bus->channel = channel;
 580         bus->mode = pmac_i2c_mode_std;
 581         bus->open = kw_i2c_open;
 582         bus->close = kw_i2c_close;
 583         bus->xfer = kw_i2c_xfer;
 584         mutex_init(&bus->mutex);
 585         lockdep_set_class(&bus->mutex, &bus->lock_key);
 586         if (controller == busnode)
 587                 bus->flags = pmac_i2c_multibus;
 588         list_add(&bus->link, &pmac_i2c_busses);
 589
 590         printk(KERN_INFO " channel %d bus %s\n", channel,
 591                (controller == busnode) ? "<multibus>" : busnode->full_name);
 592 }
 593
 594 static void __init kw_i2c_probe(void)
 595 {
 596         struct device_node *np, *child, *parent;
 597
 598         /* Probe keywest-i2c busses */
 599         for_each_compatible_node(np, "i2c","keywest-i2c") {
 600                 struct pmac_i2c_host_kw *host;
 601                 int multibus;
 602
 603                 /* Found one, init a host structure */
 604                 host = kw_i2c_host_init(np);
 605                 if (host == NULL)
 606                         continue;
 607
 608                 /* Now check if we have a multibus setup (old style) or if we
 609                  * have proper bus nodes. Note that the "new" way (proper bus
 610                  * nodes) might cause us to not create some busses that are
 611                  * kept hidden in the device-tree. In the future, we might
 612                  * want to work around that by creating busses without a node
 613                  * but not for now
 614                  */
 615                 child = of_get_next_child(np, NULL);
 616                 multibus = !of_node_name_eq(child, "i2c-bus");
 617                 of_node_put(child);
 618
 619                 /* For a multibus setup, we get the bus count based on the
 620                  * parent type
 621                  */
 622                 if (multibus) {
 623                         int chans, i;
 624
 625                         parent = of_get_parent(np);
 626                         if (parent == NULL)
 627                                 continue;
 628                         chans = parent->name[0] == 'u' ? 2 : 1;
 629                         for (i = 0; i < chans; i++)
 630                                 kw_i2c_add(host, np, np, i);
 631                 } else {
 632                         for (child = NULL;
 633                              (child = of_get_next_child(np, child)) != NULL;) {
 634                                 const u32 *reg = of_get_property(child,
 635                                                 "reg", NULL);
 636                                 if (reg == NULL)
 637                                         continue;
 638                                 kw_i2c_add(host, np, child, *reg);
 639                         }
 640                 }
 641         }
 642 }
 643
 644
 645 /*
 646  *
 647  * PMU implementation
 648  *
 649  */
 650
 651 #ifdef CONFIG_ADB_PMU
 652
 653 /*
 654  * i2c command block to the PMU
 655  */
 656 struct pmu_i2c_hdr {
 657         u8      bus;
 658         u8      mode;
 659         u8      bus2;
 660         u8      address;
 661         u8      sub_addr;
 662         u8      comb_addr;
 663         u8      count;
 664         u8      data[];
 665 };
 666
 667 static void pmu_i2c_complete(struct adb_request *req)
 668 {
 669         complete(req->arg);
 670 }
 671
 672 static int pmu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
 673                         u32 subaddr, u8 *data, int len)
 674 {
 675         struct adb_request *req = bus->hostdata;
 676         struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req->data[1];
 677         struct completion comp;
 678         int read = addrdir & 1;
 679         int retry;
 680         int rc = 0;
 681
 682         /* For now, limit ourselves to 16 bytes transfers */
 683         if (len > 16)
 684                 return -EINVAL;
 685
 686         init_completion(&comp);
 687
 688         for (retry = 0; retry < 16; retry++) {
 689                 memset(req, 0, sizeof(struct adb_request));
 690                 hdr->bus = bus->channel;
 691                 hdr->count = len;
 692
 693                 switch(bus->mode) {
 694                 case pmac_i2c_mode_std:
 695                         if (subsize != 0)
 696                                 return -EINVAL;
 697                         hdr->address = addrdir;
 698                         hdr->mode = PMU_I2C_MODE_SIMPLE;
 699                         break;
 700                 case pmac_i2c_mode_stdsub:
 701                 case pmac_i2c_mode_combined:
 702                         if (subsize != 1)
 703                                 return -EINVAL;
 704                         hdr->address = addrdir & 0xfe;
 705                         hdr->comb_addr = addrdir;
 706                         hdr->sub_addr = subaddr;
 707                         if (bus->mode == pmac_i2c_mode_stdsub)
 708                                 hdr->mode = PMU_I2C_MODE_STDSUB;
 709                         else
 710                                 hdr->mode = PMU_I2C_MODE_COMBINED;
 711                         break;
 712                 default:
 713                         return -EINVAL;
 714                 }
 715
 716                 reinit_completion(&comp);
 717                 req->data[0] = PMU_I2C_CMD;
 718                 req->reply[0] = 0xff;
 719                 req->nbytes = sizeof(struct pmu_i2c_hdr) + 1;
 720                 req->done = pmu_i2c_complete;
 721                 req->arg = &comp;
 722                 if (!read && len) {
 723                         memcpy(hdr->data, data, len);
 724                         req->nbytes += len;
 725                 }
 726                 rc = pmu_queue_request(req);
 727                 if (rc)
 728                         return rc;
 729                 wait_for_completion(&comp);
 730                 if (req->reply[0] == PMU_I2C_STATUS_OK)
 731                         break;
 732                 msleep(15);
 733         }
 734         if (req->reply[0] != PMU_I2C_STATUS_OK)
 735                 return -EIO;
 736
 737         for (retry = 0; retry < 16; retry++) {
 738                 memset(req, 0, sizeof(struct adb_request));
 739
 740                 /* I know that looks like a lot, slow as hell, but darwin
 741                  * does it so let's be on the safe side for now
 742                  */
 743                 msleep(15);
 744
 745                 hdr->bus = PMU_I2C_BUS_STATUS;
 746
 747                 reinit_completion(&comp);
 748                 req->data[0] = PMU_I2C_CMD;
 749                 req->reply[0] = 0xff;
 750                 req->nbytes = 2;
 751                 req->done = pmu_i2c_complete;
 752                 req->arg = &comp;
 753                 rc = pmu_queue_request(req);
 754                 if (rc)
 755                         return rc;
 756                 wait_for_completion(&comp);
 757
 758                 if (req->reply[0] == PMU_I2C_STATUS_OK && !read)
 759                         return 0;
 760                 if (req->reply[0] == PMU_I2C_STATUS_DATAREAD && read) {
 761                         int rlen = req->reply_len - 1;
 762
 763                         if (rlen != len) {
 764                                 printk(KERN_WARNING "low_i2c: PMU returned %d"
 765                                        " bytes, expected %d !\n", rlen, len);
 766                                 return -EIO;
 767                         }
 768                         if (len)
 769                                 memcpy(data, &req->reply[1], len);
 770                         return 0;
 771                 }
 772         }
 773         return -EIO;
 774 }
 775
 776 static void __init pmu_i2c_probe(void)
 777 {
 778         struct pmac_i2c_bus *bus;
 779         struct device_node *busnode;
 780         int channel, sz;
 781
 782         if (!pmu_present())
 783                 return;
 784
 785         /* There might or might not be a "pmu-i2c" node, we use that
 786          * or via-pmu itself, whatever we find. I haven't seen a machine
 787          * with separate bus nodes, so we assume a multibus setup
 788          */
 789         busnode = of_find_node_by_name(NULL, "pmu-i2c");
 790         if (busnode == NULL)
 791                 busnode = of_find_node_by_name(NULL, "via-pmu");
 792         if (busnode == NULL)
 793                 return;
 794
 795         printk(KERN_INFO "PMU i2c %pOF\n", busnode);
 796
 797         /*
 798          * We add bus 1 and 2 only for now, bus 0 is "special"
 799          */
 800         for (channel = 1; channel <= 2; channel++) {
 801                 sz = sizeof(struct pmac_i2c_bus) + sizeof(struct adb_request);
 802                 bus = kzalloc(sz, GFP_KERNEL);
 803                 if (bus == NULL)
 804                         return;
 805
 806                 bus->controller = busnode;
 807                 bus->busnode = busnode;
 808                 bus->type = pmac_i2c_bus_pmu;
 809                 bus->channel = channel;
 810                 bus->mode = pmac_i2c_mode_std;
 811                 bus->hostdata = bus + 1;
 812                 bus->xfer = pmu_i2c_xfer;
 813                 mutex_init(&bus->mutex);
 814                 lockdep_set_class(&bus->mutex, &bus->lock_key);
 815                 bus->flags = pmac_i2c_multibus;
 816                 list_add(&bus->link, &pmac_i2c_busses);
 817
 818                 printk(KERN_INFO " channel %d bus <multibus>\n", channel);
 819         }
 820 }
 821
 822 #endif /* CONFIG_ADB_PMU */
 823
 824
 825 /*
 826  *
 827  * SMU implementation
 828  *
 829  */
 830
 831 #ifdef CONFIG_PMAC_SMU
 832
 833 static void smu_i2c_complete(struct smu_i2c_cmd *cmd, void *misc)
 834 {
 835         complete(misc);
 836 }
 837
 838 static int smu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
 839                         u32 subaddr, u8 *data, int len)
 840 {
 841         struct smu_i2c_cmd *cmd = bus->hostdata;
 842         struct completion comp;
 843         int read = addrdir & 1;
 844         int rc = 0;
 845
 846         if ((read && len > SMU_I2C_READ_MAX) ||
 847             ((!read) && len > SMU_I2C_WRITE_MAX))
 848                 return -EINVAL;
 849
 850         memset(cmd, 0, sizeof(struct smu_i2c_cmd));
 851         cmd->info.bus = bus->channel;
 852         cmd->info.devaddr = addrdir;
 853         cmd->info.datalen = len;
 854
 855         switch(bus->mode) {
 856         case pmac_i2c_mode_std:
 857                 if (subsize != 0)
 858                         return -EINVAL;
 859                 cmd->info.type = SMU_I2C_TRANSFER_SIMPLE;
 860                 break;
 861         case pmac_i2c_mode_stdsub:
 862         case pmac_i2c_mode_combined:
 863                 if (subsize > 3 || subsize < 1)
 864                         return -EINVAL;
 865                 cmd->info.sublen = subsize;
 866                 /* that's big-endian only but heh ! */
 867                 memcpy(&cmd->info.subaddr, ((char *)&subaddr) + (4 - subsize),
 868                        subsize);
 869                 if (bus->mode == pmac_i2c_mode_stdsub)
 870                         cmd->info.type = SMU_I2C_TRANSFER_STDSUB;
 871                 else
 872                         cmd->info.type = SMU_I2C_TRANSFER_COMBINED;
 873                 break;
 874         default:
 875                 return -EINVAL;
 876         }
 877         if (!read && len)
 878                 memcpy(cmd->info.data, data, len);
 879
 880         init_completion(&comp);
 881         cmd->done = smu_i2c_complete;
 882         cmd->misc = &comp;
 883         rc = smu_queue_i2c(cmd);
 884         if (rc < 0)
 885                 return rc;
 886         wait_for_completion(&comp);
 887         rc = cmd->status;
 888
 889         if (read && len)
 890                 memcpy(data, cmd->info.data, len);
 891         return rc < 0 ? rc : 0;
 892 }
 893
 894 static void __init smu_i2c_probe(void)
 895 {
 896         struct device_node *controller, *busnode;
 897         struct pmac_i2c_bus *bus;
 898         const u32 *reg;
 899         int sz;
 900
 901         if (!smu_present())
 902                 return;
 903
 904         controller = of_find_node_by_name(NULL, "smu-i2c-control");
 905         if (controller == NULL)
 906                 controller = of_find_node_by_name(NULL, "smu");
 907         if (controller == NULL)
 908                 return;
 909
 910         printk(KERN_INFO "SMU i2c %pOF\n", controller);
 911
 912         /* Look for childs, note that they might not be of the right
 913          * type as older device trees mix i2c busses and other things
 914          * at the same level
 915          */
 916         for_each_child_of_node(controller, busnode) {
 917                 if (!of_node_is_type(busnode, "i2c") &&
 918                     !of_node_is_type(busnode, "i2c-bus"))
 919                         continue;
 920                 reg = of_get_property(busnode, "reg", NULL);
 921                 if (reg == NULL)
 922                         continue;
 923
 924                 sz = sizeof(struct pmac_i2c_bus) + sizeof(struct smu_i2c_cmd);
 925                 bus = kzalloc(sz, GFP_KERNEL);
 926                 if (bus == NULL)
 927                         return;
 928
 929                 bus->controller = controller;
 930                 bus->busnode = of_node_get(busnode);
 931                 bus->type = pmac_i2c_bus_smu;
 932                 bus->channel = *reg;
 933                 bus->mode = pmac_i2c_mode_std;
 934                 bus->hostdata = bus + 1;
 935                 bus->xfer = smu_i2c_xfer;
 936                 mutex_init(&bus->mutex);
 937                 lockdep_set_class(&bus->mutex, &bus->lock_key);
 938                 bus->flags = 0;
 939                 list_add(&bus->link, &pmac_i2c_busses);
 940
 941                 printk(KERN_INFO " channel %x bus %pOF\n",
 942                        bus->channel, busnode);
 943         }
 944 }
 945
 946 #endif /* CONFIG_PMAC_SMU */
 947
 948 /*
 949  *
 950  * Core code
 951  *
 952  */
 953
 954
 955 struct pmac_i2c_bus *pmac_i2c_find_bus(struct device_node *node)
 956 {
 957         struct device_node *p = of_node_get(node);
 958         struct device_node *prev = NULL;
 959         struct pmac_i2c_bus *bus;
 960
 961         while(p) {
 962                 list_for_each_entry(bus, &pmac_i2c_busses, link) {
 963                         if (p == bus->busnode) {
 964                                 if (prev && bus->flags & pmac_i2c_multibus) {
 965                                         const u32 *reg;
 966                                         reg = of_get_property(prev, "reg",
 967                                                                 NULL);
 968                                         if (!reg)
 969                                                 continue;
 970                                         if (((*reg) >> 8) != bus->channel)
 971                                                 continue;
 972                                 }
 973                                 of_node_put(p);
 974                                 of_node_put(prev);
 975                                 return bus;
 976                         }
 977                 }
 978                 of_node_put(prev);
 979                 prev = p;
 980                 p = of_get_parent(p);
 981         }
 982         return NULL;
 983 }
 984 EXPORT_SYMBOL_GPL(pmac_i2c_find_bus);
 985
 986 u8 pmac_i2c_get_dev_addr(struct device_node *device)
 987 {
 988         const u32 *reg = of_get_property(device, "reg", NULL);
 989
 990         if (reg == NULL)
 991                 return 0;
 992
 993         return (*reg) & 0xff;
 994 }
 995 EXPORT_SYMBOL_GPL(pmac_i2c_get_dev_addr);
 996
 997 struct device_node *pmac_i2c_get_controller(struct pmac_i2c_bus *bus)
 998 {
 999         return bus->controller;
1000 }
1001 EXPORT_SYMBOL_GPL(pmac_i2c_get_controller);
1002
1003 struct device_node *pmac_i2c_get_bus_node(struct pmac_i2c_bus *bus)
1004 {
1005         return bus->busnode;
1006 }
1007 EXPORT_SYMBOL_GPL(pmac_i2c_get_bus_node);
1008
1009 int pmac_i2c_get_type(struct pmac_i2c_bus *bus)
1010 {
1011         return bus->type;
1012 }
1013 EXPORT_SYMBOL_GPL(pmac_i2c_get_type);
1014
1015 int pmac_i2c_get_flags(struct pmac_i2c_bus *bus)
1016 {
1017         return bus->flags;
1018 }
1019 EXPORT_SYMBOL_GPL(pmac_i2c_get_flags);
1020
1021 int pmac_i2c_get_channel(struct pmac_i2c_bus *bus)
1022 {
1023         return bus->channel;
1024 }
1025 EXPORT_SYMBOL_GPL(pmac_i2c_get_channel);
1026
1027
1028 struct i2c_adapter *pmac_i2c_get_adapter(struct pmac_i2c_bus *bus)
1029 {
1030         return &bus->adapter;
1031 }
1032 EXPORT_SYMBOL_GPL(pmac_i2c_get_adapter);
1033
1034 struct pmac_i2c_bus *pmac_i2c_adapter_to_bus(struct i2c_adapter *adapter)
1035 {
1036         struct pmac_i2c_bus *bus;
1037
1038         list_for_each_entry(bus, &pmac_i2c_busses, link)
1039                 if (&bus->adapter == adapter)
1040                         return bus;
1041         return NULL;
1042 }
1043 EXPORT_SYMBOL_GPL(pmac_i2c_adapter_to_bus);
1044
1045 int pmac_i2c_match_adapter(struct device_node *dev, struct i2c_adapter *adapter)
1046 {
1047         struct pmac_i2c_bus *bus = pmac_i2c_find_bus(dev);
1048
1049         if (bus == NULL)
1050                 return 0;
1051         return (&bus->adapter == adapter);
1052 }
1053 EXPORT_SYMBOL_GPL(pmac_i2c_match_adapter);
1054
1055 int pmac_low_i2c_lock(struct device_node *np)
1056 {
1057         struct pmac_i2c_bus *bus, *found = NULL;
1058
1059         list_for_each_entry(bus, &pmac_i2c_busses, link) {
1060                 if (np == bus->controller) {
1061                         found = bus;
1062                         break;
1063                 }
1064         }
1065         if (!found)
1066                 return -ENODEV;
1067         return pmac_i2c_open(bus, 0);
1068 }
1069 EXPORT_SYMBOL_GPL(pmac_low_i2c_lock);
1070
1071 int pmac_low_i2c_unlock(struct device_node *np)
1072 {
1073         struct pmac_i2c_bus *bus, *found = NULL;
1074
1075         list_for_each_entry(bus, &pmac_i2c_busses, link) {
1076                 if (np == bus->controller) {
1077                         found = bus;
1078                         break;
1079                 }
1080         }
1081         if (!found)
1082                 return -ENODEV;
1083         pmac_i2c_close(bus);
1084         return 0;
1085 }
1086 EXPORT_SYMBOL_GPL(pmac_low_i2c_unlock);
1087
1088
1089 int pmac_i2c_open(struct pmac_i2c_bus *bus, int polled)
1090 {
1091         int rc;
1092
1093         mutex_lock(&bus->mutex);
1094         bus->polled = polled || pmac_i2c_force_poll;
1095         bus->opened = 1;
1096         bus->mode = pmac_i2c_mode_std;
1097         if (bus->open && (rc = bus->open(bus)) != 0) {
1098                 bus->opened = 0;
1099                 mutex_unlock(&bus->mutex);
1100                 return rc;
1101         }
1102         return 0;
1103 }
1104 EXPORT_SYMBOL_GPL(pmac_i2c_open);
1105
1106 void pmac_i2c_close(struct pmac_i2c_bus *bus)
1107 {
1108         WARN_ON(!bus->opened);
1109         if (bus->close)
1110                 bus->close(bus);
1111         bus->opened = 0;
1112         mutex_unlock(&bus->mutex);
1113 }
1114 EXPORT_SYMBOL_GPL(pmac_i2c_close);
1115
1116 int pmac_i2c_setmode(struct pmac_i2c_bus *bus, int mode)
1117 {
1118         WARN_ON(!bus->opened);
1119
1120         /* Report me if you see the error below as there might be a new
1121          * "combined4" mode that I need to implement for the SMU bus
1122          */
1123         if (mode < pmac_i2c_mode_dumb || mode > pmac_i2c_mode_combined) {
1124                 printk(KERN_ERR "low_i2c: Invalid mode %d requested on"
1125                        " bus %pOF !\n", mode, bus->busnode);
1126                 return -EINVAL;
1127         }
1128         bus->mode = mode;
1129
1130         return 0;
1131 }
1132 EXPORT_SYMBOL_GPL(pmac_i2c_setmode);
1133
1134 int pmac_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
1135                   u32 subaddr, u8 *data, int len)
1136 {
1137         int rc;
1138
1139         WARN_ON(!bus->opened);
1140
1141         DBG("xfer() chan=%d, addrdir=0x%x, mode=%d, subsize=%d, subaddr=0x%x,"
1142             " %d bytes, bus %pOF\n", bus->channel, addrdir, bus->mode, subsize,
1143             subaddr, len, bus->busnode);
1144
1145         rc = bus->xfer(bus, addrdir, subsize, subaddr, data, len);
1146
1147 #ifdef DEBUG
1148         if (rc)
1149                 DBG("xfer error %d\n", rc);
1150 #endif
1151         return rc;
1152 }
1153 EXPORT_SYMBOL_GPL(pmac_i2c_xfer);
1154
1155 /* some quirks for platform function decoding */
1156 enum {
1157         pmac_i2c_quirk_invmask = 0x00000001u,
1158         pmac_i2c_quirk_skip = 0x00000002u,
1159 };
1160
1161 static void pmac_i2c_devscan(void (*callback)(struct device_node *dev,
1162                                               int quirks))
1163 {
1164         struct pmac_i2c_bus *bus;
1165         struct device_node *np;
1166         static struct whitelist_ent {
1167                 char *name;
1168                 char *compatible;
1169                 int quirks;
1170         } whitelist[] = {
1171                 /* XXX Study device-tree's & apple drivers are get the quirks
1172                  * right !
1173                  */
1174                 /* Workaround: It seems that running the clockspreading
1175                  * properties on the eMac will cause lockups during boot.
1176                  * The machine seems to work fine without that. So for now,
1177                  * let's make sure i2c-hwclock doesn't match about "imic"
1178                  * clocks and we'll figure out if we really need to do
1179                  * something special about those later.
1180                  */
1181                 { "i2c-hwclock", "imic5002", pmac_i2c_quirk_skip },
1182                 { "i2c-hwclock", "imic5003", pmac_i2c_quirk_skip },
1183                 { "i2c-hwclock", NULL, pmac_i2c_quirk_invmask },
1184                 { "i2c-cpu-voltage", NULL, 0},
1185                 {  "temp-monitor", NULL, 0 },
1186                 {  "supply-monitor", NULL, 0 },
1187                 { NULL, NULL, 0 },
1188         };
1189
1190         /* Only some devices need to have platform functions instantiated
1191          * here. For now, we have a table. Others, like 9554 i2c GPIOs used
1192          * on Xserve, if we ever do a driver for them, will use their own
1193          * platform function instance
1194          */
1195         list_for_each_entry(bus, &pmac_i2c_busses, link) {
1196                 for (np = NULL;
1197                      (np = of_get_next_child(bus->busnode, np)) != NULL;) {
1198                         struct whitelist_ent *p;
1199                         /* If multibus, check if device is on that bus */
1200                         if (bus->flags & pmac_i2c_multibus)
1201                                 if (bus != pmac_i2c_find_bus(np))
1202                                         continue;
1203                         for (p = whitelist; p->name != NULL; p++) {
1204                                 if (!of_node_name_eq(np, p->name))
1205                                         continue;
1206                                 if (p->compatible &&
1207                                     !of_device_is_compatible(np, p->compatible))
1208                                         continue;
1209                                 if (p->quirks & pmac_i2c_quirk_skip)
1210                                         break;
1211                                 callback(np, p->quirks);
1212                                 break;
1213                         }
1214                 }
1215         }
1216 }
1217
1218 #define MAX_I2C_DATA    64
1219
1220 struct pmac_i2c_pf_inst
1221 {
1222         struct pmac_i2c_bus     *bus;
1223         u8                      addr;
1224         u8                      buffer[MAX_I2C_DATA];
1225         u8                      scratch[MAX_I2C_DATA];
1226         int                     bytes;
1227         int                     quirks;
1228 };
1229
1230 static void* pmac_i2c_do_begin(struct pmf_function *func, struct pmf_args *args)
1231 {
1232         struct pmac_i2c_pf_inst *inst;
1233         struct pmac_i2c_bus     *bus;
1234
1235         bus = pmac_i2c_find_bus(func->node);
1236         if (bus == NULL) {
1237                 printk(KERN_ERR "low_i2c: Can't find bus for %pOF (pfunc)\n",
1238                        func->node);
1239                 return NULL;
1240         }
1241         if (pmac_i2c_open(bus, 0)) {
1242                 printk(KERN_ERR "low_i2c: Can't open i2c bus for %pOF (pfunc)\n",
1243                        func->node);
1244                 return NULL;
1245         }
1246
1247         /* XXX might need GFP_ATOMIC when called during the suspend process,
1248          * but then, there are already lots of issues with suspending when
1249          * near OOM that need to be resolved, the allocator itself should
1250          * probably make GFP_NOIO implicit during suspend
1251          */
1252         inst = kzalloc(sizeof(struct pmac_i2c_pf_inst), GFP_KERNEL);
1253         if (inst == NULL) {
1254                 pmac_i2c_close(bus);
1255                 return NULL;
1256         }
1257         inst->bus = bus;
1258         inst->addr = pmac_i2c_get_dev_addr(func->node);
1259         inst->quirks = (int)(long)func->driver_data;
1260         return inst;
1261 }
1262
1263 static void pmac_i2c_do_end(struct pmf_function *func, void *instdata)
1264 {
1265         struct pmac_i2c_pf_inst *inst = instdata;
1266
1267         if (inst == NULL)
1268                 return;
1269         pmac_i2c_close(inst->bus);
1270         kfree(inst);
1271 }
1272
1273 static int pmac_i2c_do_read(PMF_STD_ARGS, u32 len)
1274 {
1275         struct pmac_i2c_pf_inst *inst = instdata;
1276
1277         inst->bytes = len;
1278         return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 0, 0,
1279                              inst->buffer, len);
1280 }
1281
1282 static int pmac_i2c_do_write(PMF_STD_ARGS, u32 len, const u8 *data)
1283 {
1284         struct pmac_i2c_pf_inst *inst = instdata;
1285
1286         return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0,
1287                              (u8 *)data, len);
1288 }
1289
1290 /* This function is used to do the masking & OR'ing for the "rmw" type
1291  * callbacks. Ze should apply the mask and OR in the values in the
1292  * buffer before writing back. The problem is that it seems that
1293  * various darwin drivers implement the mask/or differently, thus
1294  * we need to check the quirks first
1295  */
1296 static void pmac_i2c_do_apply_rmw(struct pmac_i2c_pf_inst *inst,
1297                                   u32 len, const u8 *mask, const u8 *val)
1298 {
1299         int i;
1300
1301         if (inst->quirks & pmac_i2c_quirk_invmask) {
1302                 for (i = 0; i < len; i ++)
1303                         inst->scratch[i] = (inst->buffer[i] & mask[i]) | val[i];
1304         } else {
1305                 for (i = 0; i < len; i ++)
1306                         inst->scratch[i] = (inst->buffer[i] & ~mask[i])
1307                                 | (val[i] & mask[i]);
1308         }
1309 }
1310
1311 static int pmac_i2c_do_rmw(PMF_STD_ARGS, u32 masklen, u32 valuelen,
1312                            u32 totallen, const u8 *maskdata,
1313                            const u8 *valuedata)
1314 {
1315         struct pmac_i2c_pf_inst *inst = instdata;
1316
1317         if (masklen > inst->bytes || valuelen > inst->bytes ||
1318             totallen > inst->bytes || valuelen > masklen)
1319                 return -EINVAL;
1320
1321         pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata);
1322
1323         return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0,
1324                              inst->scratch, totallen);
1325 }
1326
1327 static int pmac_i2c_do_read_sub(PMF_STD_ARGS, u8 subaddr, u32 len)
1328 {
1329         struct pmac_i2c_pf_inst *inst = instdata;
1330
1331         inst->bytes = len;
1332         return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 1, subaddr,
1333                              inst->buffer, len);
1334 }
1335
1336 static int pmac_i2c_do_write_sub(PMF_STD_ARGS, u8 subaddr, u32 len,
1337                                      const u8 *data)
1338 {
1339         struct pmac_i2c_pf_inst *inst = instdata;
1340
1341         return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1,
1342                              subaddr, (u8 *)data, len);
1343 }
1344
1345 static int pmac_i2c_do_set_mode(PMF_STD_ARGS, int mode)
1346 {
1347         struct pmac_i2c_pf_inst *inst = instdata;
1348
1349         return pmac_i2c_setmode(inst->bus, mode);
1350 }
1351
1352 static int pmac_i2c_do_rmw_sub(PMF_STD_ARGS, u8 subaddr, u32 masklen,
1353                                u32 valuelen, u32 totallen, const u8 *maskdata,
1354                                const u8 *valuedata)
1355 {
1356         struct pmac_i2c_pf_inst *inst = instdata;
1357
1358         if (masklen > inst->bytes || valuelen > inst->bytes ||
1359             totallen > inst->bytes || valuelen > masklen)
1360                 return -EINVAL;
1361
1362         pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata);
1363
1364         return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1,
1365                              subaddr, inst->scratch, totallen);
1366 }
1367
1368 static int pmac_i2c_do_mask_and_comp(PMF_STD_ARGS, u32 len,
1369                                      const u8 *maskdata,
1370                                      const u8 *valuedata)
1371 {
1372         struct pmac_i2c_pf_inst *inst = instdata;
1373         int i, match;
1374
1375         /* Get return value pointer, it's assumed to be a u32 */
1376         if (!args || !args->count || !args->u[0].p)
1377                 return -EINVAL;
1378
1379         /* Check buffer */
1380         if (len > inst->bytes)
1381                 return -EINVAL;
1382
1383         for (i = 0, match = 1; match && i < len; i ++)
1384                 if ((inst->buffer[i] & maskdata[i]) != valuedata[i])
1385                         match = 0;
1386         *args->u[0].p = match;
1387         return 0;
1388 }
1389
1390 static int pmac_i2c_do_delay(PMF_STD_ARGS, u32 duration)
1391 {
1392         msleep((duration + 999) / 1000);
1393         return 0;
1394 }
1395
1396
1397 static struct pmf_handlers pmac_i2c_pfunc_handlers = {
1398         .begin                  = pmac_i2c_do_begin,
1399         .end                    = pmac_i2c_do_end,
1400         .read_i2c               = pmac_i2c_do_read,
1401         .write_i2c              = pmac_i2c_do_write,
1402         .rmw_i2c                = pmac_i2c_do_rmw,
1403         .read_i2c_sub           = pmac_i2c_do_read_sub,
1404         .write_i2c_sub          = pmac_i2c_do_write_sub,
1405         .rmw_i2c_sub            = pmac_i2c_do_rmw_sub,
1406         .set_i2c_mode           = pmac_i2c_do_set_mode,
1407         .mask_and_compare       = pmac_i2c_do_mask_and_comp,
1408         .delay                  = pmac_i2c_do_delay,
1409 };
1410
1411 static void __init pmac_i2c_dev_create(struct device_node *np, int quirks)
1412 {
1413         DBG("dev_create(%pOF)\n", np);
1414
1415         pmf_register_driver(np, &pmac_i2c_pfunc_handlers,
1416                             (void *)(long)quirks);
1417 }
1418
1419 static void __init pmac_i2c_dev_init(struct device_node *np, int quirks)
1420 {
1421         DBG("dev_create(%pOF)\n", np);
1422
1423         pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_INIT, NULL);
1424 }
1425
1426 static void pmac_i2c_dev_suspend(struct device_node *np, int quirks)
1427 {
1428         DBG("dev_suspend(%pOF)\n", np);
1429         pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_SLEEP, NULL);
1430 }
1431
1432 static void pmac_i2c_dev_resume(struct device_node *np, int quirks)
1433 {
1434         DBG("dev_resume(%pOF)\n", np);
1435         pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_WAKE, NULL);
1436 }
1437
1438 void pmac_pfunc_i2c_suspend(void)
1439 {
1440         pmac_i2c_devscan(pmac_i2c_dev_suspend);
1441 }
1442
1443 void pmac_pfunc_i2c_resume(void)
1444 {
1445         pmac_i2c_devscan(pmac_i2c_dev_resume);
1446 }
1447
1448 /*
1449  * Initialize us: probe all i2c busses on the machine, instantiate
1450  * busses and platform functions as needed.
1451  */
1452 /* This is non-static as it might be called early by smp code */
1453 int __init pmac_i2c_init(void)
1454 {
1455         static int i2c_inited;
1456
1457         if (i2c_inited)
1458                 return 0;
1459         i2c_inited = 1;
1460
1461         /* Probe keywest-i2c busses */
1462         kw_i2c_probe();
1463
1464 #ifdef CONFIG_ADB_PMU
1465         /* Probe PMU i2c busses */
1466         pmu_i2c_probe();
1467 #endif
1468
1469 #ifdef CONFIG_PMAC_SMU
1470         /* Probe SMU i2c busses */
1471         smu_i2c_probe();
1472 #endif
1473
1474         /* Now add plaform functions for some known devices */
1475         pmac_i2c_devscan(pmac_i2c_dev_create);
1476
1477         return 0;
1478 }
1479 machine_arch_initcall(powermac, pmac_i2c_init);
1480
1481 /* Since pmac_i2c_init can be called too early for the platform device
1482  * registration, we need to do it at a later time. In our case, subsys
1483  * happens to fit well, though I agree it's a bit of a hack...
1484  */
1485 static int __init pmac_i2c_create_platform_devices(void)
1486 {
1487         struct pmac_i2c_bus *bus;
1488         int i = 0;
1489
1490         /* In the case where we are initialized from smp_init(), we must
1491          * not use the timer (and thus the irq). It's safe from now on
1492          * though
1493          */
1494         pmac_i2c_force_poll = 0;
1495
1496         /* Create platform devices */
1497         list_for_each_entry(bus, &pmac_i2c_busses, link) {
1498                 bus->platform_dev =
1499                         platform_device_alloc("i2c-powermac", i++);
1500                 if (bus->platform_dev == NULL)
1501                         return -ENOMEM;
1502                 bus->platform_dev->dev.platform_data = bus;
1503                 bus->platform_dev->dev.of_node = bus->busnode;
1504                 platform_device_add(bus->platform_dev);
1505         }
1506
1507         /* Now call platform "init" functions */
1508         pmac_i2c_devscan(pmac_i2c_dev_init);
1509
1510         return 0;
1511 }
1512 machine_subsys_initcall(powermac, pmac_i2c_create_platform_devices);