1 menu "Platform support"
3 source "arch/powerpc/platforms/powernv/Kconfig"
4 source "arch/powerpc/platforms/pseries/Kconfig"
5 source "arch/powerpc/platforms/chrp/Kconfig"
6 source "arch/powerpc/platforms/512x/Kconfig"
7 source "arch/powerpc/platforms/52xx/Kconfig"
8 source "arch/powerpc/platforms/powermac/Kconfig"
9 source "arch/powerpc/platforms/maple/Kconfig"
10 source "arch/powerpc/platforms/pasemi/Kconfig"
11 source "arch/powerpc/platforms/ps3/Kconfig"
12 source "arch/powerpc/platforms/cell/Kconfig"
13 source "arch/powerpc/platforms/8xx/Kconfig"
14 source "arch/powerpc/platforms/82xx/Kconfig"
15 source "arch/powerpc/platforms/83xx/Kconfig"
16 source "arch/powerpc/platforms/85xx/Kconfig"
17 source "arch/powerpc/platforms/86xx/Kconfig"
18 source "arch/powerpc/platforms/embedded6xx/Kconfig"
19 source "arch/powerpc/platforms/44x/Kconfig"
20 source "arch/powerpc/platforms/40x/Kconfig"
21 source "arch/powerpc/platforms/amigaone/Kconfig"
24 bool "KVM Guest support"
28 This option enables various optimizations for running under the KVM
29 hypervisor. Overhead for the kernel when not running inside KVM should
32 In case of doubt, say Y
35 bool "ePAPR para-virtualization support"
38 Enables ePAPR para-virtualization support for guests.
40 In case of doubt, say Y
44 depends on 6xx || PPC64
46 Support for running natively on the hardware, i.e. without
47 a hypervisor. This option is not user-selectable but should
48 be selected by all platforms that need it.
50 config PPC_OF_BOOT_TRAMPOLINE
51 bool "Support booting from Open Firmware or yaboot"
52 depends on 6xx || PPC64
55 Support from booting from Open Firmware or yaboot using an
56 Open Firmware client interface. This enables the kernel to
57 communicate with open firmware to retrieve system information
58 such as the device tree.
60 In case of doubt, say Y
62 config PPC_DT_CPU_FTRS
63 bool "Device-tree based CPU feature discovery & setup"
64 depends on PPC_BOOK3S_64
67 This enables code to use a new device tree binding for describing CPU
68 compatibility and features. Saying Y here will attempt to use the new
69 binding if the firmware provides it. Currently only the skiboot
70 firmware provides this binding.
71 If you're not sure say Y.
73 config UDBG_RTAS_CONSOLE
74 bool "RTAS based debug console"
78 config PPC_SMP_MUXED_IPI
81 Select this opton if your platform supports SMP and your
82 interrupt controller provides less than 4 interrupts to each
83 cpu. This will enable the generic code to multiplex the 4
84 messages on to one ipi.
95 bool "MPIC Global Timer"
96 depends on MPIC && FSL_SOC
99 The MPIC global timer is a hardware timer inside the
100 Freescale PIC complying with OpenPIC standard. When the
101 specified interval times out, the hardware timer generates
102 an interrupt. The driver currently is only tested on fsl
103 chip, but it can potentially support other global timers
104 complying with the OpenPIC standard.
106 config FSL_MPIC_TIMER_WAKEUP
107 tristate "Freescale MPIC global timer wakeup driver"
108 depends on FSL_SOC && MPIC_TIMER && PM
111 The driver provides a way to wake up the system by MPIC
113 e.g. "echo 5 > /sys/devices/system/mpic/timer_wakeup"
115 config PPC_EPAPR_HV_PIC
118 select EPAPR_PARAVIRT
125 bool "MPIC message register support"
129 Enables support for the MPIC message registers. These
130 registers are used for inter-processor communication.
145 config RTAS_ERROR_LOGGING
150 config PPC_RTAS_DAEMON
156 bool "Proc interface to RTAS"
157 depends on PPC_RTAS && PROC_FS
161 tristate "Firmware flash interface"
162 depends on PPC64 && RTAS_PROC
168 config MPIC_U3_HT_IRQS
172 config MPIC_BROKEN_REGREAD
176 This option enables a MPIC driver workaround for some chips
177 that have a bug that causes some interrupt source information
178 to not read back properly. It is safe to use on other chips as
179 well, but enabling it uses about 8KB of memory to keep copies
180 of the register contents in software.
184 depends on (PPC_POWERNV || PPC_PSERIES) && PCI
199 config PPC_INDIRECT_PIO
203 config PPC_INDIRECT_MMIO
206 config PPC_IO_WORKAROUNDS
209 source "drivers/cpufreq/Kconfig"
211 menu "CPUIdle driver"
213 source "drivers/cpuidle/Kconfig"
217 config PPC601_SYNC_FIX
218 bool "Workarounds for PPC601 bugs"
219 depends on 6xx && PPC_PMAC
221 Some versions of the PPC601 (the first PowerPC chip) have bugs which
222 mean that extra synchronization instructions are required near
223 certain instructions, typically those that make major changes to the
224 CPU state. These extra instructions reduce performance slightly.
225 If you say N here, these extra instructions will not be included,
226 resulting in a kernel which will run faster but may not run at all
227 on some systems with the PPC601 chip.
229 If in doubt, say Y here.
232 bool "On-chip CPU temperature sensor support"
235 G3 and G4 processors have an on-chip temperature sensor called the
236 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
237 temperature within 2-4 degrees Celsius. This option shows the current
238 on-die temperature in /proc/cpuinfo if the cpu supports it.
240 Unfortunately, on some chip revisions, this sensor is very inaccurate
241 and in many cases, does not work at all, so don't assume the cpu
242 temp is actually what /proc/cpuinfo says it is.
245 bool "Interrupt driven TAU driver (DANGEROUS)"
248 The TAU supports an interrupt driven mode which causes an interrupt
249 whenever the temperature goes out of range. This is the fastest way
250 to get notified the temp has exceeded a range. With this option off,
251 a timer is used to re-check the temperature periodically.
253 However, on some cpus it appears that the TAU interrupt hardware
254 is buggy and can cause a situation which would lead unexplained hard
257 Unless you are extending the TAU driver, or enjoy kernel/hardware
258 debugging, leave this option off.
261 bool "Average high and low temp"
264 The TAU hardware can compare the temperature to an upper and lower
265 bound. The default behavior is to show both the upper and lower
266 bound in /proc/cpuinfo. If the range is large, the temperature is
267 either changing a lot, or the TAU hardware is broken (likely on some
268 G4's). If the range is small (around 4 degrees), the temperature is
269 relatively stable. If you say Y here, a single temperature value,
270 halfway between the upper and lower bounds, will be reported in
273 If in doubt, say N here.
276 bool "QE GPIO support"
277 depends on QUICC_ENGINE
280 Say Y here if you're going to use hardware that connects to the
284 bool "Enable support for the CPM2 (Communications Processor Module)"
285 depends on (FSL_SOC_BOOKE && PPC32) || 8260
287 select PPC_PCI_CHOICE
290 The CPM2 (Communications Processor Module) is a coprocessor on
291 embedded CPUs made by Freescale. Selecting this option means that
292 you wish to build a kernel for a machine with a CPM2 coprocessor
293 on it (826x, 827x, 8560).
296 tristate "Axon DDR2 memory device driver"
297 depends on PPC_IBM_CELL_BLADE && BLOCK
301 It registers one block device per Axon's DDR2 memory bank found
302 on a system. Block devices are called axonram?, their major and
303 minor numbers are available in /proc/devices, /proc/partitions or
304 in /sys/block/axonram?/dev.
309 select GENERIC_ISA_DMA
311 Supports for the ULI1575 PCIe south bridge that exists on some
312 Freescale reference boards. The boards all use the ULI in pretty
317 select GENERIC_ALLOCATOR
322 Uses information from the OF or flattened device tree to instantiate
323 platform devices for direct mapped RTC chips like the DS1742 or DS1743.
326 bool "Use the platform RTC operations from user space"
328 select RTC_DRV_GENERIC
330 This option provides backwards compatibility with the old gen_rtc.ko
331 module that was traditionally used for old PowerPC machines.
332 Platforms should migrate to enabling the RTC_DRV_GENERIC by hand
333 replacing their get_rtc_time/set_rtc_time callbacks with
334 a proper RTC device driver.
337 bool "Support for simple, memory-mapped GPIO controllers"
341 Say Y here to support simple, memory-mapped GPIO controllers.
342 These are usually BCSRs used to control board's switches, LEDs,
343 chip-selects, Ethernet/USB PHY's power and various other small
344 on-board peripherals.
346 config MCU_MPC8349EMITX
347 bool "MPC8349E-mITX MCU driver"
348 depends on I2C=y && PPC_83xx
351 Say Y here to enable soft power-off functionality on the Freescale
352 boards with the MPC8349E-mITX-compatible MCU chips. This driver will
353 also register MCU GPIOs with the generic GPIO API, so you'll able
354 to use MCU pins as GPIOs.
357 bool "Xilinx PCI host bridge support"
358 depends on PCI && XILINX_VIRTEX