3 * Common boot and setup code.
5 * Copyright (C) 2001 PPC64 Team, IBM Corp
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
15 #include <linux/export.h>
16 #include <linux/string.h>
17 #include <linux/sched.h>
18 #include <linux/init.h>
19 #include <linux/kernel.h>
20 #include <linux/reboot.h>
21 #include <linux/delay.h>
22 #include <linux/initrd.h>
23 #include <linux/seq_file.h>
24 #include <linux/ioport.h>
25 #include <linux/console.h>
26 #include <linux/utsname.h>
27 #include <linux/tty.h>
28 #include <linux/root_dev.h>
29 #include <linux/notifier.h>
30 #include <linux/cpu.h>
31 #include <linux/unistd.h>
32 #include <linux/serial.h>
33 #include <linux/serial_8250.h>
34 #include <linux/bootmem.h>
35 #include <linux/pci.h>
36 #include <linux/lockdep.h>
37 #include <linux/memblock.h>
38 #include <linux/hugetlb.h>
41 #include <asm/kdump.h>
43 #include <asm/processor.h>
44 #include <asm/pgtable.h>
47 #include <asm/machdep.h>
50 #include <asm/cputable.h>
51 #include <asm/sections.h>
52 #include <asm/btext.h>
53 #include <asm/nvram.h>
54 #include <asm/setup.h>
56 #include <asm/iommu.h>
57 #include <asm/serial.h>
58 #include <asm/cache.h>
61 #include <asm/firmware.h>
64 #include <asm/kexec.h>
65 #include <asm/mmu_context.h>
66 #include <asm/code-patching.h>
67 #include <asm/kvm_ppc.h>
68 #include <asm/hugetlb.h>
69 #include <asm/epapr_hcalls.h>
72 #define DBG(fmt...) udbg_printf(fmt)
78 int spinning_secondaries;
81 /* Pick defaults since we might want to patch instructions
82 * before we've read this from the device tree.
84 struct ppc64_caches ppc64_caches = {
90 EXPORT_SYMBOL_GPL(ppc64_caches);
93 * These are used in binfmt_elf.c to put aux entries on the stack
94 * for each elf executable being started.
100 #if defined(CONFIG_PPC_BOOK3E) && defined(CONFIG_SMP)
101 static void setup_tlb_core_data(void)
105 for_each_possible_cpu(cpu) {
106 int first = cpu_first_thread_sibling(cpu);
108 paca[cpu].tcd_ptr = &paca[first].tcd;
111 * If we have threads, we need either tlbsrx.
112 * or e6500 tablewalk mode, or else TLB handlers
113 * will be racy and could produce duplicate entries.
115 if (smt_enabled_at_boot >= 2 &&
116 !mmu_has_feature(MMU_FTR_USE_TLBRSRV) &&
117 book3e_htw_mode != PPC_HTW_E6500) {
118 /* Should we panic instead? */
119 WARN_ONCE("%s: unsupported MMU configuration -- expect problems\n",
125 static void setup_tlb_core_data(void)
132 static char *smt_enabled_cmdline;
134 /* Look for ibm,smt-enabled OF option */
135 static void check_smt_enabled(void)
137 struct device_node *dn;
138 const char *smt_option;
140 /* Default to enabling all threads */
141 smt_enabled_at_boot = threads_per_core;
143 /* Allow the command line to overrule the OF option */
144 if (smt_enabled_cmdline) {
145 if (!strcmp(smt_enabled_cmdline, "on"))
146 smt_enabled_at_boot = threads_per_core;
147 else if (!strcmp(smt_enabled_cmdline, "off"))
148 smt_enabled_at_boot = 0;
153 rc = strict_strtol(smt_enabled_cmdline, 10, &smt);
155 smt_enabled_at_boot =
156 min(threads_per_core, (int)smt);
159 dn = of_find_node_by_path("/options");
161 smt_option = of_get_property(dn, "ibm,smt-enabled",
165 if (!strcmp(smt_option, "on"))
166 smt_enabled_at_boot = threads_per_core;
167 else if (!strcmp(smt_option, "off"))
168 smt_enabled_at_boot = 0;
176 /* Look for smt-enabled= cmdline option */
177 static int __init early_smt_enabled(char *p)
179 smt_enabled_cmdline = p;
182 early_param("smt-enabled", early_smt_enabled);
185 #define check_smt_enabled()
186 #endif /* CONFIG_SMP */
188 /** Fix up paca fields required for the boot cpu */
189 static void fixup_boot_paca(void)
191 /* The boot cpu is started */
192 get_paca()->cpu_start = 1;
193 /* Allow percpu accesses to work until we setup percpu data */
194 get_paca()->data_offset = 0;
198 * Early initialization entry point. This is called by head.S
199 * with MMU translation disabled. We rely on the "feature" of
200 * the CPU that ignores the top 2 bits of the address in real
201 * mode so we can access kernel globals normally provided we
202 * only toy with things in the RMO region. From here, we do
203 * some early parsing of the device-tree to setup out MEMBLOCK
204 * data structures, and allocate & initialize the hash table
205 * and segment tables so we can start running with translation
208 * It is this function which will call the probe() callback of
209 * the various platform types and copy the matching one to the
210 * global ppc_md structure. Your platform can eventually do
211 * some very early initializations from the probe() routine, but
212 * this is not recommended, be very careful as, for example, the
213 * device-tree is not accessible via normal means at this point.
216 void __init early_setup(unsigned long dt_ptr)
218 static __initdata struct paca_struct boot_paca;
220 /* -------- printk is _NOT_ safe to use here ! ------- */
222 /* Identify CPU type */
223 identify_cpu(0, mfspr(SPRN_PVR));
225 /* Assume we're on cpu 0 for now. Don't write to the paca yet! */
226 initialise_paca(&boot_paca, 0);
227 setup_paca(&boot_paca);
230 /* Initialize lockdep early or else spinlocks will blow */
233 /* -------- printk is now safe to use ------- */
235 /* Enable early debugging if any specified (see udbg.h) */
238 DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr);
241 * Do early initialization using the flattened device
242 * tree, such as retrieving the physical memory map or
243 * calculating/retrieving the hash table size.
245 early_init_devtree(__va(dt_ptr));
247 epapr_paravirt_early_init();
249 /* Now we know the logical id of our boot cpu, setup the paca. */
250 setup_paca(&paca[boot_cpuid]);
253 /* Probe the machine type */
256 setup_kdump_trampoline();
258 DBG("Found, Initializing memory management...\n");
260 /* Initialize the hash table or TLB handling */
266 * Reserve any gigantic pages requested on the command line.
267 * memblock needs to have been initialized by the time this is
268 * called since this will reserve memory.
270 reserve_hugetlb_gpages();
272 DBG(" <- early_setup()\n");
274 #ifdef CONFIG_PPC_EARLY_DEBUG_BOOTX
276 * This needs to be done *last* (after the above DBG() even)
278 * Right after we return from this function, we turn on the MMU
279 * which means the real-mode access trick that btext does will
280 * no longer work, it needs to switch to using a real MMU
281 * mapping. This call will ensure that it does
284 #endif /* CONFIG_PPC_EARLY_DEBUG_BOOTX */
288 void early_setup_secondary(void)
290 /* Mark interrupts enabled in PACA */
291 get_paca()->soft_enabled = 0;
293 /* Initialize the hash table or TLB handling */
294 early_init_mmu_secondary();
297 #endif /* CONFIG_SMP */
299 #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
300 void smp_release_cpus(void)
305 DBG(" -> smp_release_cpus()\n");
307 /* All secondary cpus are spinning on a common spinloop, release them
308 * all now so they can start to spin on their individual paca
309 * spinloops. For non SMP kernels, the secondary cpus never get out
310 * of the common spinloop.
313 ptr = (unsigned long *)((unsigned long)&__secondary_hold_spinloop
315 *ptr = __pa(generic_secondary_smp_init);
317 /* And wait a bit for them to catch up */
318 for (i = 0; i < 100000; i++) {
321 if (spinning_secondaries == 0)
325 DBG("spinning_secondaries = %d\n", spinning_secondaries);
327 DBG(" <- smp_release_cpus()\n");
329 #endif /* CONFIG_SMP || CONFIG_KEXEC */
332 * Initialize some remaining members of the ppc64_caches and systemcfg
334 * (at least until we get rid of them completely). This is mostly some
335 * cache informations about the CPU that will be used by cache flush
336 * routines and/or provided to userland
338 static void __init initialize_cache_info(void)
340 struct device_node *np;
341 unsigned long num_cpus = 0;
343 DBG(" -> initialize_cache_info()\n");
345 for_each_node_by_type(np, "cpu") {
349 * We're assuming *all* of the CPUs have the same
350 * d-cache and i-cache sizes... -Peter
353 const __be32 *sizep, *lsizep;
357 lsize = cur_cpu_spec->dcache_bsize;
358 sizep = of_get_property(np, "d-cache-size", NULL);
360 size = be32_to_cpu(*sizep);
361 lsizep = of_get_property(np, "d-cache-block-size",
363 /* fallback if block size missing */
365 lsizep = of_get_property(np,
369 lsize = be32_to_cpu(*lsizep);
370 if (sizep == NULL || lsizep == NULL)
371 DBG("Argh, can't find dcache properties ! "
372 "sizep: %p, lsizep: %p\n", sizep, lsizep);
374 ppc64_caches.dsize = size;
375 ppc64_caches.dline_size = lsize;
376 ppc64_caches.log_dline_size = __ilog2(lsize);
377 ppc64_caches.dlines_per_page = PAGE_SIZE / lsize;
380 lsize = cur_cpu_spec->icache_bsize;
381 sizep = of_get_property(np, "i-cache-size", NULL);
383 size = be32_to_cpu(*sizep);
384 lsizep = of_get_property(np, "i-cache-block-size",
387 lsizep = of_get_property(np,
391 lsize = be32_to_cpu(*lsizep);
392 if (sizep == NULL || lsizep == NULL)
393 DBG("Argh, can't find icache properties ! "
394 "sizep: %p, lsizep: %p\n", sizep, lsizep);
396 ppc64_caches.isize = size;
397 ppc64_caches.iline_size = lsize;
398 ppc64_caches.log_iline_size = __ilog2(lsize);
399 ppc64_caches.ilines_per_page = PAGE_SIZE / lsize;
403 DBG(" <- initialize_cache_info()\n");
408 * Do some initial setup of the system. The parameters are those which
409 * were passed in from the bootloader.
411 void __init setup_system(void)
413 DBG(" -> setup_system()\n");
415 /* Apply the CPUs-specific and firmware specific fixups to kernel
416 * text (nop out sections not relevant to this CPU or this firmware)
418 do_feature_fixups(cur_cpu_spec->cpu_features,
419 &__start___ftr_fixup, &__stop___ftr_fixup);
420 do_feature_fixups(cur_cpu_spec->mmu_features,
421 &__start___mmu_ftr_fixup, &__stop___mmu_ftr_fixup);
422 do_feature_fixups(powerpc_firmware_features,
423 &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup);
424 do_lwsync_fixups(cur_cpu_spec->cpu_features,
425 &__start___lwsync_fixup, &__stop___lwsync_fixup);
429 * Unflatten the device-tree passed by prom_init or kexec
431 unflatten_device_tree();
434 * Fill the ppc64_caches & systemcfg structures with informations
435 * retrieved from the device-tree.
437 initialize_cache_info();
439 #ifdef CONFIG_PPC_RTAS
441 * Initialize RTAS if available
444 #endif /* CONFIG_PPC_RTAS */
447 * Check if we have an initrd provided via the device-tree
452 * Do some platform specific early initializations, that includes
453 * setting up the hash table pointers. It also sets up some interrupt-mapping
454 * related options that will be used by finish_device_tree()
456 if (ppc_md.init_early)
460 * We can discover serial ports now since the above did setup the
461 * hash table management for us, thus ioremap works. We do that early
462 * so that further code can be debugged
464 find_legacy_serial_ports();
467 * Register early console
469 register_early_udbg_console();
476 smp_setup_cpu_maps();
478 setup_tlb_core_data();
481 /* Release secondary cpus out of their spinloops at 0x60 now that
482 * we can map physical -> logical CPU ids
487 printk("Starting Linux PPC64 %s\n", init_utsname()->version);
489 printk("-----------------------------------------------------\n");
490 printk("ppc64_pft_size = 0x%llx\n", ppc64_pft_size);
491 printk("physicalMemorySize = 0x%llx\n", memblock_phys_mem_size());
492 if (ppc64_caches.dline_size != 0x80)
493 printk("ppc64_caches.dcache_line_size = 0x%x\n",
494 ppc64_caches.dline_size);
495 if (ppc64_caches.iline_size != 0x80)
496 printk("ppc64_caches.icache_line_size = 0x%x\n",
497 ppc64_caches.iline_size);
498 #ifdef CONFIG_PPC_STD_MMU_64
500 printk("htab_address = 0x%p\n", htab_address);
501 printk("htab_hash_mask = 0x%lx\n", htab_hash_mask);
502 #endif /* CONFIG_PPC_STD_MMU_64 */
503 if (PHYSICAL_START > 0)
504 printk("physical_start = 0x%llx\n",
505 (unsigned long long)PHYSICAL_START);
506 printk("-----------------------------------------------------\n");
508 DBG(" <- setup_system()\n");
511 /* This returns the limit below which memory accesses to the linear
512 * mapping are guarnateed not to cause a TLB or SLB miss. This is
513 * used to allocate interrupt or emergency stacks for which our
514 * exception entry path doesn't deal with being interrupted.
516 static u64 safe_stack_limit(void)
518 #ifdef CONFIG_PPC_BOOK3E
519 /* Freescale BookE bolts the entire linear mapping */
520 if (mmu_has_feature(MMU_FTR_TYPE_FSL_E))
521 return linear_map_top;
522 /* Other BookE, we assume the first GB is bolted */
525 /* BookS, the first segment is bolted */
526 if (mmu_has_feature(MMU_FTR_1T_SEGMENT))
527 return 1UL << SID_SHIFT_1T;
528 return 1UL << SID_SHIFT;
532 static void __init irqstack_early_init(void)
534 u64 limit = safe_stack_limit();
538 * Interrupt stacks must be in the first segment since we
539 * cannot afford to take SLB misses on them.
541 for_each_possible_cpu(i) {
542 softirq_ctx[i] = (struct thread_info *)
543 __va(memblock_alloc_base(THREAD_SIZE,
544 THREAD_SIZE, limit));
545 hardirq_ctx[i] = (struct thread_info *)
546 __va(memblock_alloc_base(THREAD_SIZE,
547 THREAD_SIZE, limit));
551 #ifdef CONFIG_PPC_BOOK3E
552 static void __init exc_lvl_early_init(void)
557 for_each_possible_cpu(i) {
558 sp = memblock_alloc(THREAD_SIZE, THREAD_SIZE);
559 critirq_ctx[i] = (struct thread_info *)__va(sp);
560 paca[i].crit_kstack = __va(sp + THREAD_SIZE);
562 sp = memblock_alloc(THREAD_SIZE, THREAD_SIZE);
563 dbgirq_ctx[i] = (struct thread_info *)__va(sp);
564 paca[i].dbg_kstack = __va(sp + THREAD_SIZE);
566 sp = memblock_alloc(THREAD_SIZE, THREAD_SIZE);
567 mcheckirq_ctx[i] = (struct thread_info *)__va(sp);
568 paca[i].mc_kstack = __va(sp + THREAD_SIZE);
571 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC))
572 patch_exception(0x040, exc_debug_debug_book3e);
575 #define exc_lvl_early_init()
579 * Stack space used when we detect a bad kernel stack pointer, and
580 * early in SMP boots before relocation is enabled. Exclusive emergency
581 * stack for machine checks.
583 static void __init emergency_stack_init(void)
589 * Emergency stacks must be under 256MB, we cannot afford to take
590 * SLB misses on them. The ABI also requires them to be 128-byte
593 * Since we use these as temporary stacks during secondary CPU
594 * bringup, we need to get at them in real mode. This means they
595 * must also be within the RMO region.
597 limit = min(safe_stack_limit(), ppc64_rma_size);
599 for_each_possible_cpu(i) {
601 sp = memblock_alloc_base(THREAD_SIZE, THREAD_SIZE, limit);
603 paca[i].emergency_sp = __va(sp);
605 #ifdef CONFIG_PPC_BOOK3S_64
606 /* emergency stack for machine check exception handling. */
607 sp = memblock_alloc_base(THREAD_SIZE, THREAD_SIZE, limit);
609 paca[i].mc_emergency_sp = __va(sp);
615 * Called into from start_kernel this initializes bootmem, which is used
616 * to manage page allocation until mem_init is called.
618 void __init setup_arch(char **cmdline_p)
620 ppc64_boot_msg(0x12, "Setup Arch");
622 *cmdline_p = cmd_line;
625 * Set cache line size based on type of cpu as a default.
626 * Systems with OF can look in the properties on the cpu node(s)
627 * for a possibly more accurate value.
629 dcache_bsize = ppc64_caches.dline_size;
630 icache_bsize = ppc64_caches.iline_size;
635 init_mm.start_code = (unsigned long)_stext;
636 init_mm.end_code = (unsigned long) _etext;
637 init_mm.end_data = (unsigned long) _edata;
638 init_mm.brk = klimit;
639 #ifdef CONFIG_PPC_64K_PAGES
640 init_mm.context.pte_frag = NULL;
642 irqstack_early_init();
643 exc_lvl_early_init();
644 emergency_stack_init();
646 #ifdef CONFIG_PPC_STD_MMU_64
649 /* set up the bootmem stuff with available memory */
653 #ifdef CONFIG_DUMMY_CONSOLE
654 conswitchp = &dummy_con;
657 if (ppc_md.setup_arch)
662 /* Initialize the MMU context management stuff */
665 /* Interrupt code needs to be 64K-aligned */
666 if ((unsigned long)_stext & 0xffff)
667 panic("Kernelbase not 64K-aligned (0x%lx)!\n",
668 (unsigned long)_stext);
670 ppc64_boot_msg(0x15, "Setup Done");
674 /* ToDo: do something useful if ppc_md is not yet setup. */
675 #define PPC64_LINUX_FUNCTION 0x0f000000
676 #define PPC64_IPL_MESSAGE 0xc0000000
677 #define PPC64_TERM_MESSAGE 0xb0000000
679 static void ppc64_do_msg(unsigned int src, const char *msg)
681 if (ppc_md.progress) {
684 sprintf(buf, "%08X\n", src);
685 ppc_md.progress(buf, 0);
686 snprintf(buf, 128, "%s", msg);
687 ppc_md.progress(buf, 0);
691 /* Print a boot progress message. */
692 void ppc64_boot_msg(unsigned int src, const char *msg)
694 ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_IPL_MESSAGE|src, msg);
695 printk("[boot]%04x %s\n", src, msg);
699 #define PCPU_DYN_SIZE ()
701 static void * __init pcpu_fc_alloc(unsigned int cpu, size_t size, size_t align)
703 return __alloc_bootmem_node(NODE_DATA(cpu_to_node(cpu)), size, align,
704 __pa(MAX_DMA_ADDRESS));
707 static void __init pcpu_fc_free(void *ptr, size_t size)
709 free_bootmem(__pa(ptr), size);
712 static int pcpu_cpu_distance(unsigned int from, unsigned int to)
714 if (cpu_to_node(from) == cpu_to_node(to))
715 return LOCAL_DISTANCE;
717 return REMOTE_DISTANCE;
720 unsigned long __per_cpu_offset[NR_CPUS] __read_mostly;
721 EXPORT_SYMBOL(__per_cpu_offset);
723 void __init setup_per_cpu_areas(void)
725 const size_t dyn_size = PERCPU_MODULE_RESERVE + PERCPU_DYNAMIC_RESERVE;
732 * Linear mapping is one of 4K, 1M and 16M. For 4K, no need
733 * to group units. For larger mappings, use 1M atom which
734 * should be large enough to contain a number of units.
736 if (mmu_linear_psize == MMU_PAGE_4K)
737 atom_size = PAGE_SIZE;
741 rc = pcpu_embed_first_chunk(0, dyn_size, atom_size, pcpu_cpu_distance,
742 pcpu_fc_alloc, pcpu_fc_free);
744 panic("cannot initialize percpu area (err=%d)", rc);
746 delta = (unsigned long)pcpu_base_addr - (unsigned long)__per_cpu_start;
747 for_each_possible_cpu(cpu) {
748 __per_cpu_offset[cpu] = delta + pcpu_unit_offsets[cpu];
749 paca[cpu].data_offset = __per_cpu_offset[cpu];
755 #if defined(CONFIG_PPC_INDIRECT_PIO) || defined(CONFIG_PPC_INDIRECT_MMIO)
756 struct ppc_pci_io ppc_pci_io;
757 EXPORT_SYMBOL(ppc_pci_io);