arch/powerpc/kernel/setup_64.c

   1 /*
   2  *
   3  * Common boot and setup code.
   4  *
   5  * Copyright (C) 2001 PPC64 Team, IBM Corp
   6  *
   7  *      This program is free software; you can redistribute it and/or
   8  *      modify it under the terms of the GNU General Public License
   9  *      as published by the Free Software Foundation; either version
  10  *      2 of the License, or (at your option) any later version.
  11  */
  12
  13 #undef DEBUG
  14
  15 #include <linux/export.h>
  16 #include <linux/string.h>
  17 #include <linux/sched.h>
  18 #include <linux/init.h>
  19 #include <linux/kernel.h>
  20 #include <linux/reboot.h>
  21 #include <linux/delay.h>
  22 #include <linux/initrd.h>
  23 #include <linux/seq_file.h>
  24 #include <linux/ioport.h>
  25 #include <linux/console.h>
  26 #include <linux/utsname.h>
  27 #include <linux/tty.h>
  28 #include <linux/root_dev.h>
  29 #include <linux/notifier.h>
  30 #include <linux/cpu.h>
  31 #include <linux/unistd.h>
  32 #include <linux/serial.h>
  33 #include <linux/serial_8250.h>
  34 #include <linux/bootmem.h>
  35 #include <linux/pci.h>
  36 #include <linux/lockdep.h>
  37 #include <linux/memblock.h>
  38 #include <linux/hugetlb.h>
  39
  40 #include <asm/io.h>
  41 #include <asm/kdump.h>
  42 #include <asm/prom.h>
  43 #include <asm/processor.h>
  44 #include <asm/pgtable.h>
  45 #include <asm/smp.h>
  46 #include <asm/elf.h>
  47 #include <asm/machdep.h>
  48 #include <asm/paca.h>
  49 #include <asm/time.h>
  50 #include <asm/cputable.h>
  51 #include <asm/sections.h>
  52 #include <asm/btext.h>
  53 #include <asm/nvram.h>
  54 #include <asm/setup.h>
  55 #include <asm/rtas.h>
  56 #include <asm/iommu.h>
  57 #include <asm/serial.h>
  58 #include <asm/cache.h>
  59 #include <asm/page.h>
  60 #include <asm/mmu.h>
  61 #include <asm/firmware.h>
  62 #include <asm/xmon.h>
  63 #include <asm/udbg.h>
  64 #include <asm/kexec.h>
  65 #include <asm/mmu_context.h>
  66 #include <asm/code-patching.h>
  67 #include <asm/kvm_ppc.h>
  68 #include <asm/hugetlb.h>
  69
  70 #include "setup.h"
  71
  72 #ifdef DEBUG
  73 #define DBG(fmt...) udbg_printf(fmt)
  74 #else
  75 #define DBG(fmt...)
  76 #endif
  77
  78 int boot_cpuid = 0;
  79 int __initdata spinning_secondaries;
  80 u64 ppc64_pft_size;
  81
  82 /* Pick defaults since we might want to patch instructions
  83  * before we've read this from the device tree.
  84  */
  85 struct ppc64_caches ppc64_caches = {
  86         .dline_size = 0x40,
  87         .log_dline_size = 6,
  88         .iline_size = 0x40,
  89         .log_iline_size = 6
  90 };
  91 EXPORT_SYMBOL_GPL(ppc64_caches);
  92
  93 /*
  94  * These are used in binfmt_elf.c to put aux entries on the stack
  95  * for each elf executable being started.
  96  */
  97 int dcache_bsize;
  98 int icache_bsize;
  99 int ucache_bsize;
 100
 101 #ifdef CONFIG_SMP
 102
 103 static char *smt_enabled_cmdline;
 104
 105 /* Look for ibm,smt-enabled OF option */
 106 static void check_smt_enabled(void)
 107 {
 108         struct device_node *dn;
 109         const char *smt_option;
 110
 111         /* Default to enabling all threads */
 112         smt_enabled_at_boot = threads_per_core;
 113
 114         /* Allow the command line to overrule the OF option */
 115         if (smt_enabled_cmdline) {
 116                 if (!strcmp(smt_enabled_cmdline, "on"))
 117                         smt_enabled_at_boot = threads_per_core;
 118                 else if (!strcmp(smt_enabled_cmdline, "off"))
 119                         smt_enabled_at_boot = 0;
 120                 else {
 121                         long smt;
 122                         int rc;
 123
 124                         rc = strict_strtol(smt_enabled_cmdline, 10, &smt);
 125                         if (!rc)
 126                                 smt_enabled_at_boot =
 127                                         min(threads_per_core, (int)smt);
 128                 }
 129         } else {
 130                 dn = of_find_node_by_path("/options");
 131                 if (dn) {
 132                         smt_option = of_get_property(dn, "ibm,smt-enabled",
 133                                                      NULL);
 134
 135                         if (smt_option) {
 136                                 if (!strcmp(smt_option, "on"))
 137                                         smt_enabled_at_boot = threads_per_core;
 138                                 else if (!strcmp(smt_option, "off"))
 139                                         smt_enabled_at_boot = 0;
 140                         }
 141
 142                         of_node_put(dn);
 143                 }
 144         }
 145 }
 146
 147 /* Look for smt-enabled= cmdline option */
 148 static int __init early_smt_enabled(char *p)
 149 {
 150         smt_enabled_cmdline = p;
 151         return 0;
 152 }
 153 early_param("smt-enabled", early_smt_enabled);
 154
 155 #else
 156 #define check_smt_enabled()
 157 #endif /* CONFIG_SMP */
 158
 159 /*
 160  * Early initialization entry point. This is called by head.S
 161  * with MMU translation disabled. We rely on the "feature" of
 162  * the CPU that ignores the top 2 bits of the address in real
 163  * mode so we can access kernel globals normally provided we
 164  * only toy with things in the RMO region. From here, we do
 165  * some early parsing of the device-tree to setup out MEMBLOCK
 166  * data structures, and allocate & initialize the hash table
 167  * and segment tables so we can start running with translation
 168  * enabled.
 169  *
 170  * It is this function which will call the probe() callback of
 171  * the various platform types and copy the matching one to the
 172  * global ppc_md structure. Your platform can eventually do
 173  * some very early initializations from the probe() routine, but
 174  * this is not recommended, be very careful as, for example, the
 175  * device-tree is not accessible via normal means at this point.
 176  */
 177
 178 void __init early_setup(unsigned long dt_ptr)
 179 {
 180         static __initdata struct paca_struct boot_paca;
 181
 182         /* -------- printk is _NOT_ safe to use here ! ------- */
 183
 184         /* Identify CPU type */
 185         identify_cpu(0, mfspr(SPRN_PVR));
 186
 187         /* Assume we're on cpu 0 for now. Don't write to the paca yet! */
 188         initialise_paca(&boot_paca, 0);
 189         setup_paca(&boot_paca);
 190
 191         /* Initialize lockdep early or else spinlocks will blow */
 192         lockdep_init();
 193
 194         /* -------- printk is now safe to use ------- */
 195
 196         /* Enable early debugging if any specified (see udbg.h) */
 197         udbg_early_init();
 198
 199         DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr);
 200
 201         /*
 202          * Do early initialization using the flattened device
 203          * tree, such as retrieving the physical memory map or
 204          * calculating/retrieving the hash table size.
 205          */
 206         early_init_devtree(__va(dt_ptr));
 207
 208         /* Now we know the logical id of our boot cpu, setup the paca. */
 209         setup_paca(&paca[boot_cpuid]);
 210
 211         /* Fix up paca fields required for the boot cpu */
 212         get_paca()->cpu_start = 1;
 213         /* Allow percpu accesses to "work" until we setup percpu data */
 214         get_paca()->data_offset = 0;
 215
 216         /* Probe the machine type */
 217         probe_machine();
 218
 219         setup_kdump_trampoline();
 220
 221         DBG("Found, Initializing memory management...\n");
 222
 223         /* Initialize the hash table or TLB handling */
 224         early_init_mmu();
 225
 226         /*
 227          * Reserve any gigantic pages requested on the command line.
 228          * memblock needs to have been initialized by the time this is
 229          * called since this will reserve memory.
 230          */
 231         reserve_hugetlb_gpages();
 232
 233         DBG(" <- early_setup()\n");
 234 }
 235
 236 #ifdef CONFIG_SMP
 237 void early_setup_secondary(void)
 238 {
 239         /* Mark interrupts enabled in PACA */
 240         get_paca()->soft_enabled = 0;
 241
 242         /* Initialize the hash table or TLB handling */
 243         early_init_mmu_secondary();
 244 }
 245
 246 #endif /* CONFIG_SMP */
 247
 248 #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
 249 void smp_release_cpus(void)
 250 {
 251         unsigned long *ptr;
 252         int i;
 253
 254         DBG(" -> smp_release_cpus()\n");
 255
 256         /* All secondary cpus are spinning on a common spinloop, release them
 257          * all now so they can start to spin on their individual paca
 258          * spinloops. For non SMP kernels, the secondary cpus never get out
 259          * of the common spinloop.
 260          */
 261
 262         ptr  = (unsigned long *)((unsigned long)&__secondary_hold_spinloop
 263                         - PHYSICAL_START);
 264         *ptr = __pa(generic_secondary_smp_init);
 265
 266         /* And wait a bit for them to catch up */
 267         for (i = 0; i < 100000; i++) {
 268                 mb();
 269                 HMT_low();
 270                 if (spinning_secondaries == 0)
 271                         break;
 272                 udelay(1);
 273         }
 274         DBG("spinning_secondaries = %d\n", spinning_secondaries);
 275
 276         DBG(" <- smp_release_cpus()\n");
 277 }
 278 #endif /* CONFIG_SMP || CONFIG_KEXEC */
 279
 280 /*
 281  * Initialize some remaining members of the ppc64_caches and systemcfg
 282  * structures
 283  * (at least until we get rid of them completely). This is mostly some
 284  * cache informations about the CPU that will be used by cache flush
 285  * routines and/or provided to userland
 286  */
 287 static void __init initialize_cache_info(void)
 288 {
 289         struct device_node *np;
 290         unsigned long num_cpus = 0;
 291
 292         DBG(" -> initialize_cache_info()\n");
 293
 294         for_each_node_by_type(np, "cpu") {
 295                 num_cpus += 1;
 296
 297                 /*
 298                  * We're assuming *all* of the CPUs have the same
 299                  * d-cache and i-cache sizes... -Peter
 300                  */
 301                 if (num_cpus == 1) {
 302                         const u32 *sizep, *lsizep;
 303                         u32 size, lsize;
 304
 305                         size = 0;
 306                         lsize = cur_cpu_spec->dcache_bsize;
 307                         sizep = of_get_property(np, "d-cache-size", NULL);
 308                         if (sizep != NULL)
 309                                 size = *sizep;
 310                         lsizep = of_get_property(np, "d-cache-block-size",
 311                                                  NULL);
 312                         /* fallback if block size missing */
 313                         if (lsizep == NULL)
 314                                 lsizep = of_get_property(np,
 315                                                          "d-cache-line-size",
 316                                                          NULL);
 317                         if (lsizep != NULL)
 318                                 lsize = *lsizep;
 319                         if (sizep == 0 || lsizep == 0)
 320                                 DBG("Argh, can't find dcache properties ! "
 321                                     "sizep: %p, lsizep: %p\n", sizep, lsizep);
 322
 323                         ppc64_caches.dsize = size;
 324                         ppc64_caches.dline_size = lsize;
 325                         ppc64_caches.log_dline_size = __ilog2(lsize);
 326                         ppc64_caches.dlines_per_page = PAGE_SIZE / lsize;
 327
 328                         size = 0;
 329                         lsize = cur_cpu_spec->icache_bsize;
 330                         sizep = of_get_property(np, "i-cache-size", NULL);
 331                         if (sizep != NULL)
 332                                 size = *sizep;
 333                         lsizep = of_get_property(np, "i-cache-block-size",
 334                                                  NULL);
 335                         if (lsizep == NULL)
 336                                 lsizep = of_get_property(np,
 337                                                          "i-cache-line-size",
 338                                                          NULL);
 339                         if (lsizep != NULL)
 340                                 lsize = *lsizep;
 341                         if (sizep == 0 || lsizep == 0)
 342                                 DBG("Argh, can't find icache properties ! "
 343                                     "sizep: %p, lsizep: %p\n", sizep, lsizep);
 344
 345                         ppc64_caches.isize = size;
 346                         ppc64_caches.iline_size = lsize;
 347                         ppc64_caches.log_iline_size = __ilog2(lsize);
 348                         ppc64_caches.ilines_per_page = PAGE_SIZE / lsize;
 349                 }
 350         }
 351
 352         DBG(" <- initialize_cache_info()\n");
 353 }
 354
 355
 356 /*
 357  * Do some initial setup of the system.  The parameters are those which
 358  * were passed in from the bootloader.
 359  */
 360 void __init setup_system(void)
 361 {
 362         DBG(" -> setup_system()\n");
 363
 364         /* Apply the CPUs-specific and firmware specific fixups to kernel
 365          * text (nop out sections not relevant to this CPU or this firmware)
 366          */
 367         do_feature_fixups(cur_cpu_spec->cpu_features,
 368                           &__start___ftr_fixup, &__stop___ftr_fixup);
 369         do_feature_fixups(cur_cpu_spec->mmu_features,
 370                           &__start___mmu_ftr_fixup, &__stop___mmu_ftr_fixup);
 371         do_feature_fixups(powerpc_firmware_features,
 372                           &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup);
 373         do_lwsync_fixups(cur_cpu_spec->cpu_features,
 374                          &__start___lwsync_fixup, &__stop___lwsync_fixup);
 375         do_final_fixups();
 376
 377         /*
 378          * Unflatten the device-tree passed by prom_init or kexec
 379          */
 380         unflatten_device_tree();
 381
 382         /*
 383          * Fill the ppc64_caches & systemcfg structures with informations
 384          * retrieved from the device-tree.
 385          */
 386         initialize_cache_info();
 387
 388 #ifdef CONFIG_PPC_RTAS
 389         /*
 390          * Initialize RTAS if available
 391          */
 392         rtas_initialize();
 393 #endif /* CONFIG_PPC_RTAS */
 394
 395         /*
 396          * Check if we have an initrd provided via the device-tree
 397          */
 398         check_for_initrd();
 399
 400         /*
 401          * Do some platform specific early initializations, that includes
 402          * setting up the hash table pointers. It also sets up some interrupt-mapping
 403          * related options that will be used by finish_device_tree()
 404          */
 405         if (ppc_md.init_early)
 406                 ppc_md.init_early();
 407
 408         /*
 409          * We can discover serial ports now since the above did setup the
 410          * hash table management for us, thus ioremap works. We do that early
 411          * so that further code can be debugged
 412          */
 413         find_legacy_serial_ports();
 414
 415         /*
 416          * Register early console
 417          */
 418         register_early_udbg_console();
 419
 420         /*
 421          * Initialize xmon
 422          */
 423         xmon_setup();
 424
 425         smp_setup_cpu_maps();
 426         check_smt_enabled();
 427
 428 #ifdef CONFIG_SMP
 429         /* Release secondary cpus out of their spinloops at 0x60 now that
 430          * we can map physical -> logical CPU ids
 431          */
 432         smp_release_cpus();
 433 #endif
 434
 435         printk("Starting Linux PPC64 %s\n", init_utsname()->version);
 436
 437         printk("-----------------------------------------------------\n");
 438         printk("ppc64_pft_size                = 0x%llx\n", ppc64_pft_size);
 439         printk("physicalMemorySize            = 0x%llx\n", memblock_phys_mem_size());
 440         if (ppc64_caches.dline_size != 0x80)
 441                 printk("ppc64_caches.dcache_line_size = 0x%x\n",
 442                        ppc64_caches.dline_size);
 443         if (ppc64_caches.iline_size != 0x80)
 444                 printk("ppc64_caches.icache_line_size = 0x%x\n",
 445                        ppc64_caches.iline_size);
 446 #ifdef CONFIG_PPC_STD_MMU_64
 447         if (htab_address)
 448                 printk("htab_address                  = 0x%p\n", htab_address);
 449         printk("htab_hash_mask                = 0x%lx\n", htab_hash_mask);
 450 #endif /* CONFIG_PPC_STD_MMU_64 */
 451         if (PHYSICAL_START > 0)
 452                 printk("physical_start                = 0x%llx\n",
 453                        (unsigned long long)PHYSICAL_START);
 454         printk("-----------------------------------------------------\n");
 455
 456         DBG(" <- setup_system()\n");
 457 }
 458
 459 /* This returns the limit below which memory accesses to the linear
 460  * mapping are guarnateed not to cause a TLB or SLB miss. This is
 461  * used to allocate interrupt or emergency stacks for which our
 462  * exception entry path doesn't deal with being interrupted.
 463  */
 464 static u64 safe_stack_limit(void)
 465 {
 466 #ifdef CONFIG_PPC_BOOK3E
 467         /* Freescale BookE bolts the entire linear mapping */
 468         if (mmu_has_feature(MMU_FTR_TYPE_FSL_E))
 469                 return linear_map_top;
 470         /* Other BookE, we assume the first GB is bolted */
 471         return 1ul << 30;
 472 #else
 473         /* BookS, the first segment is bolted */
 474         if (mmu_has_feature(MMU_FTR_1T_SEGMENT))
 475                 return 1UL << SID_SHIFT_1T;
 476         return 1UL << SID_SHIFT;
 477 #endif
 478 }
 479
 480 static void __init irqstack_early_init(void)
 481 {
 482         u64 limit = safe_stack_limit();
 483         unsigned int i;
 484
 485         /*
 486          * Interrupt stacks must be in the first segment since we
 487          * cannot afford to take SLB misses on them.
 488          */
 489         for_each_possible_cpu(i) {
 490                 softirq_ctx[i] = (struct thread_info *)
 491                         __va(memblock_alloc_base(THREAD_SIZE,
 492                                             THREAD_SIZE, limit));
 493                 hardirq_ctx[i] = (struct thread_info *)
 494                         __va(memblock_alloc_base(THREAD_SIZE,
 495                                             THREAD_SIZE, limit));
 496         }
 497 }
 498
 499 #ifdef CONFIG_PPC_BOOK3E
 500 static void __init exc_lvl_early_init(void)
 501 {
 502         extern unsigned int interrupt_base_book3e;
 503         extern unsigned int exc_debug_debug_book3e;
 504
 505         unsigned int i;
 506
 507         for_each_possible_cpu(i) {
 508                 critirq_ctx[i] = (struct thread_info *)
 509                         __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
 510                 dbgirq_ctx[i] = (struct thread_info *)
 511                         __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
 512                 mcheckirq_ctx[i] = (struct thread_info *)
 513                         __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
 514         }
 515
 516         if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC))
 517                 patch_branch(&interrupt_base_book3e + (0x040 / 4) + 1,
 518                              (unsigned long)&exc_debug_debug_book3e, 0);
 519 }
 520 #else
 521 #define exc_lvl_early_init()
 522 #endif
 523
 524 /*
 525  * Stack space used when we detect a bad kernel stack pointer, and
 526  * early in SMP boots before relocation is enabled.
 527  */
 528 static void __init emergency_stack_init(void)
 529 {
 530         u64 limit;
 531         unsigned int i;
 532
 533         /*
 534          * Emergency stacks must be under 256MB, we cannot afford to take
 535          * SLB misses on them. The ABI also requires them to be 128-byte
 536          * aligned.
 537          *
 538          * Since we use these as temporary stacks during secondary CPU
 539          * bringup, we need to get at them in real mode. This means they
 540          * must also be within the RMO region.
 541          */
 542         limit = min(safe_stack_limit(), ppc64_rma_size);
 543
 544         for_each_possible_cpu(i) {
 545                 unsigned long sp;
 546                 sp  = memblock_alloc_base(THREAD_SIZE, THREAD_SIZE, limit);
 547                 sp += THREAD_SIZE;
 548                 paca[i].emergency_sp = __va(sp);
 549         }
 550 }
 551
 552 /*
 553  * Called into from start_kernel this initializes bootmem, which is used
 554  * to manage page allocation until mem_init is called.
 555  */
 556 void __init setup_arch(char **cmdline_p)
 557 {
 558         ppc64_boot_msg(0x12, "Setup Arch");
 559
 560         *cmdline_p = cmd_line;
 561
 562         /*
 563          * Set cache line size based on type of cpu as a default.
 564          * Systems with OF can look in the properties on the cpu node(s)
 565          * for a possibly more accurate value.
 566          */
 567         dcache_bsize = ppc64_caches.dline_size;
 568         icache_bsize = ppc64_caches.iline_size;
 569
 570         /* reboot on panic */
 571         panic_timeout = 180;
 572
 573         if (ppc_md.panic)
 574                 setup_panic();
 575
 576         init_mm.start_code = (unsigned long)_stext;
 577         init_mm.end_code = (unsigned long) _etext;
 578         init_mm.end_data = (unsigned long) _edata;
 579         init_mm.brk = klimit;
 580
 581         irqstack_early_init();
 582         exc_lvl_early_init();
 583         emergency_stack_init();
 584
 585 #ifdef CONFIG_PPC_STD_MMU_64
 586         stabs_alloc();
 587 #endif
 588         /* set up the bootmem stuff with available memory */
 589         do_init_bootmem();
 590         sparse_init();
 591
 592 #ifdef CONFIG_DUMMY_CONSOLE
 593         conswitchp = &dummy_con;
 594 #endif
 595
 596         if (ppc_md.setup_arch)
 597                 ppc_md.setup_arch();
 598
 599         paging_init();
 600
 601         /* Initialize the MMU context management stuff */
 602         mmu_context_init();
 603
 604         kvm_linear_init();
 605
 606         /* Interrupt code needs to be 64K-aligned */
 607         if ((unsigned long)_stext & 0xffff)
 608                 panic("Kernelbase not 64K-aligned (0x%lx)!\n",
 609                       (unsigned long)_stext);
 610
 611         ppc64_boot_msg(0x15, "Setup Done");
 612 }
 613
 614
 615 /* ToDo: do something useful if ppc_md is not yet setup. */
 616 #define PPC64_LINUX_FUNCTION 0x0f000000
 617 #define PPC64_IPL_MESSAGE 0xc0000000
 618 #define PPC64_TERM_MESSAGE 0xb0000000
 619
 620 static void ppc64_do_msg(unsigned int src, const char *msg)
 621 {
 622         if (ppc_md.progress) {
 623                 char buf[128];
 624
 625                 sprintf(buf, "%08X\n", src);
 626                 ppc_md.progress(buf, 0);
 627                 snprintf(buf, 128, "%s", msg);
 628                 ppc_md.progress(buf, 0);
 629         }
 630 }
 631
 632 /* Print a boot progress message. */
 633 void ppc64_boot_msg(unsigned int src, const char *msg)
 634 {
 635         ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_IPL_MESSAGE|src, msg);
 636         printk("[boot]%04x %s\n", src, msg);
 637 }
 638
 639 #ifdef CONFIG_SMP
 640 #define PCPU_DYN_SIZE           ()
 641
 642 static void * __init pcpu_fc_alloc(unsigned int cpu, size_t size, size_t align)
 643 {
 644         return __alloc_bootmem_node(NODE_DATA(cpu_to_node(cpu)), size, align,
 645                                     __pa(MAX_DMA_ADDRESS));
 646 }
 647
 648 static void __init pcpu_fc_free(void *ptr, size_t size)
 649 {
 650         free_bootmem(__pa(ptr), size);
 651 }
 652
 653 static int pcpu_cpu_distance(unsigned int from, unsigned int to)
 654 {
 655         if (cpu_to_node(from) == cpu_to_node(to))
 656                 return LOCAL_DISTANCE;
 657         else
 658                 return REMOTE_DISTANCE;
 659 }
 660
 661 unsigned long __per_cpu_offset[NR_CPUS] __read_mostly;
 662 EXPORT_SYMBOL(__per_cpu_offset);
 663
 664 void __init setup_per_cpu_areas(void)
 665 {
 666         const size_t dyn_size = PERCPU_MODULE_RESERVE + PERCPU_DYNAMIC_RESERVE;
 667         size_t atom_size;
 668         unsigned long delta;
 669         unsigned int cpu;
 670         int rc;
 671
 672         /*
 673          * Linear mapping is one of 4K, 1M and 16M.  For 4K, no need
 674          * to group units.  For larger mappings, use 1M atom which
 675          * should be large enough to contain a number of units.
 676          */
 677         if (mmu_linear_psize == MMU_PAGE_4K)
 678                 atom_size = PAGE_SIZE;
 679         else
 680                 atom_size = 1 << 20;
 681
 682         rc = pcpu_embed_first_chunk(0, dyn_size, atom_size, pcpu_cpu_distance,
 683                                     pcpu_fc_alloc, pcpu_fc_free);
 684         if (rc < 0)
 685                 panic("cannot initialize percpu area (err=%d)", rc);
 686
 687         delta = (unsigned long)pcpu_base_addr - (unsigned long)__per_cpu_start;
 688         for_each_possible_cpu(cpu) {
 689                 __per_cpu_offset[cpu] = delta + pcpu_unit_offsets[cpu];
 690                 paca[cpu].data_offset = __per_cpu_offset[cpu];
 691         }
 692 }
 693 #endif
 694
 695
 696 #ifdef CONFIG_PPC_INDIRECT_IO
 697 struct ppc_pci_io ppc_pci_io;
 698 EXPORT_SYMBOL(ppc_pci_io);
 699 #endif /* CONFIG_PPC_INDIRECT_IO */
 700