1 // SPDX-License-Identifier: GPL-2.0+
3 // Security related flags and so on.
5 // Copyright 2018, Michael Ellerman, IBM Corporation.
8 #include <linux/kernel.h>
9 #include <linux/device.h>
10 #include <linux/seq_buf.h>
12 #include <asm/asm-prototypes.h>
13 #include <asm/code-patching.h>
14 #include <asm/debugfs.h>
15 #include <asm/security_features.h>
16 #include <asm/setup.h>
19 unsigned long powerpc_security_features __read_mostly = SEC_FTR_DEFAULT;
21 enum count_cache_flush_type {
22 COUNT_CACHE_FLUSH_NONE = 0x1,
23 COUNT_CACHE_FLUSH_SW = 0x2,
24 COUNT_CACHE_FLUSH_HW = 0x4,
26 static enum count_cache_flush_type count_cache_flush_type = COUNT_CACHE_FLUSH_NONE;
28 bool barrier_nospec_enabled;
29 static bool no_nospec;
30 static bool btb_flush_enabled;
31 #ifdef CONFIG_PPC_FSL_BOOK3E
32 static bool no_spectrev2;
35 static void enable_barrier_nospec(bool enable)
37 barrier_nospec_enabled = enable;
38 do_barrier_nospec_fixups(enable);
41 void setup_barrier_nospec(void)
46 * It would make sense to check SEC_FTR_SPEC_BAR_ORI31 below as well.
47 * But there's a good reason not to. The two flags we check below are
48 * both are enabled by default in the kernel, so if the hcall is not
49 * functional they will be enabled.
50 * On a system where the host firmware has been updated (so the ori
51 * functions as a barrier), but on which the hypervisor (KVM/Qemu) has
52 * not been updated, we would like to enable the barrier. Dropping the
53 * check for SEC_FTR_SPEC_BAR_ORI31 achieves that. The only downside is
54 * we potentially enable the barrier on systems where the host firmware
55 * is not updated, but that's harmless as it's a no-op.
57 enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
58 security_ftr_enabled(SEC_FTR_BNDS_CHK_SPEC_BAR);
61 enable_barrier_nospec(enable);
64 static int __init handle_nospectre_v1(char *p)
70 early_param("nospectre_v1", handle_nospectre_v1);
72 #ifdef CONFIG_DEBUG_FS
73 static int barrier_nospec_set(void *data, u64 val)
83 if (!!val == !!barrier_nospec_enabled)
86 enable_barrier_nospec(!!val);
91 static int barrier_nospec_get(void *data, u64 *val)
93 *val = barrier_nospec_enabled ? 1 : 0;
97 DEFINE_SIMPLE_ATTRIBUTE(fops_barrier_nospec,
98 barrier_nospec_get, barrier_nospec_set, "%llu\n");
100 static __init int barrier_nospec_debugfs_init(void)
102 debugfs_create_file("barrier_nospec", 0600, powerpc_debugfs_root, NULL,
103 &fops_barrier_nospec);
106 device_initcall(barrier_nospec_debugfs_init);
107 #endif /* CONFIG_DEBUG_FS */
109 #ifdef CONFIG_PPC_FSL_BOOK3E
110 static int __init handle_nospectre_v2(char *p)
116 early_param("nospectre_v2", handle_nospectre_v2);
117 void setup_spectre_v2(void)
120 do_btb_flush_fixups();
122 btb_flush_enabled = true;
124 #endif /* CONFIG_PPC_FSL_BOOK3E */
126 #ifdef CONFIG_PPC_BOOK3S_64
127 ssize_t cpu_show_meltdown(struct device *dev, struct device_attribute *attr, char *buf)
131 thread_priv = security_ftr_enabled(SEC_FTR_L1D_THREAD_PRIV);
133 if (rfi_flush || thread_priv) {
135 seq_buf_init(&s, buf, PAGE_SIZE - 1);
137 seq_buf_printf(&s, "Mitigation: ");
140 seq_buf_printf(&s, "RFI Flush");
142 if (rfi_flush && thread_priv)
143 seq_buf_printf(&s, ", ");
146 seq_buf_printf(&s, "L1D private per thread");
148 seq_buf_printf(&s, "\n");
153 if (!security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) &&
154 !security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR))
155 return sprintf(buf, "Not affected\n");
157 return sprintf(buf, "Vulnerable\n");
161 ssize_t cpu_show_spectre_v1(struct device *dev, struct device_attribute *attr, char *buf)
165 seq_buf_init(&s, buf, PAGE_SIZE - 1);
167 if (security_ftr_enabled(SEC_FTR_BNDS_CHK_SPEC_BAR)) {
168 if (barrier_nospec_enabled)
169 seq_buf_printf(&s, "Mitigation: __user pointer sanitization");
171 seq_buf_printf(&s, "Vulnerable");
173 if (security_ftr_enabled(SEC_FTR_SPEC_BAR_ORI31))
174 seq_buf_printf(&s, ", ori31 speculation barrier enabled");
176 seq_buf_printf(&s, "\n");
178 seq_buf_printf(&s, "Not affected\n");
183 ssize_t cpu_show_spectre_v2(struct device *dev, struct device_attribute *attr, char *buf)
188 seq_buf_init(&s, buf, PAGE_SIZE - 1);
190 bcs = security_ftr_enabled(SEC_FTR_BCCTRL_SERIALISED);
191 ccd = security_ftr_enabled(SEC_FTR_COUNT_CACHE_DISABLED);
193 if (bcs || ccd || count_cache_flush_type != COUNT_CACHE_FLUSH_NONE) {
195 seq_buf_printf(&s, "Mitigation: ");
198 seq_buf_printf(&s, "Indirect branch serialisation (kernel only)");
204 seq_buf_printf(&s, ", ");
205 seq_buf_printf(&s, "Indirect branch cache disabled");
210 seq_buf_printf(&s, ", ");
212 seq_buf_printf(&s, "Software count cache flush");
214 if (count_cache_flush_type == COUNT_CACHE_FLUSH_HW)
215 seq_buf_printf(&s, "(hardware accelerated)");
216 } else if (btb_flush_enabled) {
217 seq_buf_printf(&s, "Mitigation: Branch predictor state flush");
219 seq_buf_printf(&s, "Vulnerable");
222 seq_buf_printf(&s, "\n");
227 #ifdef CONFIG_PPC_BOOK3S_64
229 * Store-forwarding barrier support.
232 static enum stf_barrier_type stf_enabled_flush_types;
233 static bool no_stf_barrier;
236 static int __init handle_no_stf_barrier(char *p)
238 pr_info("stf-barrier: disabled on command line.");
239 no_stf_barrier = true;
243 early_param("no_stf_barrier", handle_no_stf_barrier);
245 /* This is the generic flag used by other architectures */
246 static int __init handle_ssbd(char *p)
248 if (!p || strncmp(p, "auto", 5) == 0 || strncmp(p, "on", 2) == 0 ) {
249 /* Until firmware tells us, we have the barrier with auto */
251 } else if (strncmp(p, "off", 3) == 0) {
252 handle_no_stf_barrier(NULL);
259 early_param("spec_store_bypass_disable", handle_ssbd);
261 /* This is the generic flag used by other architectures */
262 static int __init handle_no_ssbd(char *p)
264 handle_no_stf_barrier(NULL);
267 early_param("nospec_store_bypass_disable", handle_no_ssbd);
269 static void stf_barrier_enable(bool enable)
272 do_stf_barrier_fixups(stf_enabled_flush_types);
274 do_stf_barrier_fixups(STF_BARRIER_NONE);
276 stf_barrier = enable;
279 void setup_stf_barrier(void)
281 enum stf_barrier_type type;
284 hv = cpu_has_feature(CPU_FTR_HVMODE);
286 /* Default to fallback in case fw-features are not available */
287 if (cpu_has_feature(CPU_FTR_ARCH_300))
288 type = STF_BARRIER_EIEIO;
289 else if (cpu_has_feature(CPU_FTR_ARCH_207S))
290 type = STF_BARRIER_SYNC_ORI;
291 else if (cpu_has_feature(CPU_FTR_ARCH_206))
292 type = STF_BARRIER_FALLBACK;
294 type = STF_BARRIER_NONE;
296 enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
297 (security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR) ||
298 (security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) && hv));
300 if (type == STF_BARRIER_FALLBACK) {
301 pr_info("stf-barrier: fallback barrier available\n");
302 } else if (type == STF_BARRIER_SYNC_ORI) {
303 pr_info("stf-barrier: hwsync barrier available\n");
304 } else if (type == STF_BARRIER_EIEIO) {
305 pr_info("stf-barrier: eieio barrier available\n");
308 stf_enabled_flush_types = type;
311 stf_barrier_enable(enable);
314 ssize_t cpu_show_spec_store_bypass(struct device *dev, struct device_attribute *attr, char *buf)
316 if (stf_barrier && stf_enabled_flush_types != STF_BARRIER_NONE) {
318 switch (stf_enabled_flush_types) {
319 case STF_BARRIER_EIEIO:
322 case STF_BARRIER_SYNC_ORI:
325 case STF_BARRIER_FALLBACK:
331 return sprintf(buf, "Mitigation: Kernel entry/exit barrier (%s)\n", type);
334 if (!security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) &&
335 !security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR))
336 return sprintf(buf, "Not affected\n");
338 return sprintf(buf, "Vulnerable\n");
341 #ifdef CONFIG_DEBUG_FS
342 static int stf_barrier_set(void *data, u64 val)
353 /* Only do anything if we're changing state */
354 if (enable != stf_barrier)
355 stf_barrier_enable(enable);
360 static int stf_barrier_get(void *data, u64 *val)
362 *val = stf_barrier ? 1 : 0;
366 DEFINE_SIMPLE_ATTRIBUTE(fops_stf_barrier, stf_barrier_get, stf_barrier_set, "%llu\n");
368 static __init int stf_barrier_debugfs_init(void)
370 debugfs_create_file("stf_barrier", 0600, powerpc_debugfs_root, NULL, &fops_stf_barrier);
373 device_initcall(stf_barrier_debugfs_init);
374 #endif /* CONFIG_DEBUG_FS */
376 static void toggle_count_cache_flush(bool enable)
378 if (!enable || !security_ftr_enabled(SEC_FTR_FLUSH_COUNT_CACHE)) {
379 patch_instruction_site(&patch__call_flush_count_cache, PPC_INST_NOP);
380 count_cache_flush_type = COUNT_CACHE_FLUSH_NONE;
381 pr_info("count-cache-flush: software flush disabled.\n");
385 patch_branch_site(&patch__call_flush_count_cache,
386 (u64)&flush_count_cache, BRANCH_SET_LINK);
388 if (!security_ftr_enabled(SEC_FTR_BCCTR_FLUSH_ASSIST)) {
389 count_cache_flush_type = COUNT_CACHE_FLUSH_SW;
390 pr_info("count-cache-flush: full software flush sequence enabled.\n");
394 patch_instruction_site(&patch__flush_count_cache_return, PPC_INST_BLR);
395 count_cache_flush_type = COUNT_CACHE_FLUSH_HW;
396 pr_info("count-cache-flush: hardware assisted flush sequence enabled\n");
399 void setup_count_cache_flush(void)
401 toggle_count_cache_flush(true);
404 #ifdef CONFIG_DEBUG_FS
405 static int count_cache_flush_set(void *data, u64 val)
416 toggle_count_cache_flush(enable);
421 static int count_cache_flush_get(void *data, u64 *val)
423 if (count_cache_flush_type == COUNT_CACHE_FLUSH_NONE)
431 DEFINE_SIMPLE_ATTRIBUTE(fops_count_cache_flush, count_cache_flush_get,
432 count_cache_flush_set, "%llu\n");
434 static __init int count_cache_flush_debugfs_init(void)
436 debugfs_create_file("count_cache_flush", 0600, powerpc_debugfs_root,
437 NULL, &fops_count_cache_flush);
440 device_initcall(count_cache_flush_debugfs_init);
441 #endif /* CONFIG_DEBUG_FS */
442 #endif /* CONFIG_PPC_BOOK3S_64 */