2 * Derived from arch/i386/kernel/irq.c
3 * Copyright (C) 1992 Linus Torvalds
4 * Adapted from arch/i386 by Gary Thomas
5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
6 * Updated and modified by Cort Dougan <cort@fsmlabs.com>
7 * Copyright (C) 1996-2001 Cort Dougan
8 * Adapted for Power Macintosh by Paul Mackerras
9 * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
16 * This file contains the code used by various IRQ handling routines:
17 * asking for different IRQ's should be done through these routines
18 * instead of just grabbing them. Thus setups with different IRQ numbers
19 * shouldn't result in any weird surprises, and installing new handlers
22 * The MPC8xx has an interrupt mask in the SIU. If a bit is set, the
23 * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit
24 * mask register (of which only 16 are defined), hence the weird shifting
25 * and complement of the cached_irq_mask. I want to be able to stuff
26 * this right into the SIU SMASK register.
27 * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx
28 * to reduce code space and undefined function references.
33 #include <linux/export.h>
34 #include <linux/threads.h>
35 #include <linux/kernel_stat.h>
36 #include <linux/signal.h>
37 #include <linux/sched.h>
38 #include <linux/ptrace.h>
39 #include <linux/ioport.h>
40 #include <linux/interrupt.h>
41 #include <linux/timex.h>
42 #include <linux/init.h>
43 #include <linux/slab.h>
44 #include <linux/delay.h>
45 #include <linux/irq.h>
46 #include <linux/seq_file.h>
47 #include <linux/cpumask.h>
48 #include <linux/profile.h>
49 #include <linux/bitops.h>
50 #include <linux/list.h>
51 #include <linux/radix-tree.h>
52 #include <linux/mutex.h>
53 #include <linux/pci.h>
54 #include <linux/debugfs.h>
56 #include <linux/of_irq.h>
58 #include <asm/uaccess.h>
60 #include <asm/pgtable.h>
62 #include <asm/cache.h>
64 #include <asm/ptrace.h>
65 #include <asm/machdep.h>
68 #include <asm/debug.h>
69 #include <asm/livepatch.h>
73 #include <asm/firmware.h>
74 #include <asm/lv1call.h>
76 #define CREATE_TRACE_POINTS
77 #include <asm/trace.h>
78 #include <asm/cpu_has_feature.h>
80 DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);
81 EXPORT_PER_CPU_SYMBOL(irq_stat);
83 int __irq_offset_value;
86 EXPORT_SYMBOL(__irq_offset_value);
87 atomic_t ppc_n_lost_interrupts;
90 extern int tau_initialized;
91 extern int tau_interrupts(int);
93 #endif /* CONFIG_PPC32 */
97 int distribute_irqs = 1;
99 static inline notrace unsigned long get_irq_happened(void)
101 unsigned long happened;
103 __asm__ __volatile__("lbz %0,%1(13)"
104 : "=r" (happened) : "i" (offsetof(struct paca_struct, irq_happened)));
109 static inline notrace void set_soft_enabled(unsigned long enable)
111 __asm__ __volatile__("stb %0,%1(13)"
112 : : "r" (enable), "i" (offsetof(struct paca_struct, soft_enabled)));
115 static inline notrace int decrementer_check_overflow(void)
117 u64 now = get_tb_or_rtc();
118 u64 *next_tb = this_cpu_ptr(&decrementers_next_tb);
120 return now >= *next_tb;
123 /* This is called whenever we are re-enabling interrupts
124 * and returns either 0 (nothing to do) or 500/900/280/a00/e80 if
125 * there's an EE, DEC or DBELL to generate.
127 * This is called in two contexts: From arch_local_irq_restore()
128 * before soft-enabling interrupts, and from the exception exit
129 * path when returning from an interrupt from a soft-disabled to
130 * a soft enabled context. In both case we have interrupts hard
133 * We take care of only clearing the bits we handled in the
134 * PACA irq_happened field since we can only re-emit one at a
135 * time and we don't want to "lose" one.
137 notrace unsigned int __check_irq_replay(void)
140 * We use local_paca rather than get_paca() to avoid all
141 * the debug_smp_processor_id() business in this low level
144 unsigned char happened = local_paca->irq_happened;
146 /* Clear bit 0 which we wouldn't clear otherwise */
147 local_paca->irq_happened &= ~PACA_IRQ_HARD_DIS;
150 * Force the delivery of pending soft-disabled interrupts on PS3.
151 * Any HV call will have this side effect.
153 if (firmware_has_feature(FW_FEATURE_PS3_LV1)) {
155 lv1_get_version_info(&tmp, &tmp2);
159 * We may have missed a decrementer interrupt. We check the
160 * decrementer itself rather than the paca irq_happened field
161 * in case we also had a rollover while hard disabled
163 local_paca->irq_happened &= ~PACA_IRQ_DEC;
164 if ((happened & PACA_IRQ_DEC) || decrementer_check_overflow())
167 /* Finally check if an external interrupt happened */
168 local_paca->irq_happened &= ~PACA_IRQ_EE;
169 if (happened & PACA_IRQ_EE)
172 #ifdef CONFIG_PPC_BOOK3E
173 /* Finally check if an EPR external interrupt happened
174 * this bit is typically set if we need to handle another
175 * "edge" interrupt from within the MPIC "EPR" handler
177 local_paca->irq_happened &= ~PACA_IRQ_EE_EDGE;
178 if (happened & PACA_IRQ_EE_EDGE)
181 local_paca->irq_happened &= ~PACA_IRQ_DBELL;
182 if (happened & PACA_IRQ_DBELL)
185 local_paca->irq_happened &= ~PACA_IRQ_DBELL;
186 if (happened & PACA_IRQ_DBELL) {
187 if (cpu_has_feature(CPU_FTR_HVMODE))
191 #endif /* CONFIG_PPC_BOOK3E */
193 /* Check if an hypervisor Maintenance interrupt happened */
194 local_paca->irq_happened &= ~PACA_IRQ_HMI;
195 if (happened & PACA_IRQ_HMI)
198 /* There should be nothing left ! */
199 BUG_ON(local_paca->irq_happened != 0);
204 notrace void arch_local_irq_restore(unsigned long en)
206 unsigned char irq_happened;
209 /* Write the new soft-enabled value */
210 set_soft_enabled(en);
214 * From this point onward, we can take interrupts, preempt,
215 * etc... unless we got hard-disabled. We check if an event
216 * happened. If none happened, we know we can just return.
218 * We may have preempted before the check below, in which case
219 * we are checking the "new" CPU instead of the old one. This
220 * is only a problem if an event happened on the "old" CPU.
222 * External interrupt events will have caused interrupts to
223 * be hard-disabled, so there is no problem, we
224 * cannot have preempted.
226 irq_happened = get_irq_happened();
231 * We need to hard disable to get a trusted value from
232 * __check_irq_replay(). We also need to soft-disable
233 * again to avoid warnings in there due to the use of
236 * We know that if the value in irq_happened is exactly 0x01
237 * then we are already hard disabled (there are other less
238 * common cases that we'll ignore for now), so we skip the
239 * (expensive) mtmsrd.
241 if (unlikely(irq_happened != PACA_IRQ_HARD_DIS))
242 __hard_irq_disable();
243 #ifdef CONFIG_TRACE_IRQFLAGS
246 * We should already be hard disabled here. We had bugs
247 * where that wasn't the case so let's dbl check it and
248 * warn if we are wrong. Only do that when IRQ tracing
249 * is enabled as mfmsr() can be costly.
251 if (WARN_ON(mfmsr() & MSR_EE))
252 __hard_irq_disable();
254 #endif /* CONFIG_TRACE_IRQFLAGS */
259 * Check if anything needs to be re-emitted. We haven't
260 * soft-enabled yet to avoid warnings in decrementer_check_overflow
261 * accessing per-cpu variables
263 replay = __check_irq_replay();
265 /* We can soft-enable now */
269 * And replay if we have to. This will return with interrupts
273 __replay_interrupt(replay);
277 /* Finally, let's ensure we are hard enabled */
280 EXPORT_SYMBOL(arch_local_irq_restore);
283 * This is specifically called by assembly code to re-enable interrupts
284 * if they are currently disabled. This is typically called before
285 * schedule() or do_signal() when returning to userspace. We do it
286 * in C to avoid the burden of dealing with lockdep etc...
288 * NOTE: This is called with interrupts hard disabled but not marked
289 * as such in paca->irq_happened, so we need to resync this.
291 void notrace restore_interrupts(void)
293 if (irqs_disabled()) {
294 local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
301 * This is a helper to use when about to go into idle low-power
302 * when the latter has the side effect of re-enabling interrupts
303 * (such as calling H_CEDE under pHyp).
305 * You call this function with interrupts soft-disabled (this is
306 * already the case when ppc_md.power_save is called). The function
307 * will return whether to enter power save or just return.
309 * In the former case, it will have notified lockdep of interrupts
310 * being re-enabled and generally sanitized the lazy irq state,
311 * and in the latter case it will leave with interrupts hard
312 * disabled and marked as such, so the local_irq_enable() call
313 * in arch_cpu_idle() will properly re-enable everything.
315 bool prep_irq_for_idle(void)
318 * First we need to hard disable to ensure no interrupt
319 * occurs before we effectively enter the low power state
324 * If anything happened while we were soft-disabled,
325 * we return now and do not enter the low power state.
327 if (lazy_irq_pending())
330 /* Tell lockdep we are about to re-enable */
334 * Mark interrupts as soft-enabled and clear the
335 * PACA_IRQ_HARD_DIS from the pending mask since we
336 * are about to hard enable as well as a side effect
337 * of entering the low power state.
339 local_paca->irq_happened &= ~PACA_IRQ_HARD_DIS;
340 local_paca->soft_enabled = 1;
342 /* Tell the caller to enter the low power state */
347 * Force a replay of the external interrupt handler on this CPU.
349 void force_external_irq_replay(void)
352 * This must only be called with interrupts soft-disabled,
353 * the replay will happen when re-enabling.
355 WARN_ON(!arch_irqs_disabled());
357 /* Indicate in the PACA that we have an interrupt to replay */
358 local_paca->irq_happened |= PACA_IRQ_EE;
361 #endif /* CONFIG_PPC64 */
363 int arch_show_interrupts(struct seq_file *p, int prec)
367 #if defined(CONFIG_PPC32) && defined(CONFIG_TAU_INT)
368 if (tau_initialized) {
369 seq_printf(p, "%*s: ", prec, "TAU");
370 for_each_online_cpu(j)
371 seq_printf(p, "%10u ", tau_interrupts(j));
372 seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n");
374 #endif /* CONFIG_PPC32 && CONFIG_TAU_INT */
376 seq_printf(p, "%*s: ", prec, "LOC");
377 for_each_online_cpu(j)
378 seq_printf(p, "%10u ", per_cpu(irq_stat, j).timer_irqs_event);
379 seq_printf(p, " Local timer interrupts for timer event device\n");
381 seq_printf(p, "%*s: ", prec, "LOC");
382 for_each_online_cpu(j)
383 seq_printf(p, "%10u ", per_cpu(irq_stat, j).timer_irqs_others);
384 seq_printf(p, " Local timer interrupts for others\n");
386 seq_printf(p, "%*s: ", prec, "SPU");
387 for_each_online_cpu(j)
388 seq_printf(p, "%10u ", per_cpu(irq_stat, j).spurious_irqs);
389 seq_printf(p, " Spurious interrupts\n");
391 seq_printf(p, "%*s: ", prec, "PMI");
392 for_each_online_cpu(j)
393 seq_printf(p, "%10u ", per_cpu(irq_stat, j).pmu_irqs);
394 seq_printf(p, " Performance monitoring interrupts\n");
396 seq_printf(p, "%*s: ", prec, "MCE");
397 for_each_online_cpu(j)
398 seq_printf(p, "%10u ", per_cpu(irq_stat, j).mce_exceptions);
399 seq_printf(p, " Machine check exceptions\n");
401 if (cpu_has_feature(CPU_FTR_HVMODE)) {
402 seq_printf(p, "%*s: ", prec, "HMI");
403 for_each_online_cpu(j)
404 seq_printf(p, "%10u ",
405 per_cpu(irq_stat, j).hmi_exceptions);
406 seq_printf(p, " Hypervisor Maintenance Interrupts\n");
409 #ifdef CONFIG_PPC_DOORBELL
410 if (cpu_has_feature(CPU_FTR_DBELL)) {
411 seq_printf(p, "%*s: ", prec, "DBL");
412 for_each_online_cpu(j)
413 seq_printf(p, "%10u ", per_cpu(irq_stat, j).doorbell_irqs);
414 seq_printf(p, " Doorbell interrupts\n");
424 u64 arch_irq_stat_cpu(unsigned int cpu)
426 u64 sum = per_cpu(irq_stat, cpu).timer_irqs_event;
428 sum += per_cpu(irq_stat, cpu).pmu_irqs;
429 sum += per_cpu(irq_stat, cpu).mce_exceptions;
430 sum += per_cpu(irq_stat, cpu).spurious_irqs;
431 sum += per_cpu(irq_stat, cpu).timer_irqs_others;
432 sum += per_cpu(irq_stat, cpu).hmi_exceptions;
433 #ifdef CONFIG_PPC_DOORBELL
434 sum += per_cpu(irq_stat, cpu).doorbell_irqs;
440 #ifdef CONFIG_HOTPLUG_CPU
441 void migrate_irqs(void)
443 struct irq_desc *desc;
447 const struct cpumask *map = cpu_online_mask;
449 alloc_cpumask_var(&mask, GFP_KERNEL);
451 for_each_irq_desc(irq, desc) {
452 struct irq_data *data;
453 struct irq_chip *chip;
455 data = irq_desc_get_irq_data(desc);
456 if (irqd_is_per_cpu(data))
459 chip = irq_data_get_irq_chip(data);
461 cpumask_and(mask, irq_data_get_affinity_mask(data), map);
462 if (cpumask_any(mask) >= nr_cpu_ids) {
463 pr_warn("Breaking affinity for irq %i\n", irq);
464 cpumask_copy(mask, map);
466 if (chip->irq_set_affinity)
467 chip->irq_set_affinity(data, mask, true);
468 else if (desc->action && !(warned++))
469 pr_err("Cannot set affinity for irq %i\n", irq);
472 free_cpumask_var(mask);
480 static inline void check_stack_overflow(void)
482 #ifdef CONFIG_DEBUG_STACKOVERFLOW
485 sp = current_stack_pointer() & (THREAD_SIZE-1);
487 /* check for stack overflow: is there less than 2KB free? */
488 if (unlikely(sp < (sizeof(struct thread_info) + 2048))) {
489 pr_err("do_IRQ: stack overflow: %ld\n",
490 sp - sizeof(struct thread_info));
496 void __do_irq(struct pt_regs *regs)
502 trace_irq_entry(regs);
504 check_stack_overflow();
507 * Query the platform PIC for the interrupt & ack it.
509 * This will typically lower the interrupt line to the CPU
511 irq = ppc_md.get_irq();
513 /* We can hard enable interrupts now to allow perf interrupts */
514 may_hard_irq_enable();
516 /* And finally process it */
517 if (unlikely(irq == NO_IRQ))
518 __this_cpu_inc(irq_stat.spurious_irqs);
520 generic_handle_irq(irq);
522 trace_irq_exit(regs);
527 void do_IRQ(struct pt_regs *regs)
529 struct pt_regs *old_regs = set_irq_regs(regs);
530 struct thread_info *curtp, *irqtp, *sirqtp;
532 /* Switch to the irq stack to handle this */
533 curtp = current_thread_info();
534 irqtp = hardirq_ctx[raw_smp_processor_id()];
535 sirqtp = softirq_ctx[raw_smp_processor_id()];
537 /* Already there ? */
538 if (unlikely(curtp == irqtp || curtp == sirqtp)) {
540 set_irq_regs(old_regs);
544 /* Prepare the thread_info in the irq stack */
545 irqtp->task = curtp->task;
548 /* Copy the preempt_count so that the [soft]irq checks work. */
549 irqtp->preempt_count = curtp->preempt_count;
551 /* Switch stack and call */
552 call_do_irq(regs, irqtp);
554 /* Restore stack limit */
557 /* Copy back updates to the thread_info */
559 set_bits(irqtp->flags, &curtp->flags);
561 set_irq_regs(old_regs);
564 void __init init_IRQ(void)
574 #if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
575 struct thread_info *critirq_ctx[NR_CPUS] __read_mostly;
576 struct thread_info *dbgirq_ctx[NR_CPUS] __read_mostly;
577 struct thread_info *mcheckirq_ctx[NR_CPUS] __read_mostly;
579 void exc_lvl_ctx_init(void)
581 struct thread_info *tp;
584 for_each_possible_cpu(i) {
589 cpu_nr = get_hard_smp_processor_id(i);
595 memset((void *)critirq_ctx[cpu_nr], 0, THREAD_SIZE);
596 tp = critirq_ctx[cpu_nr];
598 tp->preempt_count = 0;
601 memset((void *)dbgirq_ctx[cpu_nr], 0, THREAD_SIZE);
602 tp = dbgirq_ctx[cpu_nr];
604 tp->preempt_count = 0;
606 memset((void *)mcheckirq_ctx[cpu_nr], 0, THREAD_SIZE);
607 tp = mcheckirq_ctx[cpu_nr];
609 tp->preempt_count = HARDIRQ_OFFSET;
615 struct thread_info *softirq_ctx[NR_CPUS] __read_mostly;
616 struct thread_info *hardirq_ctx[NR_CPUS] __read_mostly;
618 void irq_ctx_init(void)
620 struct thread_info *tp;
623 for_each_possible_cpu(i) {
624 memset((void *)softirq_ctx[i], 0, THREAD_SIZE);
627 klp_init_thread_info(tp);
629 memset((void *)hardirq_ctx[i], 0, THREAD_SIZE);
632 klp_init_thread_info(tp);
636 void do_softirq_own_stack(void)
638 struct thread_info *curtp, *irqtp;
640 curtp = current_thread_info();
641 irqtp = softirq_ctx[smp_processor_id()];
642 irqtp->task = curtp->task;
644 call_do_softirq(irqtp);
647 /* Set any flag that may have been set on the
651 set_bits(irqtp->flags, &curtp->flags);
654 irq_hw_number_t virq_to_hw(unsigned int virq)
656 struct irq_data *irq_data = irq_get_irq_data(virq);
657 return WARN_ON(!irq_data) ? 0 : irq_data->hwirq;
659 EXPORT_SYMBOL_GPL(virq_to_hw);
662 int irq_choose_cpu(const struct cpumask *mask)
666 if (cpumask_equal(mask, cpu_online_mask)) {
667 static int irq_rover;
668 static DEFINE_RAW_SPINLOCK(irq_rover_lock);
671 /* Round-robin distribution... */
673 raw_spin_lock_irqsave(&irq_rover_lock, flags);
675 irq_rover = cpumask_next(irq_rover, cpu_online_mask);
676 if (irq_rover >= nr_cpu_ids)
677 irq_rover = cpumask_first(cpu_online_mask);
681 raw_spin_unlock_irqrestore(&irq_rover_lock, flags);
683 cpuid = cpumask_first_and(mask, cpu_online_mask);
684 if (cpuid >= nr_cpu_ids)
688 return get_hard_smp_processor_id(cpuid);
691 int irq_choose_cpu(const struct cpumask *mask)
693 return hard_smp_processor_id();
697 int arch_early_irq_init(void)
703 static int __init setup_noirqdistrib(char *str)
709 __setup("noirqdistrib", setup_noirqdistrib);
710 #endif /* CONFIG_PPC64 */