2 * Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corporation
4 * Provide default implementations of the DMA mapping callbacks for
5 * directly mapped busses.
8 #include <linux/device.h>
9 #include <linux/dma-mapping.h>
10 #include <linux/dma-debug.h>
11 #include <linux/gfp.h>
12 #include <linux/memblock.h>
13 #include <linux/export.h>
15 #include <asm/abs_addr.h>
16 #include <asm/machdep.h>
19 * Generic direct DMA implementation
21 * This implementation supports a per-device offset that can be applied if
22 * the address at which memory is visible to devices is not 0. Platform code
23 * can set archdata.dma_data to an unsigned long holding the offset. By
24 * default the offset is PCI_DRAM_OFFSET.
28 void *dma_direct_alloc_coherent(struct device *dev, size_t size,
29 dma_addr_t *dma_handle, gfp_t flag,
30 struct dma_attrs *attrs)
33 #ifdef CONFIG_NOT_COHERENT_CACHE
34 ret = __dma_alloc_coherent(dev, size, dma_handle, flag);
37 *dma_handle += get_dma_offset(dev);
41 int node = dev_to_node(dev);
43 /* ignore region specifiers */
44 flag &= ~(__GFP_HIGHMEM);
46 page = alloc_pages_node(node, flag, get_order(size));
49 ret = page_address(page);
51 *dma_handle = virt_to_abs(ret) + get_dma_offset(dev);
57 void dma_direct_free_coherent(struct device *dev, size_t size,
58 void *vaddr, dma_addr_t dma_handle,
59 struct dma_attrs *attrs)
61 #ifdef CONFIG_NOT_COHERENT_CACHE
62 __dma_free_coherent(size, vaddr);
64 free_pages((unsigned long)vaddr, get_order(size));
68 int dma_direct_mmap_coherent(struct device *dev, struct vm_area_struct *vma,
69 void *cpu_addr, dma_addr_t handle, size_t size,
70 struct dma_attrs *attrs)
74 #ifdef CONFIG_NOT_COHERENT_CACHE
75 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
76 pfn = __dma_get_coherent_pfn((unsigned long)cpu_addr);
78 pfn = page_to_pfn(virt_to_page(cpu_addr));
80 return remap_pfn_range(vma, vma->vm_start,
82 vma->vm_end - vma->vm_start,
86 static int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl,
87 int nents, enum dma_data_direction direction,
88 struct dma_attrs *attrs)
90 struct scatterlist *sg;
93 for_each_sg(sgl, sg, nents, i) {
94 sg->dma_address = sg_phys(sg) + get_dma_offset(dev);
95 sg->dma_length = sg->length;
96 __dma_sync_page(sg_page(sg), sg->offset, sg->length, direction);
102 static void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sg,
103 int nents, enum dma_data_direction direction,
104 struct dma_attrs *attrs)
108 static int dma_direct_dma_supported(struct device *dev, u64 mask)
111 /* Could be improved so platforms can set the limit in case
112 * they have limited DMA windows
114 return mask >= get_dma_offset(dev) + (memblock_end_of_DRAM() - 1);
120 static u64 dma_direct_get_required_mask(struct device *dev)
124 end = memblock_end_of_DRAM() + get_dma_offset(dev);
126 mask = 1ULL << (fls64(end) - 1);
132 static inline dma_addr_t dma_direct_map_page(struct device *dev,
134 unsigned long offset,
136 enum dma_data_direction dir,
137 struct dma_attrs *attrs)
139 BUG_ON(dir == DMA_NONE);
140 __dma_sync_page(page, offset, size, dir);
141 return page_to_phys(page) + offset + get_dma_offset(dev);
144 static inline void dma_direct_unmap_page(struct device *dev,
145 dma_addr_t dma_address,
147 enum dma_data_direction direction,
148 struct dma_attrs *attrs)
152 #ifdef CONFIG_NOT_COHERENT_CACHE
153 static inline void dma_direct_sync_sg(struct device *dev,
154 struct scatterlist *sgl, int nents,
155 enum dma_data_direction direction)
157 struct scatterlist *sg;
160 for_each_sg(sgl, sg, nents, i)
161 __dma_sync_page(sg_page(sg), sg->offset, sg->length, direction);
164 static inline void dma_direct_sync_single(struct device *dev,
165 dma_addr_t dma_handle, size_t size,
166 enum dma_data_direction direction)
168 __dma_sync(bus_to_virt(dma_handle), size, direction);
172 struct dma_map_ops dma_direct_ops = {
173 .alloc = dma_direct_alloc_coherent,
174 .free = dma_direct_free_coherent,
175 .mmap = dma_direct_mmap_coherent,
176 .map_sg = dma_direct_map_sg,
177 .unmap_sg = dma_direct_unmap_sg,
178 .dma_supported = dma_direct_dma_supported,
179 .map_page = dma_direct_map_page,
180 .unmap_page = dma_direct_unmap_page,
181 .get_required_mask = dma_direct_get_required_mask,
182 #ifdef CONFIG_NOT_COHERENT_CACHE
183 .sync_single_for_cpu = dma_direct_sync_single,
184 .sync_single_for_device = dma_direct_sync_single,
185 .sync_sg_for_cpu = dma_direct_sync_sg,
186 .sync_sg_for_device = dma_direct_sync_sg,
189 EXPORT_SYMBOL(dma_direct_ops);
191 #define PREALLOC_DMA_DEBUG_ENTRIES (1 << 16)
193 int dma_set_mask(struct device *dev, u64 dma_mask)
195 struct dma_map_ops *dma_ops = get_dma_ops(dev);
197 if (ppc_md.dma_set_mask)
198 return ppc_md.dma_set_mask(dev, dma_mask);
199 if ((dma_ops != NULL) && (dma_ops->set_dma_mask != NULL))
200 return dma_ops->set_dma_mask(dev, dma_mask);
201 if (!dev->dma_mask || !dma_supported(dev, dma_mask))
203 *dev->dma_mask = dma_mask;
206 EXPORT_SYMBOL(dma_set_mask);
208 u64 dma_get_required_mask(struct device *dev)
210 struct dma_map_ops *dma_ops = get_dma_ops(dev);
212 if (ppc_md.dma_get_required_mask)
213 return ppc_md.dma_get_required_mask(dev);
215 if (unlikely(dma_ops == NULL))
218 if (dma_ops->get_required_mask)
219 return dma_ops->get_required_mask(dev);
221 return DMA_BIT_MASK(8 * sizeof(dma_addr_t));
223 EXPORT_SYMBOL_GPL(dma_get_required_mask);
225 static int __init dma_init(void)
227 dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
231 fs_initcall(dma_init);