arch/powerpc/include/asm/exception-64s.h

   1 #ifndef _ASM_POWERPC_EXCEPTION_H
   2 #define _ASM_POWERPC_EXCEPTION_H
   3 /*
   4  * Extracted from head_64.S
   5  *
   6  *  PowerPC version
   7  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
   8  *
   9  *  Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
  10  *    Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
  11  *  Adapted for Power Macintosh by Paul Mackerras.
  12  *  Low-level exception handlers and MMU support
  13  *  rewritten by Paul Mackerras.
  14  *    Copyright (C) 1996 Paul Mackerras.
  15  *
  16  *  Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
  17  *    Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
  18  *
  19  *  This file contains the low-level support and setup for the
  20  *  PowerPC-64 platform, including trap and interrupt dispatch.
  21  *
  22  *  This program is free software; you can redistribute it and/or
  23  *  modify it under the terms of the GNU General Public License
  24  *  as published by the Free Software Foundation; either version
  25  *  2 of the License, or (at your option) any later version.
  26  */
  27 /*
  28  * The following macros define the code that appears as
  29  * the prologue to each of the exception handlers.  They
  30  * are split into two parts to allow a single kernel binary
  31  * to be used for pSeries and iSeries.
  32  *
  33  * We make as much of the exception code common between native
  34  * exception handlers (including pSeries LPAR) and iSeries LPAR
  35  * implementations as possible.
  36  */
  37 #include <asm/head-64.h>
  38 #include <asm/feature-fixups.h>
  39
  40 /* PACA save area offsets (exgen, exmc, etc) */
  41 #define EX_R9           0
  42 #define EX_R10          8
  43 #define EX_R11          16
  44 #define EX_R12          24
  45 #define EX_R13          32
  46 #define EX_DAR          40
  47 #define EX_DSISR        48
  48 #define EX_CCR          52
  49 #define EX_CFAR         56
  50 #define EX_PPR          64
  51 #if defined(CONFIG_RELOCATABLE)
  52 #define EX_CTR          72
  53 #define EX_SIZE         10      /* size in u64 units */
  54 #else
  55 #define EX_SIZE         9       /* size in u64 units */
  56 #endif
  57
  58 /*
  59  * maximum recursive depth of MCE exceptions
  60  */
  61 #define MAX_MCE_DEPTH   4
  62
  63 /*
  64  * EX_R3 is only used by the bad_stack handler. bad_stack reloads and
  65  * saves DAR from SPRN_DAR, and EX_DAR is not used. So EX_R3 can overlap
  66  * with EX_DAR.
  67  */
  68 #define EX_R3           EX_DAR
  69
  70 #ifdef __ASSEMBLY__
  71
  72 #define STF_ENTRY_BARRIER_SLOT                                          \
  73         STF_ENTRY_BARRIER_FIXUP_SECTION;                                \
  74         nop;                                                            \
  75         nop;                                                            \
  76         nop
  77
  78 #define STF_EXIT_BARRIER_SLOT                                           \
  79         STF_EXIT_BARRIER_FIXUP_SECTION;                                 \
  80         nop;                                                            \
  81         nop;                                                            \
  82         nop;                                                            \
  83         nop;                                                            \
  84         nop;                                                            \
  85         nop
  86
  87 /*
  88  * r10 must be free to use, r13 must be paca
  89  */
  90 #define INTERRUPT_TO_KERNEL                                             \
  91         STF_ENTRY_BARRIER_SLOT
  92
  93 /*
  94  * Macros for annotating the expected destination of (h)rfid
  95  *
  96  * The nop instructions allow us to insert one or more instructions to flush the
  97  * L1-D cache when returning to userspace or a guest.
  98  */
  99 #define RFI_FLUSH_SLOT                                                  \
 100         RFI_FLUSH_FIXUP_SECTION;                                        \
 101         nop;                                                            \
 102         nop;                                                            \
 103         nop
 104
 105 #define RFI_TO_KERNEL                                                   \
 106         rfid
 107
 108 #define RFI_TO_USER                                                     \
 109         STF_EXIT_BARRIER_SLOT;                                          \
 110         RFI_FLUSH_SLOT;                                                 \
 111         rfid;                                                           \
 112         b       rfi_flush_fallback
 113
 114 #define RFI_TO_USER_OR_KERNEL                                           \
 115         STF_EXIT_BARRIER_SLOT;                                          \
 116         RFI_FLUSH_SLOT;                                                 \
 117         rfid;                                                           \
 118         b       rfi_flush_fallback
 119
 120 #define RFI_TO_GUEST                                                    \
 121         STF_EXIT_BARRIER_SLOT;                                          \
 122         RFI_FLUSH_SLOT;                                                 \
 123         rfid;                                                           \
 124         b       rfi_flush_fallback
 125
 126 #define HRFI_TO_KERNEL                                                  \
 127         hrfid
 128
 129 #define HRFI_TO_USER                                                    \
 130         STF_EXIT_BARRIER_SLOT;                                          \
 131         RFI_FLUSH_SLOT;                                                 \
 132         hrfid;                                                          \
 133         b       hrfi_flush_fallback
 134
 135 #define HRFI_TO_USER_OR_KERNEL                                          \
 136         STF_EXIT_BARRIER_SLOT;                                          \
 137         RFI_FLUSH_SLOT;                                                 \
 138         hrfid;                                                          \
 139         b       hrfi_flush_fallback
 140
 141 #define HRFI_TO_GUEST                                                   \
 142         STF_EXIT_BARRIER_SLOT;                                          \
 143         RFI_FLUSH_SLOT;                                                 \
 144         hrfid;                                                          \
 145         b       hrfi_flush_fallback
 146
 147 #define HRFI_TO_UNKNOWN                                                 \
 148         STF_EXIT_BARRIER_SLOT;                                          \
 149         RFI_FLUSH_SLOT;                                                 \
 150         hrfid;                                                          \
 151         b       hrfi_flush_fallback
 152
 153 /*
 154  * We're short on space and time in the exception prolog, so we can't
 155  * use the normal LOAD_REG_IMMEDIATE macro to load the address of label.
 156  * Instead we get the base of the kernel from paca->kernelbase and or in the low
 157  * part of label. This requires that the label be within 64KB of kernelbase, and
 158  * that kernelbase be 64K aligned.
 159  */
 160 #define LOAD_HANDLER(reg, label)                                        \
 161         ld      reg,PACAKBASE(r13);     /* get high part of &label */   \
 162         ori     reg,reg,FIXED_SYMBOL_ABS_ADDR(label)
 163
 164 #define __LOAD_HANDLER(reg, label)                                      \
 165         ld      reg,PACAKBASE(r13);                                     \
 166         ori     reg,reg,(ABS_ADDR(label))@l
 167
 168 /*
 169  * Branches from unrelocated code (e.g., interrupts) to labels outside
 170  * head-y require >64K offsets.
 171  */
 172 #define __LOAD_FAR_HANDLER(reg, label)                                  \
 173         ld      reg,PACAKBASE(r13);                                     \
 174         ori     reg,reg,(ABS_ADDR(label))@l;                            \
 175         addis   reg,reg,(ABS_ADDR(label))@h
 176
 177 /* Exception register prefixes */
 178 #define EXC_HV          1
 179 #define EXC_STD         0
 180
 181 #if defined(CONFIG_RELOCATABLE)
 182 /*
 183  * If we support interrupts with relocation on AND we're a relocatable kernel,
 184  * we need to use CTR to get to the 2nd level handler.  So, save/restore it
 185  * when required.
 186  */
 187 #define SAVE_CTR(reg, area)     mfctr   reg ;   std     reg,area+EX_CTR(r13)
 188 #define GET_CTR(reg, area)                      ld      reg,area+EX_CTR(r13)
 189 #define RESTORE_CTR(reg, area)  ld      reg,area+EX_CTR(r13) ; mtctr reg
 190 #else
 191 /* ...else CTR is unused and in register. */
 192 #define SAVE_CTR(reg, area)
 193 #define GET_CTR(reg, area)      mfctr   reg
 194 #define RESTORE_CTR(reg, area)
 195 #endif
 196
 197 /*
 198  * PPR save/restore macros used in exceptions_64s.S
 199  * Used for P7 or later processors
 200  */
 201 #define SAVE_PPR(area, ra)                                              \
 202 BEGIN_FTR_SECTION_NESTED(940)                                           \
 203         ld      ra,area+EX_PPR(r13);    /* Read PPR from paca */        \
 204         std     ra,_PPR(r1);                                            \
 205 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,940)
 206
 207 #define RESTORE_PPR_PACA(area, ra)                                      \
 208 BEGIN_FTR_SECTION_NESTED(941)                                           \
 209         ld      ra,area+EX_PPR(r13);                                    \
 210         mtspr   SPRN_PPR,ra;                                            \
 211 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,941)
 212
 213 /*
 214  * Get an SPR into a register if the CPU has the given feature
 215  */
 216 #define OPT_GET_SPR(ra, spr, ftr)                                       \
 217 BEGIN_FTR_SECTION_NESTED(943)                                           \
 218         mfspr   ra,spr;                                                 \
 219 END_FTR_SECTION_NESTED(ftr,ftr,943)
 220
 221 /*
 222  * Set an SPR from a register if the CPU has the given feature
 223  */
 224 #define OPT_SET_SPR(ra, spr, ftr)                                       \
 225 BEGIN_FTR_SECTION_NESTED(943)                                           \
 226         mtspr   spr,ra;                                                 \
 227 END_FTR_SECTION_NESTED(ftr,ftr,943)
 228
 229 /*
 230  * Save a register to the PACA if the CPU has the given feature
 231  */
 232 #define OPT_SAVE_REG_TO_PACA(offset, ra, ftr)                           \
 233 BEGIN_FTR_SECTION_NESTED(943)                                           \
 234         std     ra,offset(r13);                                         \
 235 END_FTR_SECTION_NESTED(ftr,ftr,943)
 236
 237 .macro EXCEPTION_PROLOG_0 area
 238         GET_PACA(r13)
 239         std     r9,\area\()+EX_R9(r13)          /* save r9 */
 240         OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR)
 241         HMT_MEDIUM
 242         std     r10,\area\()+EX_R10(r13)        /* save r10 - r12 */
 243         OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR)
 244 .endm
 245
 246 .macro EXCEPTION_PROLOG_1 hsrr, area, kvm, vec, bitmask
 247         OPT_SAVE_REG_TO_PACA(\area\()+EX_PPR, r9, CPU_FTR_HAS_PPR)
 248         OPT_SAVE_REG_TO_PACA(\area\()+EX_CFAR, r10, CPU_FTR_CFAR)
 249         INTERRUPT_TO_KERNEL
 250         SAVE_CTR(r10, \area\())
 251         mfcr    r9
 252         .if \kvm
 253                 KVMTEST \hsrr \vec
 254         .endif
 255
 256         .if \bitmask
 257                 lbz     r10,PACAIRQSOFTMASK(r13)
 258                 andi.   r10,r10,\bitmask
 259                 /* Associate vector numbers with bits in paca->irq_happened */
 260                 .if \vec == 0x500 || \vec == 0xea0
 261                 li      r10,PACA_IRQ_EE
 262                 .elseif \vec == 0x900
 263                 li      r10,PACA_IRQ_DEC
 264                 .elseif \vec == 0xa00 || \vec == 0xe80
 265                 li      r10,PACA_IRQ_DBELL
 266                 .elseif \vec == 0xe60
 267                 li      r10,PACA_IRQ_HMI
 268                 .elseif \vec == 0xf00
 269                 li      r10,PACA_IRQ_PMI
 270                 .else
 271                 .abort "Bad maskable vector"
 272                 .endif
 273
 274                 .if \hsrr
 275                 bne     masked_Hinterrupt
 276                 .else
 277                 bne     masked_interrupt
 278                 .endif
 279         .endif
 280
 281         std     r11,\area\()+EX_R11(r13)
 282         std     r12,\area\()+EX_R12(r13)
 283         GET_SCRATCH0(r10)
 284         std     r10,\area\()+EX_R13(r13)
 285 .endm
 286
 287 .macro EXCEPTION_PROLOG_2_REAL label, hsrr, set_ri
 288         ld      r10,PACAKMSR(r13)       /* get MSR value for kernel */
 289         .if ! \set_ri
 290         xori    r10,r10,MSR_RI          /* Clear MSR_RI */
 291         .endif
 292         .if \hsrr
 293         mfspr   r11,SPRN_HSRR0          /* save HSRR0 */
 294         .else
 295         mfspr   r11,SPRN_SRR0           /* save SRR0 */
 296         .endif
 297         LOAD_HANDLER(r12, \label\())
 298         .if \hsrr
 299         mtspr   SPRN_HSRR0,r12
 300         mfspr   r12,SPRN_HSRR1          /* and HSRR1 */
 301         mtspr   SPRN_HSRR1,r10
 302         HRFI_TO_KERNEL
 303         .else
 304         mtspr   SPRN_SRR0,r12
 305         mfspr   r12,SPRN_SRR1           /* and SRR1 */
 306         mtspr   SPRN_SRR1,r10
 307         RFI_TO_KERNEL
 308         .endif
 309         b       .       /* prevent speculative execution */
 310 .endm
 311
 312 .macro EXCEPTION_PROLOG_2_VIRT label, hsrr
 313 #ifdef CONFIG_RELOCATABLE
 314         .if \hsrr
 315         mfspr   r11,SPRN_HSRR0  /* save HSRR0 */
 316         .else
 317         mfspr   r11,SPRN_SRR0   /* save SRR0 */
 318         .endif
 319         LOAD_HANDLER(r12, \label\())
 320         mtctr   r12
 321         .if \hsrr
 322         mfspr   r12,SPRN_HSRR1  /* and HSRR1 */
 323         .else
 324         mfspr   r12,SPRN_SRR1   /* and HSRR1 */
 325         .endif
 326         li      r10,MSR_RI
 327         mtmsrd  r10,1           /* Set RI (EE=0) */
 328         bctr
 329 #else
 330         .if \hsrr
 331         mfspr   r11,SPRN_HSRR0          /* save HSRR0 */
 332         mfspr   r12,SPRN_HSRR1          /* and HSRR1 */
 333         .else
 334         mfspr   r11,SPRN_SRR0           /* save SRR0 */
 335         mfspr   r12,SPRN_SRR1           /* and SRR1 */
 336         .endif
 337         li      r10,MSR_RI
 338         mtmsrd  r10,1                   /* Set RI (EE=0) */
 339         b       \label
 340 #endif
 341 .endm
 342
 343 /*
 344  * Branch to label using its 0xC000 address. This results in instruction
 345  * address suitable for MSR[IR]=0 or 1, which allows relocation to be turned
 346  * on using mtmsr rather than rfid.
 347  *
 348  * This could set the 0xc bits for !RELOCATABLE as an immediate, rather than
 349  * load KBASE for a slight optimisation.
 350  */
 351 #define BRANCH_TO_C000(reg, label)                                      \
 352         __LOAD_HANDLER(reg, label);                                     \
 353         mtctr   reg;                                                    \
 354         bctr
 355
 356 #ifdef CONFIG_RELOCATABLE
 357 #define BRANCH_TO_COMMON(reg, label)                                    \
 358         __LOAD_HANDLER(reg, label);                                     \
 359         mtctr   reg;                                                    \
 360         bctr
 361
 362 #define BRANCH_LINK_TO_FAR(label)                                       \
 363         __LOAD_FAR_HANDLER(r12, label);                                 \
 364         mtctr   r12;                                                    \
 365         bctrl
 366
 367 #else
 368 #define BRANCH_TO_COMMON(reg, label)                                    \
 369         b       label
 370
 371 #define BRANCH_LINK_TO_FAR(label)                                       \
 372         bl      label
 373 #endif
 374
 375 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
 376
 377 #ifdef CONFIG_RELOCATABLE
 378 /*
 379  * KVM requires __LOAD_FAR_HANDLER.
 380  *
 381  * __BRANCH_TO_KVM_EXIT branches are also a special case because they
 382  * explicitly use r9 then reload it from PACA before branching. Hence
 383  * the double-underscore.
 384  */
 385 #define __BRANCH_TO_KVM_EXIT(area, label)                               \
 386         mfctr   r9;                                                     \
 387         std     r9,HSTATE_SCRATCH1(r13);                                \
 388         __LOAD_FAR_HANDLER(r9, label);                                  \
 389         mtctr   r9;                                                     \
 390         ld      r9,area+EX_R9(r13);                                     \
 391         bctr
 392
 393 #else
 394 #define __BRANCH_TO_KVM_EXIT(area, label)                               \
 395         ld      r9,area+EX_R9(r13);                                     \
 396         b       label
 397 #endif
 398
 399 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
 400 /*
 401  * If hv is possible, interrupts come into to the hv version
 402  * of the kvmppc_interrupt code, which then jumps to the PR handler,
 403  * kvmppc_interrupt_pr, if the guest is a PR guest.
 404  */
 405 #define kvmppc_interrupt kvmppc_interrupt_hv
 406 #else
 407 #define kvmppc_interrupt kvmppc_interrupt_pr
 408 #endif
 409
 410 .macro KVMTEST hsrr, n
 411         lbz     r10,HSTATE_IN_GUEST(r13)
 412         cmpwi   r10,0
 413         .if \hsrr
 414         bne     do_kvm_H\n
 415         .else
 416         bne     do_kvm_\n
 417         .endif
 418 .endm
 419
 420 .macro KVM_HANDLER area, hsrr, n, skip
 421         .if \skip
 422         cmpwi   r10,KVM_GUEST_MODE_SKIP
 423         beq     89f
 424         .else
 425         BEGIN_FTR_SECTION_NESTED(947)
 426         ld      r10,\area+EX_CFAR(r13)
 427         std     r10,HSTATE_CFAR(r13)
 428         END_FTR_SECTION_NESTED(CPU_FTR_CFAR,CPU_FTR_CFAR,947)
 429         .endif
 430
 431         BEGIN_FTR_SECTION_NESTED(948)
 432         ld      r10,\area+EX_PPR(r13)
 433         std     r10,HSTATE_PPR(r13)
 434         END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948)
 435         ld      r10,\area+EX_R10(r13)
 436         std     r12,HSTATE_SCRATCH0(r13)
 437         sldi    r12,r9,32
 438         /* HSRR variants have the 0x2 bit added to their trap number */
 439         .if \hsrr
 440         ori     r12,r12,(\n + 0x2)
 441         .else
 442         ori     r12,r12,(\n)
 443         .endif
 444         /* This reloads r9 before branching to kvmppc_interrupt */
 445         __BRANCH_TO_KVM_EXIT(\area, kvmppc_interrupt)
 446
 447         .if \skip
 448 89:     mtocrf  0x80,r9
 449         ld      r9,\area+EX_R9(r13)
 450         ld      r10,\area+EX_R10(r13)
 451         .if \hsrr
 452         b       kvmppc_skip_Hinterrupt
 453         .else
 454         b       kvmppc_skip_interrupt
 455         .endif
 456         .endif
 457 .endm
 458
 459 #else
 460 .macro KVMTEST hsrr, n
 461 .endm
 462 .macro KVM_HANDLER area, hsrr, n, skip
 463 .endm
 464 #endif
 465
 466 #define EXCEPTION_PROLOG_COMMON_1()                                        \
 467         std     r9,_CCR(r1);            /* save CR in stackframe        */ \
 468         std     r11,_NIP(r1);           /* save SRR0 in stackframe      */ \
 469         std     r12,_MSR(r1);           /* save SRR1 in stackframe      */ \
 470         std     r10,0(r1);              /* make stack chain pointer     */ \
 471         std     r0,GPR0(r1);            /* save r0 in stackframe        */ \
 472         std     r10,GPR1(r1);           /* save r1 in stackframe        */ \
 473
 474
 475 /*
 476  * The common exception prolog is used for all except a few exceptions
 477  * such as a segment miss on a kernel address.  We have to be prepared
 478  * to take another exception from the point where we first touch the
 479  * kernel stack onwards.
 480  *
 481  * On entry r13 points to the paca, r9-r13 are saved in the paca,
 482  * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and
 483  * SRR1, and relocation is on.
 484  */
 485 #define EXCEPTION_PROLOG_COMMON(n, area)                                   \
 486         andi.   r10,r12,MSR_PR;         /* See if coming from user      */ \
 487         mr      r10,r1;                 /* Save r1                      */ \
 488         subi    r1,r1,INT_FRAME_SIZE;   /* alloc frame on kernel stack  */ \
 489         beq-    1f;                                                        \
 490         ld      r1,PACAKSAVE(r13);      /* kernel stack to use          */ \
 491 1:      cmpdi   cr1,r1,-INT_FRAME_SIZE; /* check if r1 is in userspace  */ \
 492         blt+    cr1,3f;                 /* abort if it is               */ \
 493         li      r1,(n);                 /* will be reloaded later       */ \
 494         sth     r1,PACA_TRAP_SAVE(r13);                                    \
 495         std     r3,area+EX_R3(r13);                                        \
 496         addi    r3,r13,area;            /* r3 -> where regs are saved*/    \
 497         RESTORE_CTR(r1, area);                                             \
 498         b       bad_stack;                                                 \
 499 3:      EXCEPTION_PROLOG_COMMON_1();                                       \
 500         kuap_save_amr_and_lock r9, r10, cr1, cr0;                          \
 501         beq     4f;                     /* if from kernel mode          */ \
 502         ACCOUNT_CPU_USER_ENTRY(r13, r9, r10);                              \
 503         SAVE_PPR(area, r9);                                                \
 504 4:      EXCEPTION_PROLOG_COMMON_2(area)                                    \
 505         EXCEPTION_PROLOG_COMMON_3(n)                                       \
 506         ACCOUNT_STOLEN_TIME
 507
 508 /* Save original regs values from save area to stack frame. */
 509 #define EXCEPTION_PROLOG_COMMON_2(area)                                    \
 510         ld      r9,area+EX_R9(r13);     /* move r9, r10 to stackframe   */ \
 511         ld      r10,area+EX_R10(r13);                                      \
 512         std     r9,GPR9(r1);                                               \
 513         std     r10,GPR10(r1);                                             \
 514         ld      r9,area+EX_R11(r13);    /* move r11 - r13 to stackframe */ \
 515         ld      r10,area+EX_R12(r13);                                      \
 516         ld      r11,area+EX_R13(r13);                                      \
 517         std     r9,GPR11(r1);                                              \
 518         std     r10,GPR12(r1);                                             \
 519         std     r11,GPR13(r1);                                             \
 520         BEGIN_FTR_SECTION_NESTED(66);                                      \
 521         ld      r10,area+EX_CFAR(r13);                                     \
 522         std     r10,ORIG_GPR3(r1);                                         \
 523         END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66);            \
 524         GET_CTR(r10, area);                                                \
 525         std     r10,_CTR(r1);
 526
 527 #define EXCEPTION_PROLOG_COMMON_3(n)                                       \
 528         std     r2,GPR2(r1);            /* save r2 in stackframe        */ \
 529         SAVE_4GPRS(3, r1);              /* save r3 - r6 in stackframe   */ \
 530         SAVE_2GPRS(7, r1);              /* save r7, r8 in stackframe    */ \
 531         mflr    r9;                     /* Get LR, later save to stack  */ \
 532         ld      r2,PACATOC(r13);        /* get kernel TOC into r2       */ \
 533         std     r9,_LINK(r1);                                              \
 534         lbz     r10,PACAIRQSOFTMASK(r13);                                  \
 535         mfspr   r11,SPRN_XER;           /* save XER in stackframe       */ \
 536         std     r10,SOFTE(r1);                                             \
 537         std     r11,_XER(r1);                                              \
 538         li      r9,(n)+1;                                                  \
 539         std     r9,_TRAP(r1);           /* set trap number              */ \
 540         li      r10,0;                                                     \
 541         ld      r11,exception_marker@toc(r2);                              \
 542         std     r10,RESULT(r1);         /* clear regs->result           */ \
 543         std     r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame      */
 544
 545 #define RUNLATCH_ON                             \
 546 BEGIN_FTR_SECTION                               \
 547         ld      r3, PACA_THREAD_INFO(r13);      \
 548         ld      r4,TI_LOCAL_FLAGS(r3);          \
 549         andi.   r0,r4,_TLF_RUNLATCH;            \
 550         beql    ppc64_runlatch_on_trampoline;   \
 551 END_FTR_SECTION_IFSET(CPU_FTR_CTRL)
 552
 553 #define EXCEPTION_COMMON(area, trap)                            \
 554         EXCEPTION_PROLOG_COMMON(trap, area);                    \
 555
 556 /*
 557  * Exception where stack is already set in r1, r1 is saved in r10
 558  */
 559 #define EXCEPTION_COMMON_STACK(area, trap)                      \
 560         EXCEPTION_PROLOG_COMMON_1();                            \
 561         kuap_save_amr_and_lock r9, r10, cr1;                    \
 562         EXCEPTION_PROLOG_COMMON_2(area);                        \
 563         EXCEPTION_PROLOG_COMMON_3(trap)
 564
 565 /*
 566  * When the idle code in power4_idle puts the CPU into NAP mode,
 567  * it has to do so in a loop, and relies on the external interrupt
 568  * and decrementer interrupt entry code to get it out of the loop.
 569  * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags
 570  * to signal that it is in the loop and needs help to get out.
 571  */
 572 #ifdef CONFIG_PPC_970_NAP
 573 #define FINISH_NAP                              \
 574 BEGIN_FTR_SECTION                               \
 575         ld      r11, PACA_THREAD_INFO(r13);     \
 576         ld      r9,TI_LOCAL_FLAGS(r11);         \
 577         andi.   r10,r9,_TLF_NAPPING;            \
 578         bnel    power4_fixup_nap;               \
 579 END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
 580 #else
 581 #define FINISH_NAP
 582 #endif
 583
 584 #endif /* __ASSEMBLY__ */
 585
 586 #endif  /* _ASM_POWERPC_EXCEPTION_H */