2 * Copyright (C) 2001 Dave Engebretsen & Todd Inglett IBM Corporation.
3 * Copyright 2001-2012 IBM Corporation.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #ifndef _POWERPC_EEH_H
21 #define _POWERPC_EEH_H
24 #include <linux/init.h>
25 #include <linux/list.h>
26 #include <linux/string.h>
27 #include <linux/time.h>
35 /* EEH subsystem flags */
36 #define EEH_ENABLED 0x1 /* EEH enabled */
37 #define EEH_FORCE_DISABLED 0x2 /* EEH disabled */
38 #define EEH_PROBE_MODE_DEV 0x4 /* From PCI device */
39 #define EEH_PROBE_MODE_DEVTREE 0x8 /* From device tree */
42 * The struct is used to trace PE related EEH functionality.
43 * In theory, there will have one instance of the struct to
44 * be created against particular PE. In nature, PEs corelate
45 * to each other. the struct has to reflect that hierarchy in
46 * order to easily pick up those affected PEs when one particular
49 * Also, one particular PE might be composed of PCI device, PCI
50 * bus and its subordinate components. The struct also need ship
51 * the information. Further more, one particular PE is only meaingful
52 * in the corresponding PHB. Therefore, the root PEs should be created
53 * against existing PHBs in on-to-one fashion.
55 #define EEH_PE_INVALID (1 << 0) /* Invalid */
56 #define EEH_PE_PHB (1 << 1) /* PHB PE */
57 #define EEH_PE_DEVICE (1 << 2) /* Device PE */
58 #define EEH_PE_BUS (1 << 3) /* Bus PE */
60 #define EEH_PE_ISOLATED (1 << 0) /* Isolated PE */
61 #define EEH_PE_RECOVERING (1 << 1) /* Recovering PE */
62 #define EEH_PE_RESET (1 << 2) /* PE reset in progress */
64 #define EEH_PE_KEEP (1 << 8) /* Keep PE on hotplug */
67 int type; /* PE type: PHB/Bus/Device */
68 int state; /* PE EEH dependent mode */
69 int config_addr; /* Traditional PCI address */
70 int addr; /* PE configuration address */
71 struct pci_controller *phb; /* Associated PHB */
72 struct pci_bus *bus; /* Top PCI bus for bus PE */
73 int check_count; /* Times of ignored error */
74 int freeze_count; /* Times of froze up */
75 struct timeval tstamp; /* Time on first-time freeze */
76 int false_positives; /* Times of reported #ff's */
77 struct eeh_pe *parent; /* Parent PE */
78 struct list_head child_list; /* Link PE to the child list */
79 struct list_head edevs; /* Link list of EEH devices */
80 struct list_head child; /* Child PEs */
83 #define eeh_pe_for_each_dev(pe, edev, tmp) \
84 list_for_each_entry_safe(edev, tmp, &pe->edevs, list)
87 * The struct is used to trace EEH state for the associated
88 * PCI device node or PCI device. In future, it might
89 * represent PE as well so that the EEH device to form
90 * another tree except the currently existing tree of PCI
91 * buses and PCI devices
93 #define EEH_DEV_BRIDGE (1 << 0) /* PCI bridge */
94 #define EEH_DEV_ROOT_PORT (1 << 1) /* PCIe root port */
95 #define EEH_DEV_DS_PORT (1 << 2) /* Downstream port */
96 #define EEH_DEV_IRQ_DISABLED (1 << 3) /* Interrupt disabled */
97 #define EEH_DEV_DISCONNECTED (1 << 4) /* Removing from PE */
99 #define EEH_DEV_NO_HANDLER (1 << 8) /* No error handler */
100 #define EEH_DEV_SYSFS (1 << 9) /* Sysfs created */
103 int mode; /* EEH mode */
104 int class_code; /* Class code of the device */
105 int config_addr; /* Config address */
106 int pe_config_addr; /* PE config address */
107 u32 config_space[16]; /* Saved PCI config space */
108 int pcix_cap; /* Saved PCIx capability */
109 int pcie_cap; /* Saved PCIe capability */
110 int aer_cap; /* Saved AER capability */
111 struct eeh_pe *pe; /* Associated PE */
112 struct list_head list; /* Form link list in the PE */
113 struct pci_controller *phb; /* Associated PHB */
114 struct device_node *dn; /* Associated device node */
115 struct pci_dev *pdev; /* Associated PCI device */
116 struct pci_bus *bus; /* PCI bus for partial hotplug */
119 static inline struct device_node *eeh_dev_to_of_node(struct eeh_dev *edev)
121 return edev ? edev->dn : NULL;
124 static inline struct pci_dev *eeh_dev_to_pci_dev(struct eeh_dev *edev)
126 return edev ? edev->pdev : NULL;
129 /* Return values from eeh_ops::next_error */
131 EEH_NEXT_ERR_NONE = 0,
133 EEH_NEXT_ERR_FROZEN_PE,
134 EEH_NEXT_ERR_FENCED_PHB,
135 EEH_NEXT_ERR_DEAD_PHB,
136 EEH_NEXT_ERR_DEAD_IOC
140 * The struct is used to trace the registered EEH operation
141 * callback functions. Actually, those operation callback
142 * functions are heavily platform dependent. That means the
143 * platform should register its own EEH operation callback
144 * functions before any EEH further operations.
146 #define EEH_OPT_DISABLE 0 /* EEH disable */
147 #define EEH_OPT_ENABLE 1 /* EEH enable */
148 #define EEH_OPT_THAW_MMIO 2 /* MMIO enable */
149 #define EEH_OPT_THAW_DMA 3 /* DMA enable */
150 #define EEH_STATE_UNAVAILABLE (1 << 0) /* State unavailable */
151 #define EEH_STATE_NOT_SUPPORT (1 << 1) /* EEH not supported */
152 #define EEH_STATE_RESET_ACTIVE (1 << 2) /* Active reset */
153 #define EEH_STATE_MMIO_ACTIVE (1 << 3) /* Active MMIO */
154 #define EEH_STATE_DMA_ACTIVE (1 << 4) /* Active DMA */
155 #define EEH_STATE_MMIO_ENABLED (1 << 5) /* MMIO enabled */
156 #define EEH_STATE_DMA_ENABLED (1 << 6) /* DMA enabled */
157 #define EEH_RESET_DEACTIVATE 0 /* Deactivate the PE reset */
158 #define EEH_RESET_HOT 1 /* Hot reset */
159 #define EEH_RESET_FUNDAMENTAL 3 /* Fundamental reset */
160 #define EEH_LOG_TEMP 1 /* EEH temporary error log */
161 #define EEH_LOG_PERM 2 /* EEH permanent error log */
166 int (*post_init)(void);
167 void* (*of_probe)(struct device_node *dn, void *flag);
168 int (*dev_probe)(struct pci_dev *dev, void *flag);
169 int (*set_option)(struct eeh_pe *pe, int option);
170 int (*get_pe_addr)(struct eeh_pe *pe);
171 int (*get_state)(struct eeh_pe *pe, int *state);
172 int (*reset)(struct eeh_pe *pe, int option);
173 int (*wait_state)(struct eeh_pe *pe, int max_wait);
174 int (*get_log)(struct eeh_pe *pe, int severity, char *drv_log, unsigned long len);
175 int (*configure_bridge)(struct eeh_pe *pe);
176 int (*read_config)(struct device_node *dn, int where, int size, u32 *val);
177 int (*write_config)(struct device_node *dn, int where, int size, u32 val);
178 int (*next_error)(struct eeh_pe **pe);
179 int (*restore_config)(struct device_node *dn);
182 extern int eeh_subsystem_flags;
183 extern struct eeh_ops *eeh_ops;
184 extern raw_spinlock_t confirm_error_lock;
186 static inline bool eeh_enabled(void)
188 if ((eeh_subsystem_flags & EEH_FORCE_DISABLED) ||
189 !(eeh_subsystem_flags & EEH_ENABLED))
195 static inline void eeh_set_enable(bool mode)
198 eeh_subsystem_flags |= EEH_ENABLED;
200 eeh_subsystem_flags &= ~EEH_ENABLED;
203 static inline void eeh_probe_mode_set(int flag)
205 eeh_subsystem_flags |= flag;
208 static inline int eeh_probe_mode_devtree(void)
210 return (eeh_subsystem_flags & EEH_PROBE_MODE_DEVTREE);
213 static inline int eeh_probe_mode_dev(void)
215 return (eeh_subsystem_flags & EEH_PROBE_MODE_DEV);
218 static inline void eeh_serialize_lock(unsigned long *flags)
220 raw_spin_lock_irqsave(&confirm_error_lock, *flags);
223 static inline void eeh_serialize_unlock(unsigned long flags)
225 raw_spin_unlock_irqrestore(&confirm_error_lock, flags);
229 * Max number of EEH freezes allowed before we consider the device
230 * to be permanently disabled.
232 #define EEH_MAX_ALLOWED_FREEZES 5
234 typedef void *(*eeh_traverse_func)(void *data, void *flag);
235 int eeh_phb_pe_create(struct pci_controller *phb);
236 struct eeh_pe *eeh_phb_pe_get(struct pci_controller *phb);
237 struct eeh_pe *eeh_pe_get(struct eeh_dev *edev);
238 int eeh_add_to_parent_pe(struct eeh_dev *edev);
239 int eeh_rmv_from_parent_pe(struct eeh_dev *edev);
240 void eeh_pe_update_time_stamp(struct eeh_pe *pe);
241 void *eeh_pe_traverse(struct eeh_pe *root,
242 eeh_traverse_func fn, void *flag);
243 void *eeh_pe_dev_traverse(struct eeh_pe *root,
244 eeh_traverse_func fn, void *flag);
245 void eeh_pe_restore_bars(struct eeh_pe *pe);
246 struct pci_bus *eeh_pe_bus_get(struct eeh_pe *pe);
248 void *eeh_dev_init(struct device_node *dn, void *data);
249 void eeh_dev_phb_init_dynamic(struct pci_controller *phb);
251 int __init eeh_ops_register(struct eeh_ops *ops);
252 int __exit eeh_ops_unregister(const char *name);
253 unsigned long eeh_check_failure(const volatile void __iomem *token,
255 int eeh_dev_check_failure(struct eeh_dev *edev);
256 void eeh_addr_cache_build(void);
257 void eeh_add_device_early(struct device_node *);
258 void eeh_add_device_tree_early(struct device_node *);
259 void eeh_add_device_late(struct pci_dev *);
260 void eeh_add_device_tree_late(struct pci_bus *);
261 void eeh_add_sysfs_files(struct pci_bus *);
262 void eeh_remove_device(struct pci_dev *);
265 * EEH_POSSIBLE_ERROR() -- test for possible MMIO failure.
267 * If this macro yields TRUE, the caller relays to eeh_check_failure()
268 * which does further tests out of line.
270 #define EEH_POSSIBLE_ERROR(val, type) ((val) == (type)~0 && eeh_enabled())
273 * Reads from a device which has been isolated by EEH will return
274 * all 1s. This macro gives an all-1s value of the given size (in
275 * bytes: 1, 2, or 4) for comparing with the result of a read.
277 #define EEH_IO_ERROR_VALUE(size) (~0U >> ((4 - (size)) * 8))
279 #else /* !CONFIG_EEH */
281 static inline bool eeh_enabled(void)
286 static inline void eeh_set_enable(bool mode) { }
288 static inline int eeh_init(void)
293 static inline void *eeh_dev_init(struct device_node *dn, void *data)
298 static inline void eeh_dev_phb_init_dynamic(struct pci_controller *phb) { }
300 static inline unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned long val)
305 #define eeh_dev_check_failure(x) (0)
307 static inline void eeh_addr_cache_build(void) { }
309 static inline void eeh_add_device_early(struct device_node *dn) { }
311 static inline void eeh_add_device_tree_early(struct device_node *dn) { }
313 static inline void eeh_add_device_late(struct pci_dev *dev) { }
315 static inline void eeh_add_device_tree_late(struct pci_bus *bus) { }
317 static inline void eeh_add_sysfs_files(struct pci_bus *bus) { }
319 static inline void eeh_remove_device(struct pci_dev *dev) { }
321 #define EEH_POSSIBLE_ERROR(val, type) (0)
322 #define EEH_IO_ERROR_VALUE(size) (-1UL)
323 #endif /* CONFIG_EEH */
327 * MMIO read/write operations with EEH support.
329 static inline u8 eeh_readb(const volatile void __iomem *addr)
332 if (EEH_POSSIBLE_ERROR(val, u8))
333 return eeh_check_failure(addr, val);
337 static inline u16 eeh_readw(const volatile void __iomem *addr)
339 u16 val = in_le16(addr);
340 if (EEH_POSSIBLE_ERROR(val, u16))
341 return eeh_check_failure(addr, val);
345 static inline u32 eeh_readl(const volatile void __iomem *addr)
347 u32 val = in_le32(addr);
348 if (EEH_POSSIBLE_ERROR(val, u32))
349 return eeh_check_failure(addr, val);
353 static inline u64 eeh_readq(const volatile void __iomem *addr)
355 u64 val = in_le64(addr);
356 if (EEH_POSSIBLE_ERROR(val, u64))
357 return eeh_check_failure(addr, val);
361 static inline u16 eeh_readw_be(const volatile void __iomem *addr)
363 u16 val = in_be16(addr);
364 if (EEH_POSSIBLE_ERROR(val, u16))
365 return eeh_check_failure(addr, val);
369 static inline u32 eeh_readl_be(const volatile void __iomem *addr)
371 u32 val = in_be32(addr);
372 if (EEH_POSSIBLE_ERROR(val, u32))
373 return eeh_check_failure(addr, val);
377 static inline u64 eeh_readq_be(const volatile void __iomem *addr)
379 u64 val = in_be64(addr);
380 if (EEH_POSSIBLE_ERROR(val, u64))
381 return eeh_check_failure(addr, val);
385 static inline void eeh_memcpy_fromio(void *dest, const
386 volatile void __iomem *src,
389 _memcpy_fromio(dest, src, n);
391 /* Look for ffff's here at dest[n]. Assume that at least 4 bytes
392 * were copied. Check all four bytes.
394 if (n >= 4 && EEH_POSSIBLE_ERROR(*((u32 *)(dest + n - 4)), u32))
395 eeh_check_failure(src, *((u32 *)(dest + n - 4)));
398 /* in-string eeh macros */
399 static inline void eeh_readsb(const volatile void __iomem *addr, void * buf,
402 _insb(addr, buf, ns);
403 if (EEH_POSSIBLE_ERROR((*(((u8*)buf)+ns-1)), u8))
404 eeh_check_failure(addr, *(u8*)buf);
407 static inline void eeh_readsw(const volatile void __iomem *addr, void * buf,
410 _insw(addr, buf, ns);
411 if (EEH_POSSIBLE_ERROR((*(((u16*)buf)+ns-1)), u16))
412 eeh_check_failure(addr, *(u16*)buf);
415 static inline void eeh_readsl(const volatile void __iomem *addr, void * buf,
418 _insl(addr, buf, nl);
419 if (EEH_POSSIBLE_ERROR((*(((u32*)buf)+nl-1)), u32))
420 eeh_check_failure(addr, *(u32*)buf);
423 #endif /* CONFIG_PPC64 */
424 #endif /* __KERNEL__ */
425 #endif /* _POWERPC_EEH_H */