1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_POWERPC_CACHE_H
3 #define _ASM_POWERPC_CACHE_H
8 /* bytes per L1 cache line */
9 #if defined(CONFIG_PPC_8xx) || defined(CONFIG_403GCX)
10 #define L1_CACHE_SHIFT 4
11 #define MAX_COPY_PREFETCH 1
12 #define IFETCH_ALIGN_SHIFT 2
13 #elif defined(CONFIG_PPC_E500MC)
14 #define L1_CACHE_SHIFT 6
15 #define MAX_COPY_PREFETCH 4
16 #define IFETCH_ALIGN_SHIFT 3
17 #elif defined(CONFIG_PPC32)
18 #define MAX_COPY_PREFETCH 4
19 #define IFETCH_ALIGN_SHIFT 3 /* 603 fetches 2 insn at a time */
20 #if defined(CONFIG_PPC_47x)
21 #define L1_CACHE_SHIFT 7
23 #define L1_CACHE_SHIFT 5
25 #else /* CONFIG_PPC64 */
26 #define L1_CACHE_SHIFT 7
27 #define IFETCH_ALIGN_SHIFT 4 /* POWER8,9 */
30 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
32 #define SMP_CACHE_BYTES L1_CACHE_BYTES
34 #define IFETCH_ALIGN_BYTES (1 << IFETCH_ALIGN_SHIFT)
36 #if defined(__powerpc64__) && !defined(__ASSEMBLY__)
38 struct ppc_cache_info {
41 u32 block_size; /* L1 only */
49 struct ppc_cache_info l1d;
50 struct ppc_cache_info l1i;
51 struct ppc_cache_info l2;
52 struct ppc_cache_info l3;
55 extern struct ppc64_caches ppc64_caches;
56 #endif /* __powerpc64__ && ! __ASSEMBLY__ */
58 #if defined(__ASSEMBLY__)
60 * For a snooping icache, we still need a dummy icbi to purge all the
61 * prefetched instructions from the ifetch buffers. We also need a sync
62 * before the icbi to order the the actual stores to memory that might
63 * have modified instructions with the icbi.
65 #define PURGE_PREFETCHED_INS \
72 #define __read_mostly __attribute__((__section__(".data..read_mostly")))
74 #ifdef CONFIG_PPC_BOOK3S_32
75 extern long _get_L2CR(void);
76 extern long _get_L3CR(void);
77 extern void _set_L2CR(unsigned long);
78 extern void _set_L3CR(unsigned long);
80 #define _get_L2CR() 0L
81 #define _get_L3CR() 0L
82 #define _set_L2CR(val) do { } while(0)
83 #define _set_L3CR(val) do { } while(0)
86 static inline void dcbz(void *addr)
88 __asm__ __volatile__ ("dcbz 0, %0" : : "r"(addr) : "memory");
91 static inline void dcbi(void *addr)
93 __asm__ __volatile__ ("dcbi 0, %0" : : "r"(addr) : "memory");
96 static inline void dcbf(void *addr)
98 __asm__ __volatile__ ("dcbf 0, %0" : : "r"(addr) : "memory");
101 static inline void dcbst(void *addr)
103 __asm__ __volatile__ ("dcbst 0, %0" : : "r"(addr) : "memory");
105 #endif /* !__ASSEMBLY__ */
106 #endif /* __KERNEL__ */
107 #endif /* _ASM_POWERPC_CACHE_H */