1 #ifndef _ASM_POWERPC_BOOK3S_64_TLBFLUSH_HASH_H
2 #define _ASM_POWERPC_BOOK3S_64_TLBFLUSH_HASH_H
4 #define MMU_NO_CONTEXT 0
7 * TLB flushing for 64-bit hash-MMU CPUs
10 #include <linux/percpu.h>
13 #define PPC64_TLB_BATCH_NR 192
15 struct ppc64_tlb_batch {
19 real_pte_t pte[PPC64_TLB_BATCH_NR];
20 unsigned long vpn[PPC64_TLB_BATCH_NR];
24 DECLARE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch);
26 extern void __flush_tlb_pending(struct ppc64_tlb_batch *batch);
28 #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
30 static inline void arch_enter_lazy_mmu_mode(void)
32 struct ppc64_tlb_batch *batch = this_cpu_ptr(&ppc64_tlb_batch);
37 static inline void arch_leave_lazy_mmu_mode(void)
39 struct ppc64_tlb_batch *batch = this_cpu_ptr(&ppc64_tlb_batch);
42 __flush_tlb_pending(batch);
46 #define arch_flush_lazy_mmu_mode() do {} while (0)
49 extern void flush_hash_page(unsigned long vpn, real_pte_t pte, int psize,
50 int ssize, unsigned long flags);
51 extern void flush_hash_range(unsigned long number, int local);
52 extern void flush_hash_hugepage(unsigned long vsid, unsigned long addr,
53 pmd_t *pmdp, unsigned int psize, int ssize,
56 static inline void local_flush_tlb_mm(struct mm_struct *mm)
60 static inline void flush_tlb_mm(struct mm_struct *mm)
64 static inline void local_flush_tlb_page(struct vm_area_struct *vma,
69 static inline void flush_tlb_page(struct vm_area_struct *vma,
74 static inline void flush_tlb_page_nohash(struct vm_area_struct *vma,
79 static inline void flush_tlb_range(struct vm_area_struct *vma,
80 unsigned long start, unsigned long end)
84 static inline void flush_tlb_kernel_range(unsigned long start,
89 /* Private function for use by PCI IO mapping code */
90 extern void __flush_hash_table_range(struct mm_struct *mm, unsigned long start,
92 extern void flush_tlb_pmd_range(struct mm_struct *mm, pmd_t *pmd,
94 #endif /* _ASM_POWERPC_BOOK3S_64_TLBFLUSH_HASH_H */