1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_POWERPC_BOOK3S_64_HASH_4K_H
3 #define _ASM_POWERPC_BOOK3S_64_HASH_4K_H
5 #define H_PTE_INDEX_SIZE 9 // size: 8B << 9 = 4KB, maps: 2^9 x 4KB = 2MB
6 #define H_PMD_INDEX_SIZE 7 // size: 8B << 7 = 1KB, maps: 2^7 x 2MB = 256MB
7 #define H_PUD_INDEX_SIZE 9 // size: 8B << 9 = 4KB, maps: 2^9 x 256MB = 128GB
8 #define H_PGD_INDEX_SIZE 9 // size: 8B << 9 = 4KB, maps: 2^9 x 128GB = 64TB
11 * Each context is 512TB. But on 4k we restrict our max TASK size to 64TB
12 * Hence also limit max EA bits to 64TB.
14 #define MAX_EA_BITS_PER_CONTEXT 46
17 * Our page table limit us to 64TB. Hence for the kernel mapping,
18 * each MAP area is limited to 16 TB.
19 * The four map areas are: linear mapping, vmap, IO and vmemmap
21 #define H_KERN_MAP_SIZE (ASM_CONST(1) << (MAX_EA_BITS_PER_CONTEXT - 2))
24 * Define the address range of the kernel non-linear virtual area
27 #define H_KERN_VIRT_START ASM_CONST(0xc000100000000000)
30 #define H_PTE_TABLE_SIZE (sizeof(pte_t) << H_PTE_INDEX_SIZE)
31 #define H_PMD_TABLE_SIZE (sizeof(pmd_t) << H_PMD_INDEX_SIZE)
32 #define H_PUD_TABLE_SIZE (sizeof(pud_t) << H_PUD_INDEX_SIZE)
33 #define H_PGD_TABLE_SIZE (sizeof(pgd_t) << H_PGD_INDEX_SIZE)
35 #define H_PAGE_F_GIX_SHIFT 53
36 #define H_PAGE_F_SECOND _RPAGE_RPN44 /* HPTE is in 2ndary HPTEG */
37 #define H_PAGE_F_GIX (_RPAGE_RPN43 | _RPAGE_RPN42 | _RPAGE_RPN41)
38 #define H_PAGE_BUSY _RPAGE_RSV1 /* software: PTE & hash are busy */
39 #define H_PAGE_HASHPTE _RPAGE_RSV2 /* software: PTE & hash are busy */
41 /* PTE flags to conserve for HPTE identification */
42 #define _PAGE_HPTEFLAGS (H_PAGE_BUSY | H_PAGE_HASHPTE | \
43 H_PAGE_F_SECOND | H_PAGE_F_GIX)
45 * Not supported by 4k linux page size
47 #define H_PAGE_4K_PFN 0x0
48 #define H_PAGE_THP_HUGE 0x0
49 #define H_PAGE_COMBO 0x0
51 /* 8 bytes per each pte entry */
52 #define H_PTE_FRAG_SIZE_SHIFT (H_PTE_INDEX_SIZE + 3)
53 #define H_PTE_FRAG_NR (PAGE_SIZE >> H_PTE_FRAG_SIZE_SHIFT)
54 #define H_PMD_FRAG_SIZE_SHIFT (H_PMD_INDEX_SIZE + 3)
55 #define H_PMD_FRAG_NR (PAGE_SIZE >> H_PMD_FRAG_SIZE_SHIFT)
57 /* memory key bits, only 8 keys supported */
58 #define H_PTE_PKEY_BIT0 0
59 #define H_PTE_PKEY_BIT1 0
60 #define H_PTE_PKEY_BIT2 _RPAGE_RSV3
61 #define H_PTE_PKEY_BIT3 _RPAGE_RSV4
62 #define H_PTE_PKEY_BIT4 _RPAGE_RSV5
65 * On all 4K setups, remap_4k_pfn() equates to remap_pfn_range()
67 #define remap_4k_pfn(vma, addr, pfn, prot) \
68 remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, (prot))
70 #ifdef CONFIG_HUGETLB_PAGE
71 static inline int hash__hugepd_ok(hugepd_t hpd)
73 unsigned long hpdval = hpd_val(hpd);
75 * if it is not a pte and have hugepd shift mask
76 * set, then it is a hugepd directory pointer
78 if (!(hpdval & _PAGE_PTE) && (hpdval & _PAGE_PRESENT) &&
79 ((hpdval & HUGEPD_SHIFT_MASK) != 0))
86 * 4K PTE format is different from 64K PTE format. Saving the hash_slot is just
87 * a matter of returning the PTE bits that need to be modified. On 64K PTE,
88 * things are a little more involved and hence needs many more parameters to
89 * accomplish the same. However we want to abstract this out from the caller by
90 * keeping the prototype consistent across the two formats.
92 static inline unsigned long pte_set_hidx(pte_t *ptep, real_pte_t rpte,
93 unsigned int subpg_index, unsigned long hidx,
96 return (hidx << H_PAGE_F_GIX_SHIFT) &
97 (H_PAGE_F_SECOND | H_PAGE_F_GIX);
100 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
102 static inline char *get_hpte_slot_array(pmd_t *pmdp)
108 static inline unsigned int hpte_valid(unsigned char *hpte_slot_array, int index)
114 static inline unsigned int hpte_hash_index(unsigned char *hpte_slot_array,
121 static inline void mark_hpte_slot_valid(unsigned char *hpte_slot_array,
122 unsigned int index, unsigned int hidx)
127 static inline int hash__pmd_trans_huge(pmd_t pmd)
132 static inline int hash__pmd_same(pmd_t pmd_a, pmd_t pmd_b)
138 static inline pmd_t hash__pmd_mkhuge(pmd_t pmd)
144 extern unsigned long hash__pmd_hugepage_update(struct mm_struct *mm,
145 unsigned long addr, pmd_t *pmdp,
146 unsigned long clr, unsigned long set);
147 extern pmd_t hash__pmdp_collapse_flush(struct vm_area_struct *vma,
148 unsigned long address, pmd_t *pmdp);
149 extern void hash__pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
151 extern pgtable_t hash__pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);
152 extern pmd_t hash__pmdp_huge_get_and_clear(struct mm_struct *mm,
153 unsigned long addr, pmd_t *pmdp);
154 extern int hash__has_transparent_hugepage(void);
157 #endif /* !__ASSEMBLY__ */
159 #endif /* _ASM_POWERPC_BOOK3S_64_HASH_4K_H */