2 * MPC8377E RDB Device Tree Source
4 * Copyright 2007, 2008 Freescale Semiconductor Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
15 compatible = "fsl,mpc8377rdb";
36 d-cache-line-size = <32>;
37 i-cache-line-size = <32>;
38 d-cache-size = <32768>;
39 i-cache-size = <32768>;
40 timebase-frequency = <0>;
42 clock-frequency = <0>;
47 device_type = "memory";
48 reg = <0x00000000 0x10000000>; // 256MB at 0
54 compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus";
55 reg = <0xe0005000 0x1000>;
56 interrupts = <77 0x8>;
57 interrupt-parent = <&ipic>;
59 // CS0 and CS1 are swapped when
60 // booting from nand, but the
61 // addresses are the same.
62 ranges = <0x0 0x0 0xfe000000 0x00800000
63 0x1 0x0 0xe0600000 0x00008000
64 0x2 0x0 0xf0000000 0x00020000
65 0x3 0x0 0xfa000000 0x00008000>;
70 compatible = "cfi-flash";
71 reg = <0x0 0x0 0x800000>;
79 compatible = "fsl,mpc8377-fcm-nand",
81 reg = <0x1 0x0 0x8000>;
89 reg = <0x100000 0x300000>;
92 reg = <0x400000 0x1c00000>;
101 compatible = "simple-bus";
102 ranges = <0x0 0xe0000000 0x00100000>;
103 reg = <0xe0000000 0x00000200>;
107 device_type = "watchdog";
108 compatible = "mpc83xx_wdt";
113 #address-cells = <1>;
116 compatible = "fsl-i2c";
117 reg = <0x3000 0x100>;
118 interrupts = <14 0x8>;
119 interrupt-parent = <&ipic>;
122 compatible = "dallas,ds1339";
128 compatible = "fsl,mc9s08qg8-mpc8377erdb",
129 "fsl,mcu-mpc8349emitx";
136 #address-cells = <1>;
139 compatible = "fsl-i2c";
140 reg = <0x3100 0x100>;
141 interrupts = <15 0x8>;
142 interrupt-parent = <&ipic>;
148 compatible = "fsl,spi";
149 reg = <0x7000 0x1000>;
150 interrupts = <16 0x8>;
151 interrupt-parent = <&ipic>;
156 #address-cells = <1>;
158 compatible = "fsl,mpc8377-dma", "fsl,elo-dma";
160 ranges = <0 0x8100 0x1a8>;
161 interrupt-parent = <&ipic>;
165 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
168 interrupt-parent = <&ipic>;
172 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
175 interrupt-parent = <&ipic>;
179 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
182 interrupt-parent = <&ipic>;
186 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
189 interrupt-parent = <&ipic>;
195 compatible = "fsl-usb2-dr";
196 reg = <0x23000 0x1000>;
197 #address-cells = <1>;
199 interrupt-parent = <&ipic>;
200 interrupts = <38 0x8>;
205 #address-cells = <1>;
207 compatible = "fsl,gianfar-mdio";
208 reg = <0x24520 0x20>;
209 phy2: ethernet-phy@2 {
210 interrupt-parent = <&ipic>;
211 interrupts = <17 0x8>;
213 device_type = "ethernet-phy";
217 device_type = "tbi-phy";
222 #address-cells = <1>;
224 compatible = "fsl,gianfar-tbi";
225 reg = <0x25520 0x20>;
229 device_type = "tbi-phy";
234 enet0: ethernet@24000 {
236 device_type = "network";
238 compatible = "gianfar";
239 reg = <0x24000 0x1000>;
240 local-mac-address = [ 00 00 00 00 00 00 ];
241 interrupts = <32 0x8 33 0x8 34 0x8>;
242 phy-connection-type = "mii";
243 interrupt-parent = <&ipic>;
244 tbi-handle = <&tbi0>;
245 phy-handle = <&phy2>;
248 enet1: ethernet@25000 {
250 device_type = "network";
252 compatible = "gianfar";
253 reg = <0x25000 0x1000>;
254 local-mac-address = [ 00 00 00 00 00 00 ];
255 interrupts = <35 0x8 36 0x8 37 0x8>;
256 phy-connection-type = "mii";
257 interrupt-parent = <&ipic>;
258 fixed-link = <1 1 1000 0 0>;
259 tbi-handle = <&tbi1>;
262 serial0: serial@4500 {
264 device_type = "serial";
265 compatible = "ns16550";
266 reg = <0x4500 0x100>;
267 clock-frequency = <0>;
268 interrupts = <9 0x8>;
269 interrupt-parent = <&ipic>;
272 serial1: serial@4600 {
274 device_type = "serial";
275 compatible = "ns16550";
276 reg = <0x4600 0x100>;
277 clock-frequency = <0>;
278 interrupts = <10 0x8>;
279 interrupt-parent = <&ipic>;
283 compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
284 "fsl,sec2.1", "fsl,sec2.0";
285 reg = <0x30000 0x10000>;
286 interrupts = <11 0x8>;
287 interrupt-parent = <&ipic>;
288 fsl,num-channels = <4>;
289 fsl,channel-fifo-len = <24>;
290 fsl,exec-units-mask = <0x9fe>;
291 fsl,descriptor-types-mask = <0x3ab0ebf>;
295 compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
296 reg = <0x18000 0x1000>;
297 interrupts = <44 0x8>;
298 interrupt-parent = <&ipic>;
302 compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
303 reg = <0x19000 0x1000>;
304 interrupts = <45 0x8>;
305 interrupt-parent = <&ipic>;
309 * interrupts cell = <intr #, sense>
310 * sense values match linux IORESOURCE_IRQ_* defines:
311 * sense == 8: Level, low assertion
312 * sense == 2: Edge, high-to-low change
314 ipic: interrupt-controller@700 {
315 compatible = "fsl,ipic";
316 interrupt-controller;
317 #address-cells = <0>;
318 #interrupt-cells = <2>;
324 interrupt-map-mask = <0xf800 0 0 7>;
326 /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */
328 /* IDSEL AD14 IRQ6 inta */
329 0x7000 0x0 0x0 0x1 &ipic 22 0x8
331 /* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */
332 0x7800 0x0 0x0 0x1 &ipic 21 0x8
333 0x7800 0x0 0x0 0x2 &ipic 22 0x8
334 0x7800 0x0 0x0 0x4 &ipic 23 0x8
336 /* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/
337 0xE000 0x0 0x0 0x1 &ipic 23 0x8
338 0xE000 0x0 0x0 0x2 &ipic 21 0x8
339 0xE000 0x0 0x0 0x3 &ipic 22 0x8>;
340 interrupt-parent = <&ipic>;
341 interrupts = <66 0x8>;
343 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
344 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
345 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
346 clock-frequency = <66666666>;
347 #interrupt-cells = <1>;
349 #address-cells = <3>;
350 reg = <0xe0008500 0x100 /* internal registers */
351 0xe0008300 0x8>; /* config space access registers */
352 compatible = "fsl,mpc8349-pci";
356 pci1: pcie@e0009000 {
357 #address-cells = <3>;
359 #interrupt-cells = <1>;
361 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
362 reg = <0xe0009000 0x00001000>;
363 ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
364 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
366 interrupt-map-mask = <0xf800 0 0 7>;
367 interrupt-map = <0 0 0 1 &ipic 1 8
371 clock-frequency = <0>;
374 #address-cells = <3>;
378 ranges = <0x02000000 0 0xa8000000
379 0x02000000 0 0xa8000000
381 0x01000000 0 0x00000000
382 0x01000000 0 0x00000000
387 pci2: pcie@e000a000 {
388 #address-cells = <3>;
390 #interrupt-cells = <1>;
392 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
393 reg = <0xe000a000 0x00001000>;
394 ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
395 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
397 interrupt-map-mask = <0xf800 0 0 7>;
398 interrupt-map = <0 0 0 1 &ipic 2 8
402 clock-frequency = <0>;
405 #address-cells = <3>;
409 ranges = <0x02000000 0 0xc8000000
410 0x02000000 0 0xc8000000
412 0x01000000 0 0x00000000
413 0x01000000 0 0x00000000