2 * STx/Freescale ADS5125 MPC5125 silicon
4 * Copyright (C) 2009 Freescale Semiconductor Inc. All rights reserved.
6 * Reworked by Matteo Facchinetti (engineering@sirius-es.it)
7 * Copyright (C) 2013 Sirius Electronic Systems
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
18 model = "mpc5125twr"; // In BSP "mpc5125ads"
19 compatible = "fsl,mpc5125ads", "fsl,mpc5125";
22 interrupt-parent = <&ipic>;
37 d-cache-line-size = <0x20>; // 32 bytes
38 i-cache-line-size = <0x20>; // 32 bytes
39 d-cache-size = <0x8000>; // L1, 32K
40 i-cache-size = <0x8000>; // L1, 32K
41 timebase-frequency = <49500000>;// 49.5 MHz (csb/4)
42 bus-frequency = <198000000>; // 198 MHz csb bus
43 clock-frequency = <396000000>; // 396 MHz ppc core
48 device_type = "memory";
49 reg = <0x00000000 0x10000000>; // 256MB at 0
53 compatible = "fsl,mpc5121-sram";
54 reg = <0x30000000 0x08000>; // 32K at 0x30000000
58 compatible = "fsl,mpc5121-immr";
61 ranges = <0x0 0x80000000 0x400000>;
62 reg = <0x80000000 0x400000>;
63 bus-frequency = <66000000>; // 66 MHz ips bus
66 // interrupts cell = <intr #, sense>
67 // sense values match linux IORESOURCE_IRQ_* defines:
68 // sense == 8: Level, low assertion
69 // sense == 2: Edge, high-to-low change
71 ipic: interrupt-controller@c00 {
72 compatible = "fsl,mpc5121-ipic", "fsl,ipic";
75 #interrupt-cells = <2>;
79 rtc@a00 { // Real time clock
80 compatible = "fsl,mpc5121-rtc";
82 interrupts = <79 0x8 80 0x8>;
85 reset@e00 { // Reset module
86 compatible = "fsl,mpc5125-reset";
90 clock@f00 { // Clock control
91 compatible = "fsl,mpc5121-clock";
95 pmc@1000{ // Power Management Controller
96 compatible = "fsl,mpc5121-pmc";
98 interrupts = <83 0x2>;
102 compatible = "fsl,mpc5125-gpio";
103 reg = <0x1100 0x080>;
104 interrupts = <78 0x8>;
108 compatible = "fsl,mpc5125-gpio";
109 reg = <0x1180 0x080>;
110 interrupts = <86 0x8>;
113 can@1300 { // CAN rev.2
114 compatible = "fsl,mpc5121-mscan";
115 interrupts = <12 0x8>;
120 compatible = "fsl,mpc5121-mscan";
121 interrupts = <13 0x8>;
126 compatible = "fsl,mpc5121-sdhc";
127 interrupts = <8 0x8>;
128 reg = <0x1500 0x100>;
132 #address-cells = <1>;
134 compatible = "fsl,mpc5121-i2c", "fsl-i2c";
136 interrupts = <0x9 0x8>;
140 #address-cells = <1>;
142 compatible = "fsl,mpc5121-i2c", "fsl-i2c";
144 interrupts = <0xa 0x8>;
148 #address-cells = <1>;
150 compatible = "fsl,mpc5121-i2c", "fsl-i2c";
152 interrupts = <0xb 0x8>;
156 compatible = "fsl,mpc5121-i2c-ctrl";
161 compatible = "fsl,mpc5121-diu";
162 reg = <0x2100 0x100>;
163 interrupts = <64 0x8>;
167 compatible = "fsl,mpc5121-fec-mdio";
168 reg = <0x2800 0x800>;
169 #address-cells = <1>;
171 phy0: ethernet-phy@0 {
176 eth0: ethernet@2800 {
177 compatible = "fsl,mpc5125-fec";
178 reg = <0x2800 0x800>;
179 local-mac-address = [ 00 00 00 00 00 00 ];
180 interrupts = <4 0x8>;
181 phy-handle = < &phy0 >;
182 phy-connection-type = "rmii";
187 compatible = "fsl,mpc5125-ioctl";
188 reg = <0xA000 0x1000>;
193 // correct pinmux config and fix USB3320 ulpi dependency
194 // before re-enabling it
196 compatible = "fsl,mpc5121-usb2-dr";
197 reg = <0x3000 0x400>;
198 #address-cells = <1>;
200 interrupts = <43 0x8>;
206 // 5125 PSCs are not 52xx or 5121 PSC compatible
207 // PSC1 uart0 aka ttyPSC0
209 compatible = "fsl,mpc5125-psc-uart", "fsl,mpc5125-psc";
210 reg = <0x11100 0x100>;
211 interrupts = <40 0x8>;
212 fsl,rx-fifo-size = <16>;
213 fsl,tx-fifo-size = <16>;
216 // PSC9 uart1 aka ttyPSC1
218 compatible = "fsl,mpc5125-psc-uart", "fsl,mpc5125-psc";
219 reg = <0x11900 0x100>;
220 interrupts = <40 0x8>;
221 fsl,rx-fifo-size = <16>;
222 fsl,tx-fifo-size = <16>;
226 compatible = "fsl,mpc5121-psc-fifo";
227 reg = <0x11f00 0x100>;
228 interrupts = <40 0x8>;
232 compatible = "fsl,mpc5121-dma"; // BSP name: "mpc512x-dma2"
233 reg = <0x14000 0x1800>;
234 interrupts = <65 0x8>;