1 #include <linux/delay.h>
2 #include <linux/if_ether.h>
3 #include <linux/ioport.h>
4 #include <linux/mv643xx.h>
5 #include <linux/platform_device.h>
7 #include "ocelot_c_fpga.h"
9 #if defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE)
11 static struct resource mv643xx_eth_shared_resources[] = {
13 .name = "ethernet shared base",
14 .start = 0xf1000000 + MV643XX_ETH_SHARED_REGS,
15 .end = 0xf1000000 + MV643XX_ETH_SHARED_REGS +
16 MV643XX_ETH_SHARED_REGS_SIZE - 1,
17 .flags = IORESOURCE_MEM,
21 static struct platform_device mv643xx_eth_shared_device = {
22 .name = MV643XX_ETH_SHARED_NAME,
24 .num_resources = ARRAY_SIZE(mv643xx_eth_shared_resources),
25 .resource = mv643xx_eth_shared_resources,
28 #define MV_SRAM_BASE 0xfe000000UL
29 #define MV_SRAM_SIZE (256 * 1024)
31 #define MV_SRAM_RXRING_SIZE (MV_SRAM_SIZE / 4)
32 #define MV_SRAM_TXRING_SIZE (MV_SRAM_SIZE / 4)
34 #define MV_SRAM_BASE_ETH0 MV_SRAM_BASE
35 #define MV_SRAM_BASE_ETH1 (MV_SRAM_BASE + (MV_SRAM_SIZE / 2))
37 #define MV64x60_IRQ_ETH_0 48
38 #define MV64x60_IRQ_ETH_1 49
40 static struct resource mv64x60_eth0_resources[] = {
43 .start = MV64x60_IRQ_ETH_0,
44 .end = MV64x60_IRQ_ETH_0,
45 .flags = IORESOURCE_IRQ,
49 static char eth0_mac_addr[ETH_ALEN];
51 static struct mv643xx_eth_platform_data eth0_pd = {
52 .mac_addr = eth0_mac_addr,
54 .tx_sram_addr = MV_SRAM_BASE_ETH0,
55 .tx_sram_size = MV_SRAM_TXRING_SIZE,
56 .tx_queue_size = MV_SRAM_TXRING_SIZE / 16,
58 .rx_sram_addr = MV_SRAM_BASE_ETH0 + MV_SRAM_TXRING_SIZE,
59 .rx_sram_size = MV_SRAM_RXRING_SIZE,
60 .rx_queue_size = MV_SRAM_RXRING_SIZE / 16,
63 static struct platform_device eth0_device = {
64 .name = MV643XX_ETH_NAME,
66 .num_resources = ARRAY_SIZE(mv64x60_eth0_resources),
67 .resource = mv64x60_eth0_resources,
69 .platform_data = ð0_pd,
73 static struct resource mv64x60_eth1_resources[] = {
76 .start = MV64x60_IRQ_ETH_1,
77 .end = MV64x60_IRQ_ETH_1,
78 .flags = IORESOURCE_IRQ,
82 static char eth1_mac_addr[ETH_ALEN];
84 static struct mv643xx_eth_platform_data eth1_pd = {
85 .mac_addr = eth1_mac_addr,
87 .tx_sram_addr = MV_SRAM_BASE_ETH1,
88 .tx_sram_size = MV_SRAM_TXRING_SIZE,
89 .tx_queue_size = MV_SRAM_TXRING_SIZE / 16,
91 .rx_sram_addr = MV_SRAM_BASE_ETH1 + MV_SRAM_TXRING_SIZE,
92 .rx_sram_size = MV_SRAM_RXRING_SIZE,
93 .rx_queue_size = MV_SRAM_RXRING_SIZE / 16,
96 static struct platform_device eth1_device = {
97 .name = MV643XX_ETH_NAME,
99 .num_resources = ARRAY_SIZE(mv64x60_eth1_resources),
100 .resource = mv64x60_eth1_resources,
102 .platform_data = ð1_pd,
106 static struct platform_device *mv643xx_eth_pd_devs[] __initdata = {
107 &mv643xx_eth_shared_device,
110 /* The third port is not wired up on the Ocelot C */
113 static u8 __init exchange_bit(u8 val, u8 cs)
116 OCELOT_FPGA_WRITE((val << 2) | cs, EEPROM_MODE);
119 /* turn the clock on */
120 OCELOT_FPGA_WRITE((val << 2) | cs | 0x2, EEPROM_MODE);
123 /* turn the clock off and read-strobe */
124 OCELOT_FPGA_WRITE((val << 2) | cs | 0x10, EEPROM_MODE);
126 /* return the data */
127 return (OCELOT_FPGA_READ(EEPROM_MODE) >> 3) & 0x1;
130 static void __init get_mac(char dest[6])
132 u8 read_opcode[12] = {1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
135 for (i = 0; i < 12; i++)
136 exchange_bit(read_opcode[i], 1);
138 for (j = 0; j < 6; j++) {
140 for (i = 0; i < 8; i++) {
142 dest[j] |= exchange_bit(0, 1);
151 * Copy and increment ethernet MAC address by a small value.
153 * This is useful for systems where the only one MAC address is stored in
154 * non-volatile memory for multiple ports.
156 static inline void eth_mac_add(unsigned char *dst, unsigned char *src,
163 for (i = ETH_ALEN; i >= 0; i--) {
164 dst[i] = src[i] + add;
165 add = dst[i] < src[i]; /* compute carry */
171 static int __init mv643xx_eth_add_pds(void)
173 unsigned char mac[ETH_ALEN];
177 eth_mac_add(eth0_mac_addr, mac, 0);
178 eth_mac_add(eth1_mac_addr, mac, 1);
179 ret = platform_add_devices(mv643xx_eth_pd_devs,
180 ARRAY_SIZE(mv643xx_eth_pd_devs));
185 device_initcall(mv643xx_eth_add_pds);
187 #endif /* defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE) */