2 * Dump R4x00 TLB for debugging purposes.
4 * Copyright (C) 1994, 1995 by Waldorf Electronics, written by Ralf Baechle.
5 * Copyright (C) 1999 by Silicon Graphics, Inc.
7 #include <linux/kernel.h>
10 #include <asm/hazards.h>
11 #include <asm/mipsregs.h>
13 #include <asm/pgtable.h>
14 #include <asm/tlbdebug.h>
16 void dump_tlb_regs(void)
18 const int field = 2 * sizeof(unsigned long);
20 pr_info("Index : %0x\n", read_c0_index());
21 pr_info("PageMask : %0x\n", read_c0_pagemask());
22 pr_info("EntryHi : %0*lx\n", field, read_c0_entryhi());
23 pr_info("EntryLo0 : %0*lx\n", field, read_c0_entrylo0());
24 pr_info("EntryLo1 : %0*lx\n", field, read_c0_entrylo1());
25 pr_info("Wired : %0x\n", read_c0_wired());
26 if (cpu_has_small_pages || cpu_has_rixi || cpu_has_xpa)
27 pr_info("PageGrain: %0x\n", read_c0_pagegrain());
29 pr_info("PWField : %0*lx\n", field, read_c0_pwfield());
30 pr_info("PWSize : %0*lx\n", field, read_c0_pwsize());
31 pr_info("PWCtl : %0x\n", read_c0_pwctl());
35 static inline const char *msk2str(unsigned int mask)
38 case PM_4K: return "4kb";
39 case PM_16K: return "16kb";
40 case PM_64K: return "64kb";
41 case PM_256K: return "256kb";
42 #ifdef CONFIG_CPU_CAVIUM_OCTEON
43 case PM_8K: return "8kb";
44 case PM_32K: return "32kb";
45 case PM_128K: return "128kb";
46 case PM_512K: return "512kb";
47 case PM_2M: return "2Mb";
48 case PM_8M: return "8Mb";
49 case PM_32M: return "32Mb";
51 #ifndef CONFIG_CPU_VR41XX
52 case PM_1M: return "1Mb";
53 case PM_4M: return "4Mb";
54 case PM_16M: return "16Mb";
55 case PM_64M: return "64Mb";
56 case PM_256M: return "256Mb";
57 case PM_1G: return "1Gb";
63 static void dump_tlb(int first, int last)
65 unsigned long s_entryhi, entryhi, asid;
66 unsigned long long entrylo0, entrylo1, pa;
67 unsigned int s_index, s_pagemask, pagemask, c0, c1, i;
69 bool xpa = cpu_has_xpa && (read_c0_pagegrain() & PG_ELPA);
70 int pwidth = xpa ? 11 : 8;
78 s_pagemask = read_c0_pagemask();
79 s_entryhi = read_c0_entryhi();
80 s_index = read_c0_index();
81 asid = s_entryhi & 0xff;
83 for (i = first; i <= last; i++) {
88 pagemask = read_c0_pagemask();
89 entryhi = read_c0_entryhi();
90 entrylo0 = read_c0_entrylo0();
91 entrylo1 = read_c0_entrylo1();
93 /* EHINV bit marks entire entry as invalid */
94 if (cpu_has_tlbinv && entryhi & MIPS_ENTRYHI_EHINV)
97 * Prior to tlbinv, unused entries have a virtual address of
100 if ((entryhi & ~0x1ffffUL) == CKSEG0)
103 * ASID takes effect in absence of G (global) bit.
104 * We check both G bits, even though architecturally they should
105 * match one another, because some revisions of the SB1 core may
106 * leave only a single G bit set after a machine check exception
107 * due to duplicate TLB entry.
109 if (!((entrylo0 | entrylo1) & MIPS_ENTRYLO_G) &&
110 (entryhi & 0xff) != asid)
114 * Only print entries in use
116 printk("Index: %2d pgmask=%s ", i, msk2str(pagemask));
118 c0 = (entrylo0 & MIPS_ENTRYLO_C) >> MIPS_ENTRYLO_C_SHIFT;
119 c1 = (entrylo1 & MIPS_ENTRYLO_C) >> MIPS_ENTRYLO_C_SHIFT;
121 printk("va=%0*lx asid=%02lx\n",
122 vwidth, (entryhi & ~0x1fffUL),
124 /* RI/XI are in awkward places, so mask them off separately */
125 pa = entrylo0 & ~(MIPS_ENTRYLO_RI | MIPS_ENTRYLO_XI);
127 pa |= (unsigned long long)readx_c0_entrylo0() << 30;
128 pa = (pa << 6) & PAGE_MASK;
131 printk("ri=%d xi=%d ",
132 (entrylo0 & MIPS_ENTRYLO_RI) ? 1 : 0,
133 (entrylo0 & MIPS_ENTRYLO_XI) ? 1 : 0);
134 printk("pa=%0*llx c=%d d=%d v=%d g=%d] [",
136 (entrylo0 & MIPS_ENTRYLO_D) ? 1 : 0,
137 (entrylo0 & MIPS_ENTRYLO_V) ? 1 : 0,
138 (entrylo0 & MIPS_ENTRYLO_G) ? 1 : 0);
139 /* RI/XI are in awkward places, so mask them off separately */
140 pa = entrylo1 & ~(MIPS_ENTRYLO_RI | MIPS_ENTRYLO_XI);
142 pa |= (unsigned long long)readx_c0_entrylo1() << 30;
143 pa = (pa << 6) & PAGE_MASK;
145 printk("ri=%d xi=%d ",
146 (entrylo1 & MIPS_ENTRYLO_RI) ? 1 : 0,
147 (entrylo1 & MIPS_ENTRYLO_XI) ? 1 : 0);
148 printk("pa=%0*llx c=%d d=%d v=%d g=%d]\n",
150 (entrylo1 & MIPS_ENTRYLO_D) ? 1 : 0,
151 (entrylo1 & MIPS_ENTRYLO_V) ? 1 : 0,
152 (entrylo1 & MIPS_ENTRYLO_G) ? 1 : 0);
156 write_c0_entryhi(s_entryhi);
157 write_c0_index(s_index);
158 write_c0_pagemask(s_pagemask);
161 void dump_tlb_all(void)
163 dump_tlb(0, current_cpu_data.tlbsize - 1);