2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 2007 MIPS Technologies, Inc.
7 * Copyright (C) 2007 Ralf Baechle <ralf@linux-mips.org>
9 #include <linux/clockchips.h>
10 #include <linux/interrupt.h>
11 #include <linux/percpu.h>
12 #include <linux/smp.h>
13 #include <linux/irq.h>
16 #include <asm/cevt-r4k.h>
19 static int mips_next_event(unsigned long delta,
20 struct clock_event_device *evt)
25 cnt = read_c0_count();
27 write_c0_compare(cnt);
28 res = ((int)(read_c0_count() - cnt) >= 0) ? -ETIME : 0;
32 void mips_set_clock_mode(enum clock_event_mode mode,
33 struct clock_event_device *evt)
35 /* Nothing to do ... */
38 DEFINE_PER_CPU(struct clock_event_device, mips_clockevent_device);
39 int cp0_timer_irq_installed;
41 irqreturn_t c0_compare_interrupt(int irq, void *dev_id)
43 const int r2 = cpu_has_mips_r2;
44 struct clock_event_device *cd;
45 int cpu = smp_processor_id();
49 * Before R2 of the architecture there was no way to see if a
50 * performance counter interrupt was pending, so we have to run
51 * the performance counter interrupt handler anyway.
53 if (handle_perf_irq(r2))
57 * The same applies to performance counter interrupts. But with the
58 * above we now know that the reason we got here must be a timer
59 * interrupt. Being the paranoiacs we are we check anyway.
61 if (!r2 || (read_c0_cause() & (1 << 30))) {
62 /* Clear Count/Compare Interrupt */
63 write_c0_compare(read_c0_compare());
64 cd = &per_cpu(mips_clockevent_device, cpu);
65 #ifdef CONFIG_CEVT_GIC
68 cd->event_handler(cd);
75 struct irqaction c0_compare_irqaction = {
76 .handler = c0_compare_interrupt,
77 .flags = IRQF_PERCPU | IRQF_TIMER,
82 void mips_event_handler(struct clock_event_device *dev)
87 * FIXME: This doesn't hold for the relocated E9000 compare interrupt.
89 static int c0_compare_int_pending(void)
93 return gic_get_timer_pending();
95 return (read_c0_cause() >> cp0_compare_irq_shift) & (1ul << CAUSEB_IP);
99 * Compare interrupt can be routed and latched outside the core,
100 * so wait up to worst case number of cycle counter ticks for timer interrupt
101 * changes to propagate to the cause register.
103 #define COMPARE_INT_SEEN_TICKS 50
105 int c0_compare_int_usable(void)
110 #ifdef CONFIG_KVM_GUEST
115 * IP7 already pending? Try to clear it by acking the timer.
117 if (c0_compare_int_pending()) {
118 cnt = read_c0_count();
119 write_c0_compare(cnt);
120 back_to_back_c0_hazard();
121 while (read_c0_count() < (cnt + COMPARE_INT_SEEN_TICKS))
122 if (!c0_compare_int_pending())
124 if (c0_compare_int_pending())
128 for (delta = 0x10; delta <= 0x400000; delta <<= 1) {
129 cnt = read_c0_count();
131 write_c0_compare(cnt);
132 back_to_back_c0_hazard();
133 if ((int)(read_c0_count() - cnt) < 0)
135 /* increase delta if the timer was already expired */
138 while ((int)(read_c0_count() - cnt) <= 0)
139 ; /* Wait for expiry */
141 while (read_c0_count() < (cnt + COMPARE_INT_SEEN_TICKS))
142 if (c0_compare_int_pending())
144 if (!c0_compare_int_pending())
146 cnt = read_c0_count();
147 write_c0_compare(cnt);
148 back_to_back_c0_hazard();
149 while (read_c0_count() < (cnt + COMPARE_INT_SEEN_TICKS))
150 if (!c0_compare_int_pending())
152 if (c0_compare_int_pending())
156 * Feels like a real count / compare timer.
161 int r4k_clockevent_init(void)
163 unsigned int cpu = smp_processor_id();
164 struct clock_event_device *cd;
167 if (!cpu_has_counter || !mips_hpt_frequency)
170 if (!c0_compare_int_usable())
174 * With vectored interrupts things are getting platform specific.
175 * get_c0_compare_int is a hook to allow a platform to return the
176 * interrupt number of it's liking.
178 irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;
179 if (get_c0_compare_int)
180 irq = get_c0_compare_int();
182 cd = &per_cpu(mips_clockevent_device, cpu);
185 cd->features = CLOCK_EVT_FEAT_ONESHOT;
187 clockevent_set_clock(cd, mips_hpt_frequency);
189 /* Calculate the min / max delta */
190 cd->max_delta_ns = clockevent_delta2ns(0x7fffffff, cd);
191 cd->min_delta_ns = clockevent_delta2ns(0x300, cd);
195 cd->cpumask = cpumask_of(cpu);
196 cd->set_next_event = mips_next_event;
197 cd->set_mode = mips_set_clock_mode;
198 cd->event_handler = mips_event_handler;
200 #ifdef CONFIG_CEVT_GIC
203 clockevents_register_device(cd);
205 if (cp0_timer_irq_installed)
208 cp0_timer_irq_installed = 1;
210 setup_irq(irq, &c0_compare_irqaction);