2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 2007 MIPS Technologies, Inc.
7 * Copyright (C) 2007 Ralf Baechle <ralf@linux-mips.org>
9 #include <linux/clockchips.h>
10 #include <linux/interrupt.h>
11 #include <linux/percpu.h>
12 #include <linux/smp.h>
13 #include <linux/irq.h>
16 #include <asm/cevt-r4k.h>
18 static int mips_next_event(unsigned long delta,
19 struct clock_event_device *evt)
24 cnt = read_c0_count();
26 write_c0_compare(cnt);
27 res = ((int)(read_c0_count() - cnt) >= 0) ? -ETIME : 0;
31 void mips_set_clock_mode(enum clock_event_mode mode,
32 struct clock_event_device *evt)
34 /* Nothing to do ... */
37 DEFINE_PER_CPU(struct clock_event_device, mips_clockevent_device);
38 int cp0_timer_irq_installed;
41 * Possibly handle a performance counter interrupt.
42 * Return true if the timer interrupt should not be checked
44 static inline int handle_perf_irq(int r2)
47 * The performance counter overflow interrupt may be shared with the
48 * timer interrupt (cp0_perfcount_irq < 0). If it is and a
49 * performance counter has overflowed (perf_irq() == IRQ_HANDLED)
50 * and we can't reliably determine if a counter interrupt has also
51 * happened (!r2) then don't check for a timer interrupt.
53 return (cp0_perfcount_irq < 0) &&
54 perf_irq() == IRQ_HANDLED &&
58 irqreturn_t c0_compare_interrupt(int irq, void *dev_id)
60 const int r2 = cpu_has_mips_r2_r6;
61 struct clock_event_device *cd;
62 int cpu = smp_processor_id();
66 * Before R2 of the architecture there was no way to see if a
67 * performance counter interrupt was pending, so we have to run
68 * the performance counter interrupt handler anyway.
70 if (handle_perf_irq(r2))
74 * The same applies to performance counter interrupts. But with the
75 * above we now know that the reason we got here must be a timer
76 * interrupt. Being the paranoiacs we are we check anyway.
78 if (!r2 || (read_c0_cause() & (1 << 30))) {
79 /* Clear Count/Compare Interrupt */
80 write_c0_compare(read_c0_compare());
81 cd = &per_cpu(mips_clockevent_device, cpu);
82 cd->event_handler(cd);
89 struct irqaction c0_compare_irqaction = {
90 .handler = c0_compare_interrupt,
91 .flags = IRQF_PERCPU | IRQF_TIMER,
96 void mips_event_handler(struct clock_event_device *dev)
101 * FIXME: This doesn't hold for the relocated E9000 compare interrupt.
103 static int c0_compare_int_pending(void)
105 /* When cpu_has_mips_r2, this checks Cause.TI instead of Cause.IP7 */
106 return (read_c0_cause() >> cp0_compare_irq_shift) & (1ul << CAUSEB_IP);
110 * Compare interrupt can be routed and latched outside the core,
111 * so wait up to worst case number of cycle counter ticks for timer interrupt
112 * changes to propagate to the cause register.
114 #define COMPARE_INT_SEEN_TICKS 50
116 int c0_compare_int_usable(void)
121 #ifdef CONFIG_KVM_GUEST
126 * IP7 already pending? Try to clear it by acking the timer.
128 if (c0_compare_int_pending()) {
129 cnt = read_c0_count();
130 write_c0_compare(cnt);
131 back_to_back_c0_hazard();
132 while (read_c0_count() < (cnt + COMPARE_INT_SEEN_TICKS))
133 if (!c0_compare_int_pending())
135 if (c0_compare_int_pending())
139 for (delta = 0x10; delta <= 0x400000; delta <<= 1) {
140 cnt = read_c0_count();
142 write_c0_compare(cnt);
143 back_to_back_c0_hazard();
144 if ((int)(read_c0_count() - cnt) < 0)
146 /* increase delta if the timer was already expired */
149 while ((int)(read_c0_count() - cnt) <= 0)
150 ; /* Wait for expiry */
152 while (read_c0_count() < (cnt + COMPARE_INT_SEEN_TICKS))
153 if (c0_compare_int_pending())
155 if (!c0_compare_int_pending())
157 cnt = read_c0_count();
158 write_c0_compare(cnt);
159 back_to_back_c0_hazard();
160 while (read_c0_count() < (cnt + COMPARE_INT_SEEN_TICKS))
161 if (!c0_compare_int_pending())
163 if (c0_compare_int_pending())
167 * Feels like a real count / compare timer.
172 int r4k_clockevent_init(void)
174 unsigned int cpu = smp_processor_id();
175 struct clock_event_device *cd;
178 if (!cpu_has_counter || !mips_hpt_frequency)
181 if (!c0_compare_int_usable())
185 * With vectored interrupts things are getting platform specific.
186 * get_c0_compare_int is a hook to allow a platform to return the
187 * interrupt number of it's liking.
189 irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;
190 if (get_c0_compare_int)
191 irq = get_c0_compare_int();
193 cd = &per_cpu(mips_clockevent_device, cpu);
196 cd->features = CLOCK_EVT_FEAT_ONESHOT |
197 CLOCK_EVT_FEAT_C3STOP |
198 CLOCK_EVT_FEAT_PERCPU;
200 clockevent_set_clock(cd, mips_hpt_frequency);
202 /* Calculate the min / max delta */
203 cd->max_delta_ns = clockevent_delta2ns(0x7fffffff, cd);
204 cd->min_delta_ns = clockevent_delta2ns(0x300, cd);
208 cd->cpumask = cpumask_of(cpu);
209 cd->set_next_event = mips_next_event;
210 cd->set_mode = mips_set_clock_mode;
211 cd->event_handler = mips_event_handler;
213 clockevents_register_device(cd);
215 if (cp0_timer_irq_installed)
218 cp0_timer_irq_installed = 1;
220 setup_irq(irq, &c0_compare_irqaction);