1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (C) 2009 Lemote, Inc.
4 * Author: Wu Zhangjin <wuzhangjin@gmail.com>
7 #ifndef __ASM_MACH_LOONGSON64_LOONGSON_H
8 #define __ASM_MACH_LOONGSON64_LOONGSON_H
11 #include <linux/init.h>
12 #include <linux/irq.h>
13 #include <boot_param.h>
16 /* machine-specific reboot/halt operation */
17 extern void mach_prepare_reboot(void);
18 extern void mach_prepare_shutdown(void);
20 /* environment arguments from bootloader */
21 extern u32 cpu_clock_freq;
22 extern u32 memsize, highmemsize;
23 extern const struct plat_smp_ops loongson3_smp_ops;
25 /* loongson-specific command line, env and memory initialization */
26 extern void __init prom_init_memory(void);
27 extern void __init prom_init_env(void);
29 /* irq operation functions */
30 extern void mach_irq_dispatch(unsigned int pending);
31 extern int mach_i8259_irq(void);
33 /* We need this in some places... */
36 for (x = 0; x < 100000; x++) \
37 __asm__ __volatile__(""); \
40 #define LOONGSON_REG(x) \
41 (*(volatile u32 *)((char *)CKSEG1ADDR(LOONGSON_REG_BASE) + (x)))
43 #define LOONGSON3_REG8(base, x) \
44 (*(volatile u8 *)((char *)TO_UNCAC(base) + (x)))
46 #define LOONGSON3_REG32(base, x) \
47 (*(volatile u32 *)((char *)TO_UNCAC(base) + (x)))
49 #define LOONGSON_FLASH_BASE 0x1c000000
50 #define LOONGSON_FLASH_SIZE 0x02000000 /* 32M */
51 #define LOONGSON_FLASH_TOP (LOONGSON_FLASH_BASE+LOONGSON_FLASH_SIZE-1)
53 #define LOONGSON_LIO0_BASE 0x1e000000
54 #define LOONGSON_LIO0_SIZE 0x01C00000 /* 28M */
55 #define LOONGSON_LIO0_TOP (LOONGSON_LIO0_BASE+LOONGSON_LIO0_SIZE-1)
57 #define LOONGSON_BOOT_BASE 0x1fc00000
58 #define LOONGSON_BOOT_SIZE 0x00100000 /* 1M */
59 #define LOONGSON_BOOT_TOP (LOONGSON_BOOT_BASE+LOONGSON_BOOT_SIZE-1)
60 #define LOONGSON_REG_BASE 0x1fe00000
61 #define LOONGSON_REG_SIZE 0x00100000 /* 256Bytes + 256Bytes + ??? */
62 #define LOONGSON_REG_TOP (LOONGSON_REG_BASE+LOONGSON_REG_SIZE-1)
63 /* Loongson-3 specific registers */
64 #define LOONGSON3_REG_BASE 0x3ff00000
65 #define LOONGSON3_REG_SIZE 0x00100000 /* 256Bytes + 256Bytes + ??? */
66 #define LOONGSON3_REG_TOP (LOONGSON3_REG_BASE+LOONGSON3_REG_SIZE-1)
68 #define LOONGSON_LIO1_BASE 0x1ff00000
69 #define LOONGSON_LIO1_SIZE 0x00100000 /* 1M */
70 #define LOONGSON_LIO1_TOP (LOONGSON_LIO1_BASE+LOONGSON_LIO1_SIZE-1)
72 #define LOONGSON_PCILO0_BASE 0x10000000
73 #define LOONGSON_PCILO1_BASE 0x14000000
74 #define LOONGSON_PCILO2_BASE 0x18000000
75 #define LOONGSON_PCILO_BASE LOONGSON_PCILO0_BASE
76 #define LOONGSON_PCILO_SIZE 0x0c000000 /* 64M * 3 */
77 #define LOONGSON_PCILO_TOP (LOONGSON_PCILO0_BASE+LOONGSON_PCILO_SIZE-1)
79 #define LOONGSON_PCICFG_BASE 0x1fe80000
80 #define LOONGSON_PCICFG_SIZE 0x00000800 /* 2K */
81 #define LOONGSON_PCICFG_TOP (LOONGSON_PCICFG_BASE+LOONGSON_PCICFG_SIZE-1)
83 #define LOONGSON_PCIIO_BASE loongson_sysconf.pci_io_base
85 #define LOONGSON_PCIIO_SIZE 0x00100000 /* 1M */
86 #define LOONGSON_PCIIO_TOP (LOONGSON_PCIIO_BASE+LOONGSON_PCIIO_SIZE-1)
88 /* Loongson Register Bases */
90 #define LOONGSON_PCICONFIGBASE 0x00
91 #define LOONGSON_REGBASE 0x100
93 /* PCI Configuration Registers */
95 #define LOONGSON_PCI_REG(x) LOONGSON_REG(LOONGSON_PCICONFIGBASE + (x))
96 #define LOONGSON_PCIDID LOONGSON_PCI_REG(0x00)
97 #define LOONGSON_PCICMD LOONGSON_PCI_REG(0x04)
98 #define LOONGSON_PCICLASS LOONGSON_PCI_REG(0x08)
99 #define LOONGSON_PCILTIMER LOONGSON_PCI_REG(0x0c)
100 #define LOONGSON_PCIBASE0 LOONGSON_PCI_REG(0x10)
101 #define LOONGSON_PCIBASE1 LOONGSON_PCI_REG(0x14)
102 #define LOONGSON_PCIBASE2 LOONGSON_PCI_REG(0x18)
103 #define LOONGSON_PCIBASE3 LOONGSON_PCI_REG(0x1c)
104 #define LOONGSON_PCIBASE4 LOONGSON_PCI_REG(0x20)
105 #define LOONGSON_PCIEXPRBASE LOONGSON_PCI_REG(0x30)
106 #define LOONGSON_PCIINT LOONGSON_PCI_REG(0x3c)
108 #define LOONGSON_PCI_ISR4C LOONGSON_PCI_REG(0x4c)
110 #define LOONGSON_PCICMD_PERR_CLR 0x80000000
111 #define LOONGSON_PCICMD_SERR_CLR 0x40000000
112 #define LOONGSON_PCICMD_MABORT_CLR 0x20000000
113 #define LOONGSON_PCICMD_MTABORT_CLR 0x10000000
114 #define LOONGSON_PCICMD_TABORT_CLR 0x08000000
115 #define LOONGSON_PCICMD_MPERR_CLR 0x01000000
116 #define LOONGSON_PCICMD_PERRRESPEN 0x00000040
117 #define LOONGSON_PCICMD_ASTEPEN 0x00000080
118 #define LOONGSON_PCICMD_SERREN 0x00000100
119 #define LOONGSON_PCILTIMER_BUSLATENCY 0x0000ff00
120 #define LOONGSON_PCILTIMER_BUSLATENCY_SHIFT 8
122 /* Loongson h/w Configuration */
124 #define LOONGSON_GENCFG_OFFSET 0x4
125 #define LOONGSON_GENCFG LOONGSON_REG(LOONGSON_REGBASE + LOONGSON_GENCFG_OFFSET)
127 #define LOONGSON_GENCFG_DEBUGMODE 0x00000001
128 #define LOONGSON_GENCFG_SNOOPEN 0x00000002
129 #define LOONGSON_GENCFG_CPUSELFRESET 0x00000004
131 #define LOONGSON_GENCFG_FORCE_IRQA 0x00000008
132 #define LOONGSON_GENCFG_IRQA_ISOUT 0x00000010
133 #define LOONGSON_GENCFG_IRQA_FROM_INT1 0x00000020
134 #define LOONGSON_GENCFG_BYTESWAP 0x00000040
136 #define LOONGSON_GENCFG_UNCACHED 0x00000080
137 #define LOONGSON_GENCFG_PREFETCHEN 0x00000100
138 #define LOONGSON_GENCFG_WBEHINDEN 0x00000200
139 #define LOONGSON_GENCFG_CACHEALG 0x00000c00
140 #define LOONGSON_GENCFG_CACHEALG_SHIFT 10
141 #define LOONGSON_GENCFG_PCIQUEUE 0x00001000
142 #define LOONGSON_GENCFG_CACHESTOP 0x00002000
143 #define LOONGSON_GENCFG_MSTRBYTESWAP 0x00004000
144 #define LOONGSON_GENCFG_BUSERREN 0x00008000
145 #define LOONGSON_GENCFG_NORETRYTIMEOUT 0x00010000
146 #define LOONGSON_GENCFG_SHORTCOPYTIMEOUT 0x00020000
148 /* PCI address map control */
150 #define LOONGSON_PCIMAP LOONGSON_REG(LOONGSON_REGBASE + 0x10)
151 #define LOONGSON_PCIMEMBASECFG LOONGSON_REG(LOONGSON_REGBASE + 0x14)
152 #define LOONGSON_PCIMAP_CFG LOONGSON_REG(LOONGSON_REGBASE + 0x18)
154 /* GPIO Regs - r/w */
156 #define LOONGSON_GPIODATA LOONGSON_REG(LOONGSON_REGBASE + 0x1c)
157 #define LOONGSON_GPIOIE LOONGSON_REG(LOONGSON_REGBASE + 0x20)
159 /* ICU Configuration Regs - r/w */
161 #define LOONGSON_INTEDGE LOONGSON_REG(LOONGSON_REGBASE + 0x24)
162 #define LOONGSON_INTSTEER LOONGSON_REG(LOONGSON_REGBASE + 0x28)
163 #define LOONGSON_INTPOL LOONGSON_REG(LOONGSON_REGBASE + 0x2c)
165 /* ICU Enable Regs - IntEn & IntISR are r/o. */
167 #define LOONGSON_INTENSET LOONGSON_REG(LOONGSON_REGBASE + 0x30)
168 #define LOONGSON_INTENCLR LOONGSON_REG(LOONGSON_REGBASE + 0x34)
169 #define LOONGSON_INTEN LOONGSON_REG(LOONGSON_REGBASE + 0x38)
170 #define LOONGSON_INTISR LOONGSON_REG(LOONGSON_REGBASE + 0x3c)
173 #define LOONGSON_ICU_MBOXES 0x0000000f
174 #define LOONGSON_ICU_MBOXES_SHIFT 0
175 #define LOONGSON_ICU_DMARDY 0x00000010
176 #define LOONGSON_ICU_DMAEMPTY 0x00000020
177 #define LOONGSON_ICU_COPYRDY 0x00000040
178 #define LOONGSON_ICU_COPYEMPTY 0x00000080
179 #define LOONGSON_ICU_COPYERR 0x00000100
180 #define LOONGSON_ICU_PCIIRQ 0x00000200
181 #define LOONGSON_ICU_MASTERERR 0x00000400
182 #define LOONGSON_ICU_SYSTEMERR 0x00000800
183 #define LOONGSON_ICU_DRAMPERR 0x00001000
184 #define LOONGSON_ICU_RETRYERR 0x00002000
185 #define LOONGSON_ICU_GPIOS 0x01ff0000
186 #define LOONGSON_ICU_GPIOS_SHIFT 16
187 #define LOONGSON_ICU_GPINS 0x7e000000
188 #define LOONGSON_ICU_GPINS_SHIFT 25
189 #define LOONGSON_ICU_MBOX(N) (1<<(LOONGSON_ICU_MBOXES_SHIFT+(N)))
190 #define LOONGSON_ICU_GPIO(N) (1<<(LOONGSON_ICU_GPIOS_SHIFT+(N)))
191 #define LOONGSON_ICU_GPIN(N) (1<<(LOONGSON_ICU_GPINS_SHIFT+(N)))
193 /* PCI prefetch window base & mask */
195 #define LOONGSON_MEM_WIN_BASE_L LOONGSON_REG(LOONGSON_REGBASE + 0x40)
196 #define LOONGSON_MEM_WIN_BASE_H LOONGSON_REG(LOONGSON_REGBASE + 0x44)
197 #define LOONGSON_MEM_WIN_MASK_L LOONGSON_REG(LOONGSON_REGBASE + 0x48)
198 #define LOONGSON_MEM_WIN_MASK_H LOONGSON_REG(LOONGSON_REGBASE + 0x4c)
202 #define LOONGSON_PCI_HIT0_SEL_L LOONGSON_REG(LOONGSON_REGBASE + 0x50)
203 #define LOONGSON_PCI_HIT0_SEL_H LOONGSON_REG(LOONGSON_REGBASE + 0x54)
204 #define LOONGSON_PCI_HIT1_SEL_L LOONGSON_REG(LOONGSON_REGBASE + 0x58)
205 #define LOONGSON_PCI_HIT1_SEL_H LOONGSON_REG(LOONGSON_REGBASE + 0x5c)
206 #define LOONGSON_PCI_HIT2_SEL_L LOONGSON_REG(LOONGSON_REGBASE + 0x60)
207 #define LOONGSON_PCI_HIT2_SEL_H LOONGSON_REG(LOONGSON_REGBASE + 0x64)
209 /* PXArb Config & Status */
211 #define LOONGSON_PXARB_CFG LOONGSON_REG(LOONGSON_REGBASE + 0x68)
212 #define LOONGSON_PXARB_STATUS LOONGSON_REG(LOONGSON_REGBASE + 0x6c)
214 #define MAX_PACKAGES 4
216 /* Chip Config registor of each physical cpu package, PRid >= Loongson-2F */
217 extern u64 loongson_chipcfg[MAX_PACKAGES];
218 #define LOONGSON_CHIPCFG(id) (*(volatile u32 *)(loongson_chipcfg[id]))
220 /* Chip Temperature registor of each physical cpu package, PRid >= Loongson-3A */
221 extern u64 loongson_chiptemp[MAX_PACKAGES];
222 #define LOONGSON_CHIPTEMP(id) (*(volatile u32 *)(loongson_chiptemp[id]))
224 /* Freq Control register of each physical cpu package, PRid >= Loongson-3B */
225 extern u64 loongson_freqctrl[MAX_PACKAGES];
226 #define LOONGSON_FREQCTRL(id) (*(volatile u32 *)(loongson_freqctrl[id]))
230 #define LOONGSON_PCIMAP_PCIMAP_LO0 0x0000003f
231 #define LOONGSON_PCIMAP_PCIMAP_LO0_SHIFT 0
232 #define LOONGSON_PCIMAP_PCIMAP_LO1 0x00000fc0
233 #define LOONGSON_PCIMAP_PCIMAP_LO1_SHIFT 6
234 #define LOONGSON_PCIMAP_PCIMAP_LO2 0x0003f000
235 #define LOONGSON_PCIMAP_PCIMAP_LO2_SHIFT 12
236 #define LOONGSON_PCIMAP_PCIMAP_2 0x00040000
237 #define LOONGSON_PCIMAP_WIN(WIN, ADDR) \
238 ((((ADDR)>>26) & LOONGSON_PCIMAP_PCIMAP_LO0) << ((WIN)*6))
240 #endif /* __ASM_MACH_LOONGSON64_LOONGSON_H */