License cleanup: add SPDX GPL-2.0 license identifier to files with no license
[linux-block.git] / arch / mips / include / asm / mach-bcm47xx / cpu-feature-overrides.h
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __ASM_MACH_BCM47XX_CPU_FEATURE_OVERRIDES_H
3 #define __ASM_MACH_BCM47XX_CPU_FEATURE_OVERRIDES_H
4
5 #define cpu_has_tlb                     1
6 #define cpu_has_4kex                    1
7 #define cpu_has_3k_cache                0
8 #define cpu_has_4k_cache                1
9 #define cpu_has_tx39_cache              0
10 #define cpu_has_fpu                     0
11 #define cpu_has_32fpr                   0
12 #define cpu_has_counter                 1
13 #if defined(CONFIG_BCM47XX_BCMA) && !defined(CONFIG_BCM47XX_SSB)
14 #define cpu_has_watch                   1
15 #elif defined(CONFIG_BCM47XX_SSB) && !defined(CONFIG_BCM47XX_BCMA)
16 #define cpu_has_watch                   0
17 #endif
18 #define cpu_has_divec                   1
19 #define cpu_has_vce                     0
20 #define cpu_has_cache_cdex_p            0
21 #define cpu_has_cache_cdex_s            0
22 #define cpu_has_prefetch                1
23 #define cpu_has_mcheck                  1
24 #define cpu_has_ejtag                   1
25 #define cpu_has_llsc                    1
26
27 /* cpu_has_mips16 */
28 #define cpu_has_mdmx                    0
29 #define cpu_has_mips3d                  0
30 #define cpu_has_rixi                    0
31 #define cpu_has_mmips                   0
32 #define cpu_has_smartmips               0
33 #define cpu_has_vtag_icache             0
34 /* cpu_has_dc_aliases */
35 #define cpu_has_ic_fills_f_dc           0
36 #define cpu_has_pindexed_dcache         0
37 #define cpu_icache_snoops_remote_store  0
38
39 #define cpu_has_mips_2                  1
40 #define cpu_has_mips_3                  0
41 #define cpu_has_mips32r1                1
42 #if defined(CONFIG_BCM47XX_BCMA) && !defined(CONFIG_BCM47XX_SSB)
43 #define cpu_has_mips32r2                1
44 #elif defined(CONFIG_BCM47XX_SSB) && !defined(CONFIG_BCM47XX_BCMA)
45 #define cpu_has_mips32r2                0
46 #endif
47 #define cpu_has_mips64r1                0
48 #define cpu_has_mips64r2                0
49
50 #if defined(CONFIG_BCM47XX_BCMA) && !defined(CONFIG_BCM47XX_SSB)
51 #define cpu_has_dsp                     1
52 #define cpu_has_dsp2                    1
53 #elif defined(CONFIG_BCM47XX_SSB) && !defined(CONFIG_BCM47XX_BCMA)
54 #define cpu_has_dsp                     0
55 #define cpu_has_dsp2                    0
56 #endif
57 #define cpu_has_mipsmt                  0
58 /* cpu_has_userlocal */
59
60 #define cpu_has_nofpuex                 0
61 #define cpu_has_64bits                  0
62 #define cpu_has_64bit_zero_reg          0
63 #if defined(CONFIG_BCM47XX_BCMA) && !defined(CONFIG_BCM47XX_SSB)
64 #define cpu_has_vint                    1
65 #elif defined(CONFIG_BCM47XX_SSB) && !defined(CONFIG_BCM47XX_BCMA)
66 #define cpu_has_vint                    0
67 #endif
68 #define cpu_has_veic                    0
69 #define cpu_has_inclusive_pcaches       0
70
71 #if defined(CONFIG_BCM47XX_BCMA) && !defined(CONFIG_BCM47XX_SSB)
72 #define cpu_dcache_line_size()          32
73 #define cpu_icache_line_size()          32
74 #define cpu_has_perf_cntr_intr_bit      1
75 #elif defined(CONFIG_BCM47XX_SSB) && !defined(CONFIG_BCM47XX_BCMA)
76 #define cpu_dcache_line_size()          16
77 #define cpu_icache_line_size()          16
78 #define cpu_has_perf_cntr_intr_bit      0
79 #endif
80 #define cpu_scache_line_size()          0
81 #define cpu_has_vz                      0
82
83 #endif /* __ASM_MACH_BCM47XX_CPU_FEATURE_OVERRIDES_H */