arch/mips/boot/dts/img/boston.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /dts-v1/;
   3
   4 #include <dt-bindings/clock/boston-clock.h>
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/interrupt-controller/irq.h>
   7 #include <dt-bindings/interrupt-controller/mips-gic.h>
   8
   9 / {
  10         #address-cells = <1>;
  11         #size-cells = <1>;
  12         compatible = "img,boston";
  13
  14         chosen {
  15                 stdout-path = "uart0:115200";
  16         };
  17
  18         aliases {
  19                 uart0 = &uart0;
  20         };
  21
  22         cpus {
  23                 #address-cells = <1>;
  24                 #size-cells = <0>;
  25
  26                 cpu@0 {
  27                         device_type = "cpu";
  28                         compatible = "img,mips";
  29                         reg = <0>;
  30                         clocks = <&clk_boston BOSTON_CLK_CPU>;
  31                 };
  32         };
  33
  34         memory@0 {
  35                 device_type = "memory";
  36                 reg = <0x00000000 0x10000000>;
  37         };
  38
  39         pci0: pci@10000000 {
  40                 compatible = "xlnx,axi-pcie-host-1.00.a";
  41                 device_type = "pci";
  42                 reg = <0x10000000 0x2000000>;
  43
  44                 #address-cells = <3>;
  45                 #size-cells = <2>;
  46                 #interrupt-cells = <1>;
  47
  48                 interrupt-parent = <&gic>;
  49                 interrupts = <GIC_SHARED 2 IRQ_TYPE_LEVEL_HIGH>;
  50
  51                 ranges = <0x02000000 0 0x40000000
  52                           0x40000000 0 0x40000000>;
  53
  54                 interrupt-map-mask = <0 0 0 7>;
  55                 interrupt-map = <0 0 0 1 &pci0_intc 1>,
  56                                 <0 0 0 2 &pci0_intc 2>,
  57                                 <0 0 0 3 &pci0_intc 3>,
  58                                 <0 0 0 4 &pci0_intc 4>;
  59
  60                 pci0_intc: interrupt-controller {
  61                         interrupt-controller;
  62                         #address-cells = <0>;
  63                         #interrupt-cells = <1>;
  64                 };
  65         };
  66
  67         pci1: pci@12000000 {
  68                 compatible = "xlnx,axi-pcie-host-1.00.a";
  69                 device_type = "pci";
  70                 reg = <0x12000000 0x2000000>;
  71
  72                 #address-cells = <3>;
  73                 #size-cells = <2>;
  74                 #interrupt-cells = <1>;
  75
  76                 interrupt-parent = <&gic>;
  77                 interrupts = <GIC_SHARED 1 IRQ_TYPE_LEVEL_HIGH>;
  78
  79                 ranges = <0x02000000 0 0x20000000
  80                           0x20000000 0 0x20000000>;
  81
  82                 interrupt-map-mask = <0 0 0 7>;
  83                 interrupt-map = <0 0 0 1 &pci1_intc 1>,
  84                                 <0 0 0 2 &pci1_intc 2>,
  85                                 <0 0 0 3 &pci1_intc 3>,
  86                                 <0 0 0 4 &pci1_intc 4>;
  87
  88                 pci1_intc: interrupt-controller {
  89                         interrupt-controller;
  90                         #address-cells = <0>;
  91                         #interrupt-cells = <1>;
  92                 };
  93         };
  94
  95         pci2: pci@14000000 {
  96                 compatible = "xlnx,axi-pcie-host-1.00.a";
  97                 device_type = "pci";
  98                 reg = <0x14000000 0x2000000>;
  99
 100                 #address-cells = <3>;
 101                 #size-cells = <2>;
 102                 #interrupt-cells = <1>;
 103
 104                 interrupt-parent = <&gic>;
 105                 interrupts = <GIC_SHARED 0 IRQ_TYPE_LEVEL_HIGH>;
 106
 107                 ranges = <0x02000000 0 0x16000000
 108                           0x16000000 0 0x100000>;
 109
 110                 interrupt-map-mask = <0 0 0 7>;
 111                 interrupt-map = <0 0 0 1 &pci2_intc 1>,
 112                                 <0 0 0 2 &pci2_intc 2>,
 113                                 <0 0 0 3 &pci2_intc 3>,
 114                                 <0 0 0 4 &pci2_intc 4>;
 115
 116                 pci2_intc: interrupt-controller {
 117                         interrupt-controller;
 118                         #address-cells = <0>;
 119                         #interrupt-cells = <1>;
 120                 };
 121
 122                 pci2_root@0,0,0 {
 123                         compatible = "pci10ee,7021";
 124                         reg = <0x00000000 0 0 0 0>;
 125
 126                         #address-cells = <3>;
 127                         #size-cells = <2>;
 128                         #interrupt-cells = <1>;
 129
 130                         eg20t_bridge@1,0,0 {
 131                                 compatible = "pci8086,8800";
 132                                 reg = <0x00010000 0 0 0 0>;
 133
 134                                 #address-cells = <3>;
 135                                 #size-cells = <2>;
 136                                 #interrupt-cells = <1>;
 137
 138                                 eg20t_mac@2,0,1 {
 139                                         compatible = "pci8086,8802";
 140                                         reg = <0x00020100 0 0 0 0>;
 141                                         phy-reset-gpios = <&eg20t_gpio 6
 142                                                            GPIO_ACTIVE_LOW>;
 143                                 };
 144
 145                                 eg20t_gpio: eg20t_gpio@2,0,2 {
 146                                         compatible = "pci8086,8803";
 147                                         reg = <0x00020200 0 0 0 0>;
 148
 149                                         gpio-controller;
 150                                         #gpio-cells = <2>;
 151                                 };
 152
 153                                 eg20t_i2c@2,12,2 {
 154                                         compatible = "pci8086,8817";
 155                                         reg = <0x00026200 0 0 0 0>;
 156
 157                                         #address-cells = <1>;
 158                                         #size-cells = <0>;
 159
 160                                         rtc@0x68 {
 161                                                 compatible = "st,m41t81s";
 162                                                 reg = <0x68>;
 163                                         };
 164                                 };
 165                         };
 166                 };
 167         };
 168
 169         gic: interrupt-controller@16120000 {
 170                 compatible = "mti,gic";
 171                 reg = <0x16120000 0x20000>;
 172
 173                 interrupt-controller;
 174                 #interrupt-cells = <3>;
 175
 176                 timer {
 177                         compatible = "mti,gic-timer";
 178                         interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
 179                         clocks = <&clk_boston BOSTON_CLK_CPU>;
 180                 };
 181         };
 182
 183         cdmm@16140000 {
 184                 compatible = "mti,mips-cdmm";
 185                 reg = <0x16140000 0x8000>;
 186         };
 187
 188         cpc@16200000 {
 189                 compatible = "mti,mips-cpc";
 190                 reg = <0x16200000 0x8000>;
 191         };
 192
 193         plat_regs: system-controller@17ffd000 {
 194                 compatible = "img,boston-platform-regs", "syscon";
 195                 reg = <0x17ffd000 0x1000>;
 196
 197                 clk_boston: clock {
 198                         compatible = "img,boston-clock";
 199                         #clock-cells = <1>;
 200                 };
 201         };
 202
 203         reboot: syscon-reboot {
 204                 compatible = "syscon-reboot";
 205                 regmap = <&plat_regs>;
 206                 offset = <0x10>;
 207                 mask = <0x10>;
 208         };
 209
 210         uart0: uart@17ffe000 {
 211                 compatible = "ns16550a";
 212                 reg = <0x17ffe000 0x1000>;
 213                 reg-shift = <2>;
 214
 215                 interrupt-parent = <&gic>;
 216                 interrupts = <GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH>;
 217
 218                 clocks = <&clk_boston BOSTON_CLK_SYS>;
 219         };
 220
 221         lcd: lcd@17fff000 {
 222                 compatible = "img,boston-lcd";
 223                 reg = <0x17fff000 0x8>;
 224         };
 225 };