1 # SPDX-License-Identifier: GPL-2.0
5 select ARCH_32BIT_OFF_T if !64BIT
6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7 select ARCH_HAS_CURRENT_STACK_POINTER if !CC_IS_CLANG || CLANG_VERSION >= 140000
8 select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
9 select ARCH_HAS_FORTIFY_SOURCE
11 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
12 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
13 select ARCH_HAS_STRNCPY_FROM_USER
14 select ARCH_HAS_STRNLEN_USER
15 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
16 select ARCH_HAS_UBSAN_SANITIZE_ALL
17 select ARCH_HAS_GCOV_PROFILE_ALL
18 select ARCH_KEEP_MEMBLOCK
19 select ARCH_SUPPORTS_UPROBES
20 select ARCH_USE_BUILTIN_BSWAP
21 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
22 select ARCH_USE_MEMTEST
23 select ARCH_USE_QUEUED_RWLOCKS
24 select ARCH_USE_QUEUED_SPINLOCKS
25 select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES
26 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
27 select ARCH_WANT_IPC_PARSE_VERSION
28 select ARCH_WANT_LD_ORPHAN_WARN
29 select BUILDTIME_TABLE_SORT
30 select CLONE_BACKWARDS
31 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
32 select CPU_PM if CPU_IDLE
33 select GENERIC_ATOMIC64 if !64BIT
34 select GENERIC_CMOS_UPDATE
35 select GENERIC_CPU_AUTOPROBE
36 select GENERIC_GETTIMEOFDAY
38 select GENERIC_IRQ_PROBE
39 select GENERIC_IRQ_SHOW
40 select GENERIC_ISA_DMA if EISA
41 select GENERIC_LIB_ASHLDI3
42 select GENERIC_LIB_ASHRDI3
43 select GENERIC_LIB_CMPDI2
44 select GENERIC_LIB_LSHRDI3
45 select GENERIC_LIB_UCMPDI2
46 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
47 select GENERIC_SMP_IDLE_THREAD
48 select GENERIC_TIME_VSYSCALL
49 select GUP_GET_PXX_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
50 select HAVE_ARCH_COMPILER_H
51 select HAVE_ARCH_JUMP_LABEL
52 select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
53 select HAVE_ARCH_MMAP_RND_BITS if MMU
54 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
55 select HAVE_ARCH_SECCOMP_FILTER
56 select HAVE_ARCH_TRACEHOOK
57 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
58 select HAVE_ASM_MODVERSIONS
59 select HAVE_CONTEXT_TRACKING_USER
61 select HAVE_C_RECORDMCOUNT
62 select HAVE_DEBUG_KMEMLEAK
63 select HAVE_DEBUG_STACKOVERFLOW
64 select HAVE_DMA_CONTIGUOUS
65 select HAVE_DYNAMIC_FTRACE
66 select HAVE_EBPF_JIT if !CPU_MICROMIPS && \
67 !CPU_DADDI_WORKAROUNDS && \
68 !CPU_R4000_WORKAROUNDS && \
69 !CPU_R4400_WORKAROUNDS
70 select HAVE_EXIT_THREAD
72 select HAVE_FTRACE_MCOUNT_RECORD
73 select HAVE_FUNCTION_GRAPH_TRACER
74 select HAVE_FUNCTION_TRACER
75 select HAVE_GCC_PLUGINS
76 select HAVE_GENERIC_VDSO
77 select HAVE_IOREMAP_PROT
78 select HAVE_IRQ_EXIT_ON_IRQ_STACK
79 select HAVE_IRQ_TIME_ACCOUNTING
81 select HAVE_KRETPROBES
82 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
83 select HAVE_MOD_ARCH_SPECIFIC
85 select HAVE_PERF_EVENTS
87 select HAVE_PERF_USER_STACK_DUMP
88 select HAVE_REGS_AND_STACK_ACCESS_API
90 select HAVE_SPARSE_SYSCALL_NR
91 select HAVE_STACKPROTECTOR
92 select HAVE_SYSCALL_TRACEPOINTS
93 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
94 select IRQ_FORCED_THREADING
96 select MODULES_USE_ELF_REL if MODULES
97 select MODULES_USE_ELF_RELA if MODULES && 64BIT
98 select PERF_USE_VMALLOC
99 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
101 select SYSCTL_EXCEPTION_TRACE
102 select TRACE_IRQFLAGS_SUPPORT
103 select ARCH_HAS_ELFCORE_COMPAT
104 select HAVE_ARCH_KCSAN if 64BIT
106 config MIPS_FIXUP_BIGPHYS_ADDR
114 select SYS_SUPPORTS_32BIT_KERNEL
115 select SYS_SUPPORTS_LITTLE_ENDIAN
116 select SYS_SUPPORTS_ZBOOT
117 select DMA_NONCOHERENT
118 select ARCH_HAS_SYNC_DMA_FOR_CPU
123 select GENERIC_IRQ_CHIP
124 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
126 select CPU_SUPPORTS_CPUFREQ
127 select MIPS_EXTERNAL_TIMER
129 menu "Machine selection"
133 default MIPS_GENERIC_KERNEL
135 config MIPS_GENERIC_KERNEL
136 bool "Generic board-agnostic MIPS kernel"
137 select ARCH_HAS_SETUP_DMA_OPS
142 select CLKSRC_MIPS_GIC
144 select CPU_MIPSR2_IRQ_EI
145 select CPU_MIPSR2_IRQ_VI
147 select DMA_NONCOHERENT
150 select MIPS_AUTO_PFN_OFFSET
151 select MIPS_CPU_SCACHE
153 select MIPS_L1_CACHE_SHIFT_7
154 select NO_EXCEPT_FILL
155 select PCI_DRIVERS_GENERIC
158 select SYS_HAS_CPU_MIPS32_R1
159 select SYS_HAS_CPU_MIPS32_R2
160 select SYS_HAS_CPU_MIPS32_R6
161 select SYS_HAS_CPU_MIPS64_R1
162 select SYS_HAS_CPU_MIPS64_R2
163 select SYS_HAS_CPU_MIPS64_R6
164 select SYS_SUPPORTS_32BIT_KERNEL
165 select SYS_SUPPORTS_64BIT_KERNEL
166 select SYS_SUPPORTS_BIG_ENDIAN
167 select SYS_SUPPORTS_HIGHMEM
168 select SYS_SUPPORTS_LITTLE_ENDIAN
169 select SYS_SUPPORTS_MICROMIPS
170 select SYS_SUPPORTS_MIPS16
171 select SYS_SUPPORTS_MIPS_CPS
172 select SYS_SUPPORTS_MULTITHREADING
173 select SYS_SUPPORTS_RELOCATABLE
174 select SYS_SUPPORTS_SMARTMIPS
175 select SYS_SUPPORTS_ZBOOT
177 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
178 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
179 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
180 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
181 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
182 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
185 Select this to build a kernel which aims to support multiple boards,
186 generally using a flattened device tree passed from the bootloader
187 using the boot protocol defined in the UHI (Unified Hosting
188 Interface) specification.
191 bool "Alchemy processor based machines"
192 select PHYS_ADDR_T_64BIT
196 select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is
197 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
198 select SYS_HAS_CPU_MIPS32_R1
199 select SYS_SUPPORTS_32BIT_KERNEL
200 select SYS_SUPPORTS_APM_EMULATION
202 select SYS_SUPPORTS_ZBOOT
206 bool "Texas Instruments AR7"
209 select DMA_NONCOHERENT
213 select NO_EXCEPT_FILL
215 select SYS_HAS_CPU_MIPS32_R1
216 select SYS_HAS_EARLY_PRINTK
217 select SYS_SUPPORTS_32BIT_KERNEL
218 select SYS_SUPPORTS_LITTLE_ENDIAN
219 select SYS_SUPPORTS_MIPS16
220 select SYS_SUPPORTS_ZBOOT_UART16550
224 Support for the Texas Instruments AR7 System-on-a-Chip
225 family: TNETD7100, 7200 and 7300.
228 bool "Atheros AR231x/AR531x SoC support"
231 select DMA_NONCOHERENT
234 select SYS_HAS_CPU_MIPS32_R1
235 select SYS_SUPPORTS_BIG_ENDIAN
236 select SYS_SUPPORTS_32BIT_KERNEL
237 select SYS_HAS_EARLY_PRINTK
239 Support for Atheros AR231x and Atheros AR531x based boards
242 bool "Atheros AR71XX/AR724X/AR913X based boards"
243 select ARCH_HAS_RESET_CONTROLLER
247 select DMA_NONCOHERENT
252 select SYS_HAS_CPU_MIPS32_R2
253 select SYS_HAS_EARLY_PRINTK
254 select SYS_SUPPORTS_32BIT_KERNEL
255 select SYS_SUPPORTS_BIG_ENDIAN
256 select SYS_SUPPORTS_MIPS16
257 select SYS_SUPPORTS_ZBOOT_UART_PROM
259 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
261 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
264 bool "Broadcom Generic BMIPS kernel"
265 select ARCH_HAS_RESET_CONTROLLER
266 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
268 select NO_EXCEPT_FILL
274 select BCM6345_L1_IRQ
275 select BCM7038_L1_IRQ
276 select BCM7120_L2_IRQ
277 select BRCMSTB_L2_IRQ
279 select DMA_NONCOHERENT
280 select SYS_SUPPORTS_32BIT_KERNEL
281 select SYS_SUPPORTS_LITTLE_ENDIAN
282 select SYS_SUPPORTS_BIG_ENDIAN
283 select SYS_SUPPORTS_HIGHMEM
284 select SYS_HAS_CPU_BMIPS32_3300
285 select SYS_HAS_CPU_BMIPS4350
286 select SYS_HAS_CPU_BMIPS4380
287 select SYS_HAS_CPU_BMIPS5000
289 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
290 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
291 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
292 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
293 select HARDIRQS_SW_RESEND
295 select PCI_DRIVERS_GENERIC
298 Build a generic DT-based kernel image that boots on select
299 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
300 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
301 must be set appropriately for your board.
304 bool "Broadcom BCM47XX based boards"
308 select DMA_NONCOHERENT
311 select SYS_HAS_CPU_MIPS32_R1
312 select NO_EXCEPT_FILL
313 select SYS_SUPPORTS_32BIT_KERNEL
314 select SYS_SUPPORTS_LITTLE_ENDIAN
315 select SYS_SUPPORTS_MIPS16
316 select SYS_SUPPORTS_ZBOOT
317 select SYS_HAS_EARLY_PRINTK
318 select USE_GENERIC_EARLY_PRINTK_8250
320 select LEDS_GPIO_REGISTER
323 select BCM47XX_SSB if !BCM47XX_BCMA
325 Support for BCM47XX based boards
328 bool "Broadcom BCM63XX based boards"
333 select DMA_NONCOHERENT
335 select SYS_SUPPORTS_32BIT_KERNEL
336 select SYS_SUPPORTS_BIG_ENDIAN
337 select SYS_HAS_EARLY_PRINTK
338 select SYS_HAS_CPU_BMIPS32_3300
339 select SYS_HAS_CPU_BMIPS4350
340 select SYS_HAS_CPU_BMIPS4380
343 select MIPS_L1_CACHE_SHIFT_4
344 select HAVE_LEGACY_CLK
346 Support for BCM63XX based boards
353 select DMA_NONCOHERENT
359 select PCI_GT64XXX_PCI0
360 select SYS_HAS_CPU_NEVADA
361 select SYS_HAS_EARLY_PRINTK
362 select SYS_SUPPORTS_32BIT_KERNEL
363 select SYS_SUPPORTS_64BIT_KERNEL
364 select SYS_SUPPORTS_LITTLE_ENDIAN
365 select USE_GENERIC_EARLY_PRINTK_8250
367 config MACH_DECSTATION
371 select CEVT_R4K if CPU_R4X00
373 select CSRC_R4K if CPU_R4X00
374 select CPU_DADDI_WORKAROUNDS if 64BIT
375 select CPU_R4000_WORKAROUNDS if 64BIT
376 select CPU_R4400_WORKAROUNDS if 64BIT
377 select DMA_NONCOHERENT
380 select SYS_HAS_CPU_R3000
381 select SYS_HAS_CPU_R4X00
382 select SYS_SUPPORTS_32BIT_KERNEL
383 select SYS_SUPPORTS_64BIT_KERNEL
384 select SYS_SUPPORTS_LITTLE_ENDIAN
385 select SYS_SUPPORTS_128HZ
386 select SYS_SUPPORTS_256HZ
387 select SYS_SUPPORTS_1024HZ
388 select MIPS_L1_CACHE_SHIFT_4
390 This enables support for DEC's MIPS based workstations. For details
391 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
392 DECstation porting pages on <http://decstation.unix-ag.org/>.
394 If you have one of the following DECstation Models you definitely
395 want to choose R4xx0 for the CPU Type:
402 otherwise choose R3000.
405 bool "Jazz family of machines"
408 select ARCH_MIGHT_HAVE_PC_PARPORT
409 select ARCH_MIGHT_HAVE_PC_SERIO
413 select ARCH_MAY_HAVE_PC_FDC
416 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
417 select GENERIC_ISA_DMA
418 select HAVE_PCSPKR_PLATFORM
423 select SYS_HAS_CPU_R4X00
424 select SYS_SUPPORTS_32BIT_KERNEL
425 select SYS_SUPPORTS_64BIT_KERNEL
426 select SYS_SUPPORTS_100HZ
427 select SYS_SUPPORTS_LITTLE_ENDIAN
429 This a family of machines based on the MIPS R4030 chipset which was
430 used by several vendors to build RISC/os and Windows NT workstations.
431 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
432 Olivetti M700-10 workstations.
434 config MACH_INGENIC_SOC
435 bool "Ingenic SoC based machines"
438 select SYS_SUPPORTS_ZBOOT_UART16550
439 select CPU_SUPPORTS_CPUFREQ
440 select MIPS_EXTERNAL_TIMER
443 bool "Lantiq based platforms"
444 select DMA_NONCOHERENT
448 select NO_EXCEPT_FILL
449 select SYS_HAS_CPU_MIPS32_R1
450 select SYS_HAS_CPU_MIPS32_R2
451 select SYS_SUPPORTS_BIG_ENDIAN
452 select SYS_SUPPORTS_32BIT_KERNEL
453 select SYS_SUPPORTS_MIPS16
454 select SYS_SUPPORTS_MULTITHREADING
455 select SYS_SUPPORTS_VPE_LOADER
456 select SYS_HAS_EARLY_PRINTK
460 select HAVE_LEGACY_CLK
463 select PINCTRL_LANTIQ
464 select ARCH_HAS_RESET_CONTROLLER
465 select RESET_CONTROLLER
467 config MACH_LOONGSON32
468 bool "Loongson 32-bit family of machines"
469 select SYS_SUPPORTS_ZBOOT
471 This enables support for the Loongson-1 family of machines.
473 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
474 the Institute of Computing Technology (ICT), Chinese Academy of
477 config MACH_LOONGSON2EF
478 bool "Loongson-2E/F family of machines"
479 select SYS_SUPPORTS_ZBOOT
481 This enables the support of early Loongson-2E/F family of machines.
483 config MACH_LOONGSON64
484 bool "Loongson 64-bit family of machines"
485 select ARCH_SPARSEMEM_ENABLE
486 select ARCH_MIGHT_HAVE_PC_PARPORT
487 select ARCH_MIGHT_HAVE_PC_SERIO
488 select GENERIC_ISA_DMA_SUPPORT_BROKEN
498 select NO_EXCEPT_FILL
499 select NR_CPUS_DEFAULT_64
500 select USE_GENERIC_EARLY_PRINTK_8250
501 select PCI_DRIVERS_GENERIC
502 select SYS_HAS_CPU_LOONGSON64
503 select SYS_HAS_EARLY_PRINTK
504 select SYS_SUPPORTS_SMP
505 select SYS_SUPPORTS_HOTPLUG_CPU
506 select SYS_SUPPORTS_NUMA
507 select SYS_SUPPORTS_64BIT_KERNEL
508 select SYS_SUPPORTS_HIGHMEM
509 select SYS_SUPPORTS_LITTLE_ENDIAN
510 select SYS_SUPPORTS_ZBOOT
511 select SYS_SUPPORTS_RELOCATABLE
516 select PCI_HOST_GENERIC
517 select HAVE_ARCH_NODEDATA_EXTENSION if NUMA
519 This enables the support of Loongson-2/3 family of machines.
521 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
522 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
523 and Loongson-2F which will be removed), developed by the Institute
524 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
527 bool "MIPS Malta board"
528 select ARCH_MAY_HAVE_PC_FDC
529 select ARCH_MIGHT_HAVE_PC_PARPORT
530 select ARCH_MIGHT_HAVE_PC_SERIO
535 select CLKSRC_MIPS_GIC
538 select DMA_NONCOHERENT
539 select GENERIC_ISA_DMA
540 select HAVE_PCSPKR_PLATFORM
546 select MIPS_CPU_SCACHE
548 select MIPS_L1_CACHE_SHIFT_6
550 select PCI_GT64XXX_PCI0
553 select SYS_HAS_CPU_MIPS32_R1
554 select SYS_HAS_CPU_MIPS32_R2
555 select SYS_HAS_CPU_MIPS32_R3_5
556 select SYS_HAS_CPU_MIPS32_R5
557 select SYS_HAS_CPU_MIPS32_R6
558 select SYS_HAS_CPU_MIPS64_R1
559 select SYS_HAS_CPU_MIPS64_R2
560 select SYS_HAS_CPU_MIPS64_R6
561 select SYS_HAS_CPU_NEVADA
562 select SYS_HAS_CPU_RM7000
563 select SYS_SUPPORTS_32BIT_KERNEL
564 select SYS_SUPPORTS_64BIT_KERNEL
565 select SYS_SUPPORTS_BIG_ENDIAN
566 select SYS_SUPPORTS_HIGHMEM
567 select SYS_SUPPORTS_LITTLE_ENDIAN
568 select SYS_SUPPORTS_MICROMIPS
569 select SYS_SUPPORTS_MIPS16
570 select SYS_SUPPORTS_MIPS_CMP
571 select SYS_SUPPORTS_MIPS_CPS
572 select SYS_SUPPORTS_MULTITHREADING
573 select SYS_SUPPORTS_RELOCATABLE
574 select SYS_SUPPORTS_SMARTMIPS
575 select SYS_SUPPORTS_VPE_LOADER
576 select SYS_SUPPORTS_ZBOOT
578 select WAR_ICACHE_REFILLS
579 select ZONE_DMA32 if 64BIT
581 This enables support for the MIPS Technologies Malta evaluation
585 bool "Microchip PIC32 Family"
587 This enables support for the Microchip PIC32 family of platforms.
589 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
592 config MACH_NINTENDO64
593 bool "Nintendo 64 console"
596 select SYS_HAS_CPU_R4300
597 select SYS_SUPPORTS_BIG_ENDIAN
598 select SYS_SUPPORTS_ZBOOT
599 select SYS_SUPPORTS_32BIT_KERNEL
600 select SYS_SUPPORTS_64BIT_KERNEL
601 select DMA_NONCOHERENT
605 bool "Ralink based machines"
610 select DMA_NONCOHERENT
613 select SYS_HAS_CPU_MIPS32_R2
614 select SYS_SUPPORTS_32BIT_KERNEL
615 select SYS_SUPPORTS_LITTLE_ENDIAN
616 select SYS_SUPPORTS_MIPS16
617 select SYS_SUPPORTS_ZBOOT
618 select SYS_HAS_EARLY_PRINTK
619 select ARCH_HAS_RESET_CONTROLLER
620 select RESET_CONTROLLER
622 config MACH_REALTEK_RTL
623 bool "Realtek RTL838x/RTL839x based machines"
625 select DMA_NONCOHERENT
629 select SYS_HAS_CPU_MIPS32_R1
630 select SYS_HAS_CPU_MIPS32_R2
631 select SYS_SUPPORTS_BIG_ENDIAN
632 select SYS_SUPPORTS_32BIT_KERNEL
633 select SYS_SUPPORTS_MIPS16
634 select SYS_SUPPORTS_MULTITHREADING
635 select SYS_SUPPORTS_VPE_LOADER
641 bool "SGI IP22 (Indy/Indigo2)"
646 select ARCH_MIGHT_HAVE_PC_SERIO
650 select DEFAULT_SGI_PARTITION
651 select DMA_NONCOHERENT
655 select IP22_CPU_SCACHE
657 select GENERIC_ISA_DMA_SUPPORT_BROKEN
659 select SGI_HAS_INDYDOG
665 select SYS_HAS_CPU_R4X00
666 select SYS_HAS_CPU_R5000
667 select SYS_HAS_EARLY_PRINTK
668 select SYS_SUPPORTS_32BIT_KERNEL
669 select SYS_SUPPORTS_64BIT_KERNEL
670 select SYS_SUPPORTS_BIG_ENDIAN
671 select WAR_R4600_V1_INDEX_ICACHEOP
672 select WAR_R4600_V1_HIT_CACHEOP
673 select WAR_R4600_V2_HIT_CACHEOP
674 select MIPS_L1_CACHE_SHIFT_7
676 This are the SGI Indy, Challenge S and Indigo2, as well as certain
677 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
678 that runs on these, say Y here.
681 bool "SGI IP27 (Origin200/2000)"
682 select ARCH_HAS_PHYS_TO_DMA
683 select ARCH_SPARSEMEM_ENABLE
686 select ARC_CMDLINE_ONLY
688 select DEFAULT_SGI_PARTITION
690 select SYS_HAS_EARLY_PRINTK
693 select IRQ_DOMAIN_HIERARCHY
694 select NR_CPUS_DEFAULT_64
695 select PCI_DRIVERS_GENERIC
696 select PCI_XTALK_BRIDGE
697 select SYS_HAS_CPU_R10000
698 select SYS_SUPPORTS_64BIT_KERNEL
699 select SYS_SUPPORTS_BIG_ENDIAN
700 select SYS_SUPPORTS_NUMA
701 select SYS_SUPPORTS_SMP
702 select WAR_R10000_LLSC
703 select MIPS_L1_CACHE_SHIFT_7
705 select HAVE_ARCH_NODEDATA_EXTENSION
707 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
708 workstations. To compile a Linux kernel that runs on these, say Y
712 bool "SGI IP28 (Indigo2 R10k)"
717 select ARCH_MIGHT_HAVE_PC_SERIO
721 select DEFAULT_SGI_PARTITION
722 select DMA_NONCOHERENT
723 select GENERIC_ISA_DMA_SUPPORT_BROKEN
729 select SGI_HAS_INDYDOG
735 select SYS_HAS_CPU_R10000
736 select SYS_HAS_EARLY_PRINTK
737 select SYS_SUPPORTS_64BIT_KERNEL
738 select SYS_SUPPORTS_BIG_ENDIAN
739 select WAR_R10000_LLSC
740 select MIPS_L1_CACHE_SHIFT_7
742 This is the SGI Indigo2 with R10000 processor. To compile a Linux
743 kernel that runs on these, say Y here.
746 bool "SGI IP30 (Octane/Octane2)"
747 select ARCH_HAS_PHYS_TO_DMA
754 select SYNC_R4K if SMP
758 select IRQ_DOMAIN_HIERARCHY
759 select PCI_DRIVERS_GENERIC
760 select PCI_XTALK_BRIDGE
761 select SYS_HAS_EARLY_PRINTK
762 select SYS_HAS_CPU_R10000
763 select SYS_SUPPORTS_64BIT_KERNEL
764 select SYS_SUPPORTS_BIG_ENDIAN
765 select SYS_SUPPORTS_SMP
766 select WAR_R10000_LLSC
767 select MIPS_L1_CACHE_SHIFT_7
770 These are the SGI Octane and Octane2 graphics workstations. To
771 compile a Linux kernel that runs on these, say Y here.
777 select ARCH_HAS_PHYS_TO_DMA
783 select DMA_NONCOHERENT
786 select R5000_CPU_SCACHE
787 select RM7000_CPU_SCACHE
788 select SYS_HAS_CPU_R5000
789 select SYS_HAS_CPU_R10000 if BROKEN
790 select SYS_HAS_CPU_RM7000
791 select SYS_HAS_CPU_NEVADA
792 select SYS_SUPPORTS_64BIT_KERNEL
793 select SYS_SUPPORTS_BIG_ENDIAN
794 select WAR_ICACHE_REFILLS
796 If you want this kernel to run on SGI O2 workstation, say Y here.
799 bool "Sibyte BCM91120C-CRhine"
801 select SIBYTE_BCM1120
803 select SYS_HAS_CPU_SB1
804 select SYS_SUPPORTS_BIG_ENDIAN
805 select SYS_SUPPORTS_LITTLE_ENDIAN
808 bool "Sibyte BCM91120x-Carmel"
810 select SIBYTE_BCM1120
812 select SYS_HAS_CPU_SB1
813 select SYS_SUPPORTS_BIG_ENDIAN
814 select SYS_SUPPORTS_LITTLE_ENDIAN
817 bool "Sibyte BCM91125C-CRhone"
819 select SIBYTE_BCM1125
821 select SYS_HAS_CPU_SB1
822 select SYS_SUPPORTS_BIG_ENDIAN
823 select SYS_SUPPORTS_HIGHMEM
824 select SYS_SUPPORTS_LITTLE_ENDIAN
827 bool "Sibyte BCM91125E-Rhone"
829 select SIBYTE_BCM1125H
831 select SYS_HAS_CPU_SB1
832 select SYS_SUPPORTS_BIG_ENDIAN
833 select SYS_SUPPORTS_LITTLE_ENDIAN
836 bool "Sibyte BCM91250A-SWARM"
838 select HAVE_PATA_PLATFORM
841 select SYS_HAS_CPU_SB1
842 select SYS_SUPPORTS_BIG_ENDIAN
843 select SYS_SUPPORTS_HIGHMEM
844 select SYS_SUPPORTS_LITTLE_ENDIAN
845 select ZONE_DMA32 if 64BIT
846 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
848 config SIBYTE_LITTLESUR
849 bool "Sibyte BCM91250C2-LittleSur"
851 select HAVE_PATA_PLATFORM
854 select SYS_HAS_CPU_SB1
855 select SYS_SUPPORTS_BIG_ENDIAN
856 select SYS_SUPPORTS_HIGHMEM
857 select SYS_SUPPORTS_LITTLE_ENDIAN
858 select ZONE_DMA32 if 64BIT
860 config SIBYTE_SENTOSA
861 bool "Sibyte BCM91250E-Sentosa"
865 select SYS_HAS_CPU_SB1
866 select SYS_SUPPORTS_BIG_ENDIAN
867 select SYS_SUPPORTS_LITTLE_ENDIAN
868 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
871 bool "Sibyte BCM91480B-BigSur"
873 select NR_CPUS_DEFAULT_4
874 select SIBYTE_BCM1x80
876 select SYS_HAS_CPU_SB1
877 select SYS_SUPPORTS_BIG_ENDIAN
878 select SYS_SUPPORTS_HIGHMEM
879 select SYS_SUPPORTS_LITTLE_ENDIAN
880 select ZONE_DMA32 if 64BIT
881 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
884 bool "SNI RM200/300/400"
887 select FW_ARC if CPU_LITTLE_ENDIAN
888 select FW_ARC32 if CPU_LITTLE_ENDIAN
889 select FW_SNIPROM if CPU_BIG_ENDIAN
890 select ARCH_MAY_HAVE_PC_FDC
891 select ARCH_MIGHT_HAVE_PC_PARPORT
892 select ARCH_MIGHT_HAVE_PC_SERIO
896 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
897 select DMA_NONCOHERENT
898 select GENERIC_ISA_DMA
900 select HAVE_PCSPKR_PLATFORM
906 select MIPS_L1_CACHE_SHIFT_6
907 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
908 select SYS_HAS_CPU_R4X00
909 select SYS_HAS_CPU_R5000
910 select SYS_HAS_CPU_R10000
911 select R5000_CPU_SCACHE
912 select SYS_HAS_EARLY_PRINTK
913 select SYS_SUPPORTS_32BIT_KERNEL
914 select SYS_SUPPORTS_64BIT_KERNEL
915 select SYS_SUPPORTS_BIG_ENDIAN
916 select SYS_SUPPORTS_HIGHMEM
917 select SYS_SUPPORTS_LITTLE_ENDIAN
918 select WAR_R4600_V2_HIT_CACHEOP
920 The SNI RM200/300/400 are MIPS-based machines manufactured by
921 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
922 Technology and now in turn merged with Fujitsu. Say Y here to
923 support this machine type.
926 bool "Toshiba TX49 series based machines"
927 select WAR_TX49XX_ICACHE_INDEX_INV
929 config MIKROTIK_RB532
930 bool "Mikrotik RB532 boards"
933 select DMA_NONCOHERENT
936 select SYS_HAS_CPU_MIPS32_R1
937 select SYS_SUPPORTS_32BIT_KERNEL
938 select SYS_SUPPORTS_LITTLE_ENDIAN
942 select MIPS_L1_CACHE_SHIFT_4
944 Support the Mikrotik(tm) RouterBoard 532 series,
945 based on the IDT RC32434 SoC.
947 config CAVIUM_OCTEON_SOC
948 bool "Cavium Networks Octeon SoC based boards"
950 select ARCH_HAS_PHYS_TO_DMA
952 select PHYS_ADDR_T_64BIT
953 select SYS_SUPPORTS_64BIT_KERNEL
954 select SYS_SUPPORTS_BIG_ENDIAN
956 select EDAC_ATOMIC_SCRUB
957 select SYS_SUPPORTS_LITTLE_ENDIAN
958 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
959 select SYS_HAS_EARLY_PRINTK
960 select SYS_HAS_CPU_CAVIUM_OCTEON
962 select HAVE_PLAT_DELAY
963 select HAVE_PLAT_FW_INIT_CMDLINE
964 select HAVE_PLAT_MEMCPY
968 select ARCH_SPARSEMEM_ENABLE
969 select SYS_SUPPORTS_SMP
970 select NR_CPUS_DEFAULT_64
971 select MIPS_NR_CPU_NR_MAP_1024
974 select MTD_COMPLEX_MAPPINGS
976 select SYS_SUPPORTS_RELOCATABLE
978 This option supports all of the Octeon reference boards from Cavium
979 Networks. It builds a kernel that dynamically determines the Octeon
980 CPU type and supports all known board reference implementations.
981 Some of the supported boards are:
988 Say Y here for most Octeon reference boards.
992 source "arch/mips/alchemy/Kconfig"
993 source "arch/mips/ath25/Kconfig"
994 source "arch/mips/ath79/Kconfig"
995 source "arch/mips/bcm47xx/Kconfig"
996 source "arch/mips/bcm63xx/Kconfig"
997 source "arch/mips/bmips/Kconfig"
998 source "arch/mips/generic/Kconfig"
999 source "arch/mips/ingenic/Kconfig"
1000 source "arch/mips/jazz/Kconfig"
1001 source "arch/mips/lantiq/Kconfig"
1002 source "arch/mips/pic32/Kconfig"
1003 source "arch/mips/ralink/Kconfig"
1004 source "arch/mips/sgi-ip27/Kconfig"
1005 source "arch/mips/sibyte/Kconfig"
1006 source "arch/mips/txx9/Kconfig"
1007 source "arch/mips/cavium-octeon/Kconfig"
1008 source "arch/mips/loongson2ef/Kconfig"
1009 source "arch/mips/loongson32/Kconfig"
1010 source "arch/mips/loongson64/Kconfig"
1014 config GENERIC_HWEIGHT
1018 config GENERIC_CALIBRATE_DELAY
1022 config SCHED_OMIT_FRAME_POINTER
1027 # Select some configuration options automatically based on user selections.
1032 config ARCH_MAY_HAVE_PC_FDC
1063 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1069 config MIPS_CLOCK_VSYSCALL
1070 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1079 config ARCH_SUPPORTS_UPROBES
1082 config DMA_NONCOHERENT
1085 # MIPS allows mixing "slightly different" Cacheability and Coherency
1086 # Attribute bits. It is believed that the uncached access through
1087 # KSEG1 and the implementation specific "uncached accelerated" used
1088 # by pgprot_writcombine can be mixed, and the latter sometimes provides
1089 # significant advantages.
1091 select ARCH_HAS_DMA_WRITE_COMBINE
1092 select ARCH_HAS_DMA_PREP_COHERENT
1093 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1094 select ARCH_HAS_DMA_SET_UNCACHED
1095 select DMA_NONCOHERENT_MMAP
1096 select NEED_DMA_MAP_STATE
1098 config SYS_HAS_EARLY_PRINTK
1101 config SYS_SUPPORTS_HOTPLUG_CPU
1104 config MIPS_BONITO64
1113 config NO_IOPORT_MAP
1117 def_bool CPU_NO_LOAD_STORE_LR
1119 config GENERIC_ISA_DMA
1121 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1124 config GENERIC_ISA_DMA_SUPPORT_BROKEN
1126 select GENERIC_ISA_DMA
1128 config HAVE_PLAT_DELAY
1131 config HAVE_PLAT_FW_INIT_CMDLINE
1134 config HAVE_PLAT_MEMCPY
1140 config SYS_SUPPORTS_RELOCATABLE
1143 Selected if the platform supports relocating the kernel.
1144 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1145 to allow access to command line and entropy sources.
1148 # Endianness selection. Sufficiently obscure so many users don't know what to
1149 # answer,so we try hard to limit the available choices. Also the use of a
1150 # choice statement should be more obvious to the user.
1153 prompt "Endianness selection"
1155 Some MIPS machines can be configured for either little or big endian
1156 byte order. These modes require different kernels and a different
1157 Linux distribution. In general there is one preferred byteorder for a
1158 particular system but some systems are just as commonly used in the
1159 one or the other endianness.
1161 config CPU_BIG_ENDIAN
1163 depends on SYS_SUPPORTS_BIG_ENDIAN
1165 config CPU_LITTLE_ENDIAN
1166 bool "Little endian"
1167 depends on SYS_SUPPORTS_LITTLE_ENDIAN
1174 config SYS_SUPPORTS_APM_EMULATION
1177 config SYS_SUPPORTS_BIG_ENDIAN
1180 config SYS_SUPPORTS_LITTLE_ENDIAN
1183 config MIPS_HUGE_TLB_SUPPORT
1184 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1198 config PCI_GT64XXX_PCI0
1201 config PCI_XTALK_BRIDGE
1204 config NO_EXCEPT_FILL
1210 config SWAP_IO_SPACE
1213 config SGI_HAS_INDYDOG
1225 config SGI_HAS_ZILOG
1228 config SGI_HAS_I8042
1231 config DEFAULT_SGI_PARTITION
1243 config MIPS_L1_CACHE_SHIFT_4
1246 config MIPS_L1_CACHE_SHIFT_5
1249 config MIPS_L1_CACHE_SHIFT_6
1252 config MIPS_L1_CACHE_SHIFT_7
1255 config MIPS_L1_CACHE_SHIFT
1257 default "7" if MIPS_L1_CACHE_SHIFT_7
1258 default "6" if MIPS_L1_CACHE_SHIFT_6
1259 default "5" if MIPS_L1_CACHE_SHIFT_5
1260 default "4" if MIPS_L1_CACHE_SHIFT_4
1263 config ARC_CMDLINE_ONLY
1267 bool "ARC console support"
1268 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1282 menu "CPU selection"
1288 config CPU_LOONGSON64
1289 bool "Loongson 64-bit CPU"
1290 depends on SYS_HAS_CPU_LOONGSON64
1291 select ARCH_HAS_PHYS_TO_DMA
1293 select CPU_HAS_PREFETCH
1294 select CPU_SUPPORTS_64BIT_KERNEL
1295 select CPU_SUPPORTS_HIGHMEM
1296 select CPU_SUPPORTS_HUGEPAGES
1297 select CPU_SUPPORTS_MSA
1298 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1299 select CPU_MIPSR2_IRQ_VI
1300 select WEAK_ORDERING
1301 select WEAK_REORDERING_BEYOND_LLSC
1302 select MIPS_ASID_BITS_VARIABLE
1303 select MIPS_PGD_C0_CONTEXT
1304 select MIPS_L1_CACHE_SHIFT_6
1305 select MIPS_FP_SUPPORT
1310 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1311 cores implements the MIPS64R2 instruction set with many extensions,
1312 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1313 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1314 Loongson-2E/2F is not covered here and will be removed in future.
1316 config LOONGSON3_ENHANCEMENT
1317 bool "New Loongson-3 CPU Enhancements"
1319 depends on CPU_LOONGSON64
1321 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1322 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1323 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1324 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1325 Fast TLB refill support, etc.
1327 This option enable those enhancements which are not probed at run
1328 time. If you want a generic kernel to run on all Loongson 3 machines,
1329 please say 'N' here. If you want a high-performance kernel to run on
1330 new Loongson-3 machines only, please say 'Y' here.
1332 config CPU_LOONGSON3_WORKAROUNDS
1333 bool "Loongson-3 LLSC Workarounds"
1335 depends on CPU_LOONGSON64
1337 Loongson-3 processors have the llsc issues which require workarounds.
1338 Without workarounds the system may hang unexpectedly.
1340 Say Y, unless you know what you are doing.
1342 config CPU_LOONGSON3_CPUCFG_EMULATION
1343 bool "Emulate the CPUCFG instruction on older Loongson cores"
1345 depends on CPU_LOONGSON64
1347 Loongson-3A R4 and newer have the CPUCFG instruction available for
1348 userland to query CPU capabilities, much like CPUID on x86. This
1349 option provides emulation of the instruction on older Loongson
1350 cores, back to Loongson-3A1000.
1352 If unsure, please say Y.
1354 config CPU_LOONGSON2E
1356 depends on SYS_HAS_CPU_LOONGSON2E
1357 select CPU_LOONGSON2EF
1359 The Loongson 2E processor implements the MIPS III instruction set
1360 with many extensions.
1362 It has an internal FPGA northbridge, which is compatible to
1365 config CPU_LOONGSON2F
1367 depends on SYS_HAS_CPU_LOONGSON2F
1368 select CPU_LOONGSON2EF
1371 The Loongson 2F processor implements the MIPS III instruction set
1372 with many extensions.
1374 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1375 have a similar programming interface with FPGA northbridge used in
1378 config CPU_LOONGSON1B
1380 depends on SYS_HAS_CPU_LOONGSON1B
1381 select CPU_LOONGSON32
1382 select LEDS_GPIO_REGISTER
1384 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1385 Release 1 instruction set and part of the MIPS32 Release 2
1388 config CPU_LOONGSON1C
1390 depends on SYS_HAS_CPU_LOONGSON1C
1391 select CPU_LOONGSON32
1392 select LEDS_GPIO_REGISTER
1394 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1395 Release 1 instruction set and part of the MIPS32 Release 2
1398 config CPU_MIPS32_R1
1399 bool "MIPS32 Release 1"
1400 depends on SYS_HAS_CPU_MIPS32_R1
1401 select CPU_HAS_PREFETCH
1402 select CPU_SUPPORTS_32BIT_KERNEL
1403 select CPU_SUPPORTS_HIGHMEM
1405 Choose this option to build a kernel for release 1 or later of the
1406 MIPS32 architecture. Most modern embedded systems with a 32-bit
1407 MIPS processor are based on a MIPS32 processor. If you know the
1408 specific type of processor in your system, choose those that one
1409 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1410 Release 2 of the MIPS32 architecture is available since several
1411 years so chances are you even have a MIPS32 Release 2 processor
1412 in which case you should choose CPU_MIPS32_R2 instead for better
1415 config CPU_MIPS32_R2
1416 bool "MIPS32 Release 2"
1417 depends on SYS_HAS_CPU_MIPS32_R2
1418 select CPU_HAS_PREFETCH
1419 select CPU_SUPPORTS_32BIT_KERNEL
1420 select CPU_SUPPORTS_HIGHMEM
1421 select CPU_SUPPORTS_MSA
1424 Choose this option to build a kernel for release 2 or later of the
1425 MIPS32 architecture. Most modern embedded systems with a 32-bit
1426 MIPS processor are based on a MIPS32 processor. If you know the
1427 specific type of processor in your system, choose those that one
1428 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1430 config CPU_MIPS32_R5
1431 bool "MIPS32 Release 5"
1432 depends on SYS_HAS_CPU_MIPS32_R5
1433 select CPU_HAS_PREFETCH
1434 select CPU_SUPPORTS_32BIT_KERNEL
1435 select CPU_SUPPORTS_HIGHMEM
1436 select CPU_SUPPORTS_MSA
1438 select MIPS_O32_FP64_SUPPORT
1440 Choose this option to build a kernel for release 5 or later of the
1441 MIPS32 architecture. New MIPS processors, starting with the Warrior
1442 family, are based on a MIPS32r5 processor. If you own an older
1443 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1445 config CPU_MIPS32_R6
1446 bool "MIPS32 Release 6"
1447 depends on SYS_HAS_CPU_MIPS32_R6
1448 select CPU_HAS_PREFETCH
1449 select CPU_NO_LOAD_STORE_LR
1450 select CPU_SUPPORTS_32BIT_KERNEL
1451 select CPU_SUPPORTS_HIGHMEM
1452 select CPU_SUPPORTS_MSA
1454 select MIPS_O32_FP64_SUPPORT
1456 Choose this option to build a kernel for release 6 or later of the
1457 MIPS32 architecture. New MIPS processors, starting with the Warrior
1458 family, are based on a MIPS32r6 processor. If you own an older
1459 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1461 config CPU_MIPS64_R1
1462 bool "MIPS64 Release 1"
1463 depends on SYS_HAS_CPU_MIPS64_R1
1464 select CPU_HAS_PREFETCH
1465 select CPU_SUPPORTS_32BIT_KERNEL
1466 select CPU_SUPPORTS_64BIT_KERNEL
1467 select CPU_SUPPORTS_HIGHMEM
1468 select CPU_SUPPORTS_HUGEPAGES
1470 Choose this option to build a kernel for release 1 or later of the
1471 MIPS64 architecture. Many modern embedded systems with a 64-bit
1472 MIPS processor are based on a MIPS64 processor. If you know the
1473 specific type of processor in your system, choose those that one
1474 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1475 Release 2 of the MIPS64 architecture is available since several
1476 years so chances are you even have a MIPS64 Release 2 processor
1477 in which case you should choose CPU_MIPS64_R2 instead for better
1480 config CPU_MIPS64_R2
1481 bool "MIPS64 Release 2"
1482 depends on SYS_HAS_CPU_MIPS64_R2
1483 select CPU_HAS_PREFETCH
1484 select CPU_SUPPORTS_32BIT_KERNEL
1485 select CPU_SUPPORTS_64BIT_KERNEL
1486 select CPU_SUPPORTS_HIGHMEM
1487 select CPU_SUPPORTS_HUGEPAGES
1488 select CPU_SUPPORTS_MSA
1491 Choose this option to build a kernel for release 2 or later of the
1492 MIPS64 architecture. Many modern embedded systems with a 64-bit
1493 MIPS processor are based on a MIPS64 processor. If you know the
1494 specific type of processor in your system, choose those that one
1495 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1497 config CPU_MIPS64_R5
1498 bool "MIPS64 Release 5"
1499 depends on SYS_HAS_CPU_MIPS64_R5
1500 select CPU_HAS_PREFETCH
1501 select CPU_SUPPORTS_32BIT_KERNEL
1502 select CPU_SUPPORTS_64BIT_KERNEL
1503 select CPU_SUPPORTS_HIGHMEM
1504 select CPU_SUPPORTS_HUGEPAGES
1505 select CPU_SUPPORTS_MSA
1506 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1509 Choose this option to build a kernel for release 5 or later of the
1510 MIPS64 architecture. This is a intermediate MIPS architecture
1511 release partly implementing release 6 features. Though there is no
1512 any hardware known to be based on this release.
1514 config CPU_MIPS64_R6
1515 bool "MIPS64 Release 6"
1516 depends on SYS_HAS_CPU_MIPS64_R6
1517 select CPU_HAS_PREFETCH
1518 select CPU_NO_LOAD_STORE_LR
1519 select CPU_SUPPORTS_32BIT_KERNEL
1520 select CPU_SUPPORTS_64BIT_KERNEL
1521 select CPU_SUPPORTS_HIGHMEM
1522 select CPU_SUPPORTS_HUGEPAGES
1523 select CPU_SUPPORTS_MSA
1524 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1527 Choose this option to build a kernel for release 6 or later of the
1528 MIPS64 architecture. New MIPS processors, starting with the Warrior
1529 family, are based on a MIPS64r6 processor. If you own an older
1530 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1533 bool "MIPS Warrior P5600"
1534 depends on SYS_HAS_CPU_P5600
1535 select CPU_HAS_PREFETCH
1536 select CPU_SUPPORTS_32BIT_KERNEL
1537 select CPU_SUPPORTS_HIGHMEM
1538 select CPU_SUPPORTS_MSA
1539 select CPU_SUPPORTS_CPUFREQ
1540 select CPU_MIPSR2_IRQ_VI
1541 select CPU_MIPSR2_IRQ_EI
1543 select MIPS_O32_FP64_SUPPORT
1545 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1546 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1547 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1548 level features like up to six P5600 calculation cores, CM2 with L2
1549 cache, IOCU/IOMMU (though might be unused depending on the system-
1550 specific IP core configuration), GIC, CPC, virtualisation module,
1555 depends on SYS_HAS_CPU_R3000
1558 select CPU_SUPPORTS_32BIT_KERNEL
1559 select CPU_SUPPORTS_HIGHMEM
1561 Please make sure to pick the right CPU type. Linux/MIPS is not
1562 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1563 *not* work on R4000 machines and vice versa. However, since most
1564 of the supported machines have an R4000 (or similar) CPU, R4x00
1565 might be a safe bet. If the resulting kernel does not work,
1566 try to recompile with R3000.
1570 depends on SYS_HAS_CPU_R4300
1571 select CPU_SUPPORTS_32BIT_KERNEL
1572 select CPU_SUPPORTS_64BIT_KERNEL
1574 MIPS Technologies R4300-series processors.
1578 depends on SYS_HAS_CPU_R4X00
1579 select CPU_SUPPORTS_32BIT_KERNEL
1580 select CPU_SUPPORTS_64BIT_KERNEL
1581 select CPU_SUPPORTS_HUGEPAGES
1583 MIPS Technologies R4000-series processors other than 4300, including
1584 the R4000, R4400, R4600, and 4700.
1588 depends on SYS_HAS_CPU_TX49XX
1589 select CPU_HAS_PREFETCH
1590 select CPU_SUPPORTS_32BIT_KERNEL
1591 select CPU_SUPPORTS_64BIT_KERNEL
1592 select CPU_SUPPORTS_HUGEPAGES
1596 depends on SYS_HAS_CPU_R5000
1597 select CPU_SUPPORTS_32BIT_KERNEL
1598 select CPU_SUPPORTS_64BIT_KERNEL
1599 select CPU_SUPPORTS_HUGEPAGES
1601 MIPS Technologies R5000-series processors other than the Nevada.
1605 depends on SYS_HAS_CPU_R5500
1606 select CPU_SUPPORTS_32BIT_KERNEL
1607 select CPU_SUPPORTS_64BIT_KERNEL
1608 select CPU_SUPPORTS_HUGEPAGES
1610 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1615 depends on SYS_HAS_CPU_NEVADA
1616 select CPU_SUPPORTS_32BIT_KERNEL
1617 select CPU_SUPPORTS_64BIT_KERNEL
1618 select CPU_SUPPORTS_HUGEPAGES
1620 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1624 depends on SYS_HAS_CPU_R10000
1625 select CPU_HAS_PREFETCH
1626 select CPU_SUPPORTS_32BIT_KERNEL
1627 select CPU_SUPPORTS_64BIT_KERNEL
1628 select CPU_SUPPORTS_HIGHMEM
1629 select CPU_SUPPORTS_HUGEPAGES
1631 MIPS Technologies R10000-series processors.
1635 depends on SYS_HAS_CPU_RM7000
1636 select CPU_HAS_PREFETCH
1637 select CPU_SUPPORTS_32BIT_KERNEL
1638 select CPU_SUPPORTS_64BIT_KERNEL
1639 select CPU_SUPPORTS_HIGHMEM
1640 select CPU_SUPPORTS_HUGEPAGES
1644 depends on SYS_HAS_CPU_SB1
1645 select CPU_SUPPORTS_32BIT_KERNEL
1646 select CPU_SUPPORTS_64BIT_KERNEL
1647 select CPU_SUPPORTS_HIGHMEM
1648 select CPU_SUPPORTS_HUGEPAGES
1649 select WEAK_ORDERING
1651 config CPU_CAVIUM_OCTEON
1652 bool "Cavium Octeon processor"
1653 depends on SYS_HAS_CPU_CAVIUM_OCTEON
1654 select CPU_HAS_PREFETCH
1655 select CPU_SUPPORTS_64BIT_KERNEL
1656 select WEAK_ORDERING
1657 select CPU_SUPPORTS_HIGHMEM
1658 select CPU_SUPPORTS_HUGEPAGES
1659 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1660 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1661 select MIPS_L1_CACHE_SHIFT_7
1664 The Cavium Octeon processor is a highly integrated chip containing
1665 many ethernet hardware widgets for networking tasks. The processor
1666 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1667 Full details can be found at http://www.caviumnetworks.com.
1670 bool "Broadcom BMIPS"
1671 depends on SYS_HAS_CPU_BMIPS
1673 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1674 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1675 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1676 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1677 select CPU_SUPPORTS_32BIT_KERNEL
1678 select DMA_NONCOHERENT
1680 select SWAP_IO_SPACE
1681 select WEAK_ORDERING
1682 select CPU_SUPPORTS_HIGHMEM
1683 select CPU_HAS_PREFETCH
1684 select CPU_SUPPORTS_CPUFREQ
1685 select MIPS_EXTERNAL_TIMER
1686 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
1688 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1692 config CPU_MIPS32_3_5_FEATURES
1693 bool "MIPS32 Release 3.5 Features"
1694 depends on SYS_HAS_CPU_MIPS32_R3_5
1695 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1698 Choose this option to build a kernel for release 2 or later of the
1699 MIPS32 architecture including features from the 3.5 release such as
1700 support for Enhanced Virtual Addressing (EVA).
1702 config CPU_MIPS32_3_5_EVA
1703 bool "Enhanced Virtual Addressing (EVA)"
1704 depends on CPU_MIPS32_3_5_FEATURES
1708 Choose this option if you want to enable the Enhanced Virtual
1709 Addressing (EVA) on your MIPS32 core (such as proAptiv).
1710 One of its primary benefits is an increase in the maximum size
1711 of lowmem (up to 3GB). If unsure, say 'N' here.
1713 config CPU_MIPS32_R5_FEATURES
1714 bool "MIPS32 Release 5 Features"
1715 depends on SYS_HAS_CPU_MIPS32_R5
1716 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1718 Choose this option to build a kernel for release 2 or later of the
1719 MIPS32 architecture including features from release 5 such as
1720 support for Extended Physical Addressing (XPA).
1722 config CPU_MIPS32_R5_XPA
1723 bool "Extended Physical Addressing (XPA)"
1724 depends on CPU_MIPS32_R5_FEATURES
1726 depends on !PAGE_SIZE_4KB
1727 depends on SYS_SUPPORTS_HIGHMEM
1730 select PHYS_ADDR_T_64BIT
1733 Choose this option if you want to enable the Extended Physical
1734 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1735 benefit is to increase physical addressing equal to or greater
1736 than 40 bits. Note that this has the side effect of turning on
1737 64-bit addressing which in turn makes the PTEs 64-bit in size.
1738 If unsure, say 'N' here.
1741 config CPU_NOP_WORKAROUNDS
1744 config CPU_JUMP_WORKAROUNDS
1747 config CPU_LOONGSON2F_WORKAROUNDS
1748 bool "Loongson 2F Workarounds"
1750 select CPU_NOP_WORKAROUNDS
1751 select CPU_JUMP_WORKAROUNDS
1753 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1754 require workarounds. Without workarounds the system may hang
1755 unexpectedly. For more information please refer to the gas
1756 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1758 Loongson 2F03 and later have fixed these issues and no workarounds
1759 are needed. The workarounds have no significant side effect on them
1760 but may decrease the performance of the system so this option should
1761 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1764 If unsure, please say Y.
1765 endif # CPU_LOONGSON2F
1767 config SYS_SUPPORTS_ZBOOT
1769 select HAVE_KERNEL_GZIP
1770 select HAVE_KERNEL_BZIP2
1771 select HAVE_KERNEL_LZ4
1772 select HAVE_KERNEL_LZMA
1773 select HAVE_KERNEL_LZO
1774 select HAVE_KERNEL_XZ
1775 select HAVE_KERNEL_ZSTD
1777 config SYS_SUPPORTS_ZBOOT_UART16550
1779 select SYS_SUPPORTS_ZBOOT
1781 config SYS_SUPPORTS_ZBOOT_UART_PROM
1783 select SYS_SUPPORTS_ZBOOT
1785 config CPU_LOONGSON2EF
1787 select CPU_SUPPORTS_32BIT_KERNEL
1788 select CPU_SUPPORTS_64BIT_KERNEL
1789 select CPU_SUPPORTS_HIGHMEM
1790 select CPU_SUPPORTS_HUGEPAGES
1791 select ARCH_HAS_PHYS_TO_DMA
1793 config CPU_LOONGSON32
1797 select CPU_HAS_PREFETCH
1798 select CPU_SUPPORTS_32BIT_KERNEL
1799 select CPU_SUPPORTS_HIGHMEM
1800 select CPU_SUPPORTS_CPUFREQ
1802 config CPU_BMIPS32_3300
1803 select SMP_UP if SMP
1806 config CPU_BMIPS4350
1808 select SYS_SUPPORTS_SMP
1809 select SYS_SUPPORTS_HOTPLUG_CPU
1811 config CPU_BMIPS4380
1813 select MIPS_L1_CACHE_SHIFT_6
1814 select SYS_SUPPORTS_SMP
1815 select SYS_SUPPORTS_HOTPLUG_CPU
1818 config CPU_BMIPS5000
1820 select MIPS_CPU_SCACHE
1821 select MIPS_L1_CACHE_SHIFT_7
1822 select SYS_SUPPORTS_SMP
1823 select SYS_SUPPORTS_HOTPLUG_CPU
1826 config SYS_HAS_CPU_LOONGSON64
1828 select CPU_SUPPORTS_CPUFREQ
1831 config SYS_HAS_CPU_LOONGSON2E
1834 config SYS_HAS_CPU_LOONGSON2F
1836 select CPU_SUPPORTS_CPUFREQ
1837 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1839 config SYS_HAS_CPU_LOONGSON1B
1842 config SYS_HAS_CPU_LOONGSON1C
1845 config SYS_HAS_CPU_MIPS32_R1
1848 config SYS_HAS_CPU_MIPS32_R2
1851 config SYS_HAS_CPU_MIPS32_R3_5
1854 config SYS_HAS_CPU_MIPS32_R5
1856 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1858 config SYS_HAS_CPU_MIPS32_R6
1860 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1862 config SYS_HAS_CPU_MIPS64_R1
1865 config SYS_HAS_CPU_MIPS64_R2
1868 config SYS_HAS_CPU_MIPS64_R5
1870 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1872 config SYS_HAS_CPU_MIPS64_R6
1874 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1876 config SYS_HAS_CPU_P5600
1878 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1880 config SYS_HAS_CPU_R3000
1883 config SYS_HAS_CPU_R4300
1886 config SYS_HAS_CPU_R4X00
1889 config SYS_HAS_CPU_TX49XX
1892 config SYS_HAS_CPU_R5000
1895 config SYS_HAS_CPU_R5500
1898 config SYS_HAS_CPU_NEVADA
1901 config SYS_HAS_CPU_R10000
1903 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1905 config SYS_HAS_CPU_RM7000
1908 config SYS_HAS_CPU_SB1
1911 config SYS_HAS_CPU_CAVIUM_OCTEON
1914 config SYS_HAS_CPU_BMIPS
1917 config SYS_HAS_CPU_BMIPS32_3300
1919 select SYS_HAS_CPU_BMIPS
1921 config SYS_HAS_CPU_BMIPS4350
1923 select SYS_HAS_CPU_BMIPS
1925 config SYS_HAS_CPU_BMIPS4380
1927 select SYS_HAS_CPU_BMIPS
1929 config SYS_HAS_CPU_BMIPS5000
1931 select SYS_HAS_CPU_BMIPS
1932 select ARCH_HAS_SYNC_DMA_FOR_CPU
1935 # CPU may reorder R->R, R->W, W->R, W->W
1936 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
1938 config WEAK_ORDERING
1942 # CPU may reorder reads and writes beyond LL/SC
1943 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
1945 config WEAK_REORDERING_BEYOND_LLSC
1950 # These two indicate any level of the MIPS32 and MIPS64 architecture
1954 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
1955 CPU_MIPS32_R6 || CPU_P5600
1959 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
1960 CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
1963 # These indicate the revision of the architecture
1967 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
1971 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
1973 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
1978 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
1980 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
1985 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
1987 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
1988 select HAVE_ARCH_BITREVERSE
1989 select MIPS_ASID_BITS_VARIABLE
1990 select MIPS_CRC_SUPPORT
1993 config TARGET_ISA_REV
1995 default 1 if CPU_MIPSR1
1996 default 2 if CPU_MIPSR2
1997 default 5 if CPU_MIPSR5
1998 default 6 if CPU_MIPSR6
2001 Reflects the ISA revision being targeted by the kernel build. This
2002 is effectively the Kconfig equivalent of MIPS_ISA_REV.
2010 config SYS_SUPPORTS_32BIT_KERNEL
2012 config SYS_SUPPORTS_64BIT_KERNEL
2014 config CPU_SUPPORTS_32BIT_KERNEL
2016 config CPU_SUPPORTS_64BIT_KERNEL
2018 config CPU_SUPPORTS_CPUFREQ
2020 config CPU_SUPPORTS_ADDRWINCFG
2022 config CPU_SUPPORTS_HUGEPAGES
2024 depends on !(32BIT && (PHYS_ADDR_T_64BIT || EVA))
2025 config MIPS_PGD_C0_CONTEXT
2028 default y if (CPU_MIPSR2 || CPU_MIPSR6)
2031 # Set to y for ptrace access to watch registers.
2033 config HARDWARE_WATCHPOINTS
2035 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
2040 prompt "Kernel code model"
2042 You should only select this option if you have a workload that
2043 actually benefits from 64-bit processing or if your machine has
2044 large memory. You will only be presented a single option in this
2045 menu if your system does not support both 32-bit and 64-bit kernels.
2048 bool "32-bit kernel"
2049 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2052 Select this option if you want to build a 32-bit kernel.
2055 bool "64-bit kernel"
2056 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2058 Select this option if you want to build a 64-bit kernel.
2062 config MIPS_VA_BITS_48
2063 bool "48 bits virtual memory"
2066 Support a maximum at least 48 bits of application virtual
2067 memory. Default is 40 bits or less, depending on the CPU.
2068 For page sizes 16k and above, this option results in a small
2069 memory overhead for page tables. For 4k page size, a fourth
2070 level of page tables is added which imposes both a memory
2071 overhead as well as slower TLB fault handling.
2075 config ZBOOT_LOAD_ADDRESS
2076 hex "Compressed kernel load address"
2077 default 0xffffffff80400000 if BCM47XX
2079 depends on SYS_SUPPORTS_ZBOOT
2081 The address to load compressed kernel, aka vmlinuz.
2083 This is only used if non-zero.
2086 prompt "Kernel page size"
2087 default PAGE_SIZE_4KB
2089 config PAGE_SIZE_4KB
2091 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
2093 This option select the standard 4kB Linux page size. On some
2094 R3000-family processors this is the only available page size. Using
2095 4kB page size will minimize memory consumption and is therefore
2096 recommended for low memory systems.
2098 config PAGE_SIZE_8KB
2100 depends on CPU_CAVIUM_OCTEON
2101 depends on !MIPS_VA_BITS_48
2103 Using 8kB page size will result in higher performance kernel at
2104 the price of higher memory consumption. This option is available
2105 only on cnMIPS processors. Note that you will need a suitable Linux
2106 distribution to support this.
2108 config PAGE_SIZE_16KB
2110 depends on !CPU_R3000
2112 Using 16kB page size will result in higher performance kernel at
2113 the price of higher memory consumption. This option is available on
2114 all non-R3000 family processors. Note that you will need a suitable
2115 Linux distribution to support this.
2117 config PAGE_SIZE_32KB
2119 depends on CPU_CAVIUM_OCTEON
2120 depends on !MIPS_VA_BITS_48
2122 Using 32kB page size will result in higher performance kernel at
2123 the price of higher memory consumption. This option is available
2124 only on cnMIPS cores. Note that you will need a suitable Linux
2125 distribution to support this.
2127 config PAGE_SIZE_64KB
2129 depends on !CPU_R3000
2131 Using 64kB page size will result in higher performance kernel at
2132 the price of higher memory consumption. This option is available on
2133 all non-R3000 family processor. Not that at the time of this
2134 writing this option is still high experimental.
2138 config ARCH_FORCE_MAX_ORDER
2139 int "Maximum zone order"
2140 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2141 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2142 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2143 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2144 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2145 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2149 The kernel memory allocator divides physically contiguous memory
2150 blocks into "zones", where each zone is a power of two number of
2151 pages. This option selects the largest power of two that the kernel
2152 keeps in the memory allocator. If you need to allocate very large
2153 blocks of physically contiguous memory, then you may need to
2154 increase this value.
2156 This config option is actually maximum order plus one. For example,
2157 a value of 11 means that the largest free memory block is 2^10 pages.
2159 The page size is not necessarily 4KB. Keep this in mind
2160 when choosing a value for this option.
2165 config IP22_CPU_SCACHE
2170 # Support for a MIPS32 / MIPS64 style S-caches
2172 config MIPS_CPU_SCACHE
2176 config R5000_CPU_SCACHE
2180 config RM7000_CPU_SCACHE
2184 config SIBYTE_DMA_PAGEOPS
2185 bool "Use DMA to clear/copy pages"
2188 Instead of using the CPU to zero and copy pages, use a Data Mover
2189 channel. These DMA channels are otherwise unused by the standard
2190 SiByte Linux port. Seems to give a small performance benefit.
2192 config CPU_HAS_PREFETCH
2195 config CPU_GENERIC_DUMP_TLB
2197 default y if !CPU_R3000
2199 config MIPS_FP_SUPPORT
2200 bool "Floating Point support" if EXPERT
2203 Select y to include support for floating point in the kernel
2204 including initialization of FPU hardware, FP context save & restore
2205 and emulation of an FPU where necessary. Without this support any
2206 userland program attempting to use floating point instructions will
2209 If you know that your userland will not attempt to use floating point
2210 instructions then you can say n here to shrink the kernel a little.
2214 config CPU_R2300_FPU
2216 depends on MIPS_FP_SUPPORT
2217 default y if CPU_R3000
2224 depends on MIPS_FP_SUPPORT
2225 default y if !CPU_R2300_FPU
2227 config CPU_R4K_CACHE_TLB
2229 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2232 bool "MIPS MT SMP support (1 TC on each available VPE)"
2234 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
2235 select CPU_MIPSR2_IRQ_VI
2236 select CPU_MIPSR2_IRQ_EI
2241 select SYS_SUPPORTS_SMP
2242 select SYS_SUPPORTS_SCHED_SMT
2243 select MIPS_PERF_SHARED_TC_COUNTERS
2245 This is a kernel model which is known as SMVP. This is supported
2246 on cores with the MT ASE and uses the available VPEs to implement
2247 virtual processors which supports SMP. This is equivalent to the
2248 Intel Hyperthreading feature. For further information go to
2249 <http://www.imgtec.com/mips/mips-multithreading.asp>.
2255 bool "SMT (multithreading) scheduler support"
2256 depends on SYS_SUPPORTS_SCHED_SMT
2259 SMT scheduler support improves the CPU scheduler's decision making
2260 when dealing with MIPS MT enabled cores at a cost of slightly
2261 increased overhead in some places. If unsure say N here.
2263 config SYS_SUPPORTS_SCHED_SMT
2266 config SYS_SUPPORTS_MULTITHREADING
2269 config MIPS_MT_FPAFF
2270 bool "Dynamic FPU affinity for FP-intensive threads"
2272 depends on MIPS_MT_SMP
2274 config MIPSR2_TO_R6_EMULATOR
2275 bool "MIPS R2-to-R6 emulator"
2276 depends on CPU_MIPSR6
2277 depends on MIPS_FP_SUPPORT
2280 Choose this option if you want to run non-R6 MIPS userland code.
2281 Even if you say 'Y' here, the emulator will still be disabled by
2282 default. You can enable it using the 'mipsr2emu' kernel option.
2283 The only reason this is a build-time option is to save ~14K from the
2286 config SYS_SUPPORTS_VPE_LOADER
2288 depends on SYS_SUPPORTS_MULTITHREADING
2290 Indicates that the platform supports the VPE loader, and provides
2293 config MIPS_VPE_LOADER
2294 bool "VPE loader support."
2295 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2296 select CPU_MIPSR2_IRQ_VI
2297 select CPU_MIPSR2_IRQ_EI
2300 Includes a loader for loading an elf relocatable object
2301 onto another VPE and running it.
2303 config MIPS_VPE_LOADER_CMP
2306 depends on MIPS_VPE_LOADER && MIPS_CMP
2308 config MIPS_VPE_LOADER_MT
2311 depends on MIPS_VPE_LOADER && !MIPS_CMP
2313 config MIPS_VPE_LOADER_TOM
2314 bool "Load VPE program into memory hidden from linux"
2315 depends on MIPS_VPE_LOADER
2318 The loader can use memory that is present but has been hidden from
2319 Linux using the kernel command line option "mem=xxMB". It's up to
2320 you to ensure the amount you put in the option and the space your
2321 program requires is less or equal to the amount physically present.
2323 config MIPS_VPE_APSP_API
2324 bool "Enable support for AP/SP API (RTLX)"
2325 depends on MIPS_VPE_LOADER
2327 config MIPS_VPE_APSP_API_CMP
2330 depends on MIPS_VPE_APSP_API && MIPS_CMP
2332 config MIPS_VPE_APSP_API_MT
2335 depends on MIPS_VPE_APSP_API && !MIPS_CMP
2338 bool "MIPS CMP framework support (DEPRECATED)"
2339 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2342 select SYS_SUPPORTS_SMP
2343 select WEAK_ORDERING
2346 Select this if you are using a bootloader which implements the "CMP
2347 framework" protocol (ie. YAMON) and want your kernel to make use of
2348 its ability to start secondary CPUs.
2350 Unless you have a specific need, you should use CONFIG_MIPS_CPS
2354 bool "MIPS Coherent Processing System support"
2355 depends on SYS_SUPPORTS_MIPS_CPS
2357 select MIPS_CPS_PM if HOTPLUG_CPU
2359 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2360 select SYS_SUPPORTS_HOTPLUG_CPU
2361 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2362 select SYS_SUPPORTS_SMP
2363 select WEAK_ORDERING
2364 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
2366 Select this if you wish to run an SMP kernel across multiple cores
2367 within a MIPS Coherent Processing System. When this option is
2368 enabled the kernel will probe for other cores and boot them with
2369 no external assistance. It is safe to enable this when hardware
2370 support is unavailable.
2383 config SB1_PASS_2_WORKAROUNDS
2385 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2388 config SB1_PASS_2_1_WORKAROUNDS
2390 depends on CPU_SB1 && CPU_SB1_PASS_2
2394 prompt "SmartMIPS or microMIPS ASE support"
2396 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2399 Select this if you want neither microMIPS nor SmartMIPS support
2401 config CPU_HAS_SMARTMIPS
2402 depends on SYS_SUPPORTS_SMARTMIPS
2405 SmartMIPS is a extension of the MIPS32 architecture aimed at
2406 increased security at both hardware and software level for
2407 smartcards. Enabling this option will allow proper use of the
2408 SmartMIPS instructions by Linux applications. However a kernel with
2409 this option will not work on a MIPS core without SmartMIPS core. If
2410 you don't know you probably don't have SmartMIPS and should say N
2413 config CPU_MICROMIPS
2414 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2417 When this option is enabled the kernel will be built using the
2423 bool "Support for the MIPS SIMD Architecture"
2424 depends on CPU_SUPPORTS_MSA
2425 depends on MIPS_FP_SUPPORT
2426 depends on 64BIT || MIPS_O32_FP64_SUPPORT
2428 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2429 and a set of SIMD instructions to operate on them. When this option
2430 is enabled the kernel will support allocating & switching MSA
2431 vector register contexts. If you know that your kernel will only be
2432 running on CPUs which do not support MSA or that your userland will
2433 not be making use of it then you may wish to say N here to reduce
2434 the size & complexity of your kernel.
2445 depends on !CPU_DIEI_BROKEN
2448 config CPU_DIEI_BROKEN
2454 config CPU_NO_LOAD_STORE_LR
2457 CPU lacks support for unaligned load and store instructions:
2458 LWL, LWR, SWL, SWR (Load/store word left/right).
2459 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2463 # Vectored interrupt mode is an R2 feature
2465 config CPU_MIPSR2_IRQ_VI
2469 # Extended interrupt mode is an R2 feature
2471 config CPU_MIPSR2_IRQ_EI
2476 depends on !CPU_R3000
2483 # Work around the "daddi" and "daddiu" CPU errata:
2485 # - The `daddi' instruction fails to trap on overflow.
2486 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2489 # - The `daddiu' instruction can produce an incorrect result.
2490 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2492 # "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
2494 # "MIPS R4400PC/SC Errata, Processor Revision 1.0", erratum #7
2495 # "MIPS R4400MC Errata, Processor Revision 1.0", erratum #5
2496 config CPU_DADDI_WORKAROUNDS
2499 # Work around certain R4000 CPU errata (as implemented by GCC):
2501 # - A double-word or a variable shift may give an incorrect result
2502 # if executed immediately after starting an integer division:
2503 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2505 # "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
2508 # - A double-word or a variable shift may give an incorrect result
2509 # if executed while an integer multiplication is in progress:
2510 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2513 # - An integer division may give an incorrect result if started in
2514 # a delay slot of a taken branch or a jump:
2515 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2517 config CPU_R4000_WORKAROUNDS
2519 select CPU_R4400_WORKAROUNDS
2521 # Work around certain R4400 CPU errata (as implemented by GCC):
2523 # - A double-word or a variable shift may give an incorrect result
2524 # if executed immediately after starting an integer division:
2525 # "MIPS R4400MC Errata, Processor Revision 1.0", erratum #10
2526 # "MIPS R4400MC Errata, Processor Revision 2.0 & 3.0", erratum #4
2527 config CPU_R4400_WORKAROUNDS
2530 config CPU_R4X00_BUGS64
2532 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2534 config MIPS_ASID_SHIFT
2536 default 6 if CPU_R3000
2539 config MIPS_ASID_BITS
2541 default 0 if MIPS_ASID_BITS_VARIABLE
2542 default 6 if CPU_R3000
2545 config MIPS_ASID_BITS_VARIABLE
2548 config MIPS_CRC_SUPPORT
2551 # R4600 erratum. Due to the lack of errata information the exact
2552 # technical details aren't known. I've experimentally found that disabling
2553 # interrupts during indexed I-cache flushes seems to be sufficient to deal
2555 config WAR_R4600_V1_INDEX_ICACHEOP
2558 # Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
2560 # 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2561 # Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2562 # executed if there is no other dcache activity. If the dcache is
2563 # accessed for another instruction immediately preceding when these
2564 # cache instructions are executing, it is possible that the dcache
2565 # tag match outputs used by these cache instructions will be
2566 # incorrect. These cache instructions should be preceded by at least
2567 # four instructions that are not any kind of load or store
2570 # This is not allowed: lw
2574 # cache Hit_Writeback_Invalidate_D
2576 # This is allowed: lw
2581 # cache Hit_Writeback_Invalidate_D
2582 config WAR_R4600_V1_HIT_CACHEOP
2585 # Writeback and invalidate the primary cache dcache before DMA.
2587 # R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2588 # Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2589 # operate correctly if the internal data cache refill buffer is empty. These
2590 # CACHE instructions should be separated from any potential data cache miss
2591 # by a load instruction to an uncached address to empty the response buffer."
2592 # (Revision 2.0 device errata from IDT available on https://www.idt.com/
2594 config WAR_R4600_V2_HIT_CACHEOP
2597 # From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2598 # the line which this instruction itself exists, the following
2599 # operation is not guaranteed."
2601 # Workaround: do two phase flushing for Index_Invalidate_I
2602 config WAR_TX49XX_ICACHE_INDEX_INV
2605 # The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2606 # opposes it being called that) where invalid instructions in the same
2607 # I-cache line worth of instructions being fetched may case spurious
2609 config WAR_ICACHE_REFILLS
2612 # On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2613 # may cause ll / sc and lld / scd sequences to execute non-atomically.
2614 config WAR_R10000_LLSC
2617 # 34K core erratum: "Problems Executing the TLBR Instruction"
2618 config WAR_MIPS34K_MISSED_ITLB
2622 # - Highmem only makes sense for the 32-bit kernel.
2623 # - The current highmem code will only work properly on physically indexed
2624 # caches such as R3000, SB1, R7000 or those that look like they're virtually
2625 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2626 # moment we protect the user and offer the highmem option only on machines
2627 # where it's known to be safe. This will not offer highmem on a few systems
2628 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2629 # indexed CPUs but we're playing safe.
2630 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2631 # know they might have memory configurations that could make use of highmem
2635 bool "High Memory Support"
2636 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2639 config CPU_SUPPORTS_HIGHMEM
2642 config SYS_SUPPORTS_HIGHMEM
2645 config SYS_SUPPORTS_SMARTMIPS
2648 config SYS_SUPPORTS_MICROMIPS
2651 config SYS_SUPPORTS_MIPS16
2654 This option must be set if a kernel might be executed on a MIPS16-
2655 enabled CPU even if MIPS16 is not actually being used. In other
2656 words, it makes the kernel MIPS16-tolerant.
2658 config CPU_SUPPORTS_MSA
2661 config ARCH_FLATMEM_ENABLE
2663 depends on !NUMA && !CPU_LOONGSON2EF
2665 config ARCH_SPARSEMEM_ENABLE
2670 depends on SYS_SUPPORTS_NUMA
2672 select HAVE_SETUP_PER_CPU_AREA
2673 select NEED_PER_CPU_EMBED_FIRST_CHUNK
2675 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2676 Access). This option improves performance on systems with more
2677 than two nodes; on two node systems it is generally better to
2678 leave it disabled; on single node systems leave this option
2681 config SYS_SUPPORTS_NUMA
2684 config HAVE_ARCH_NODEDATA_EXTENSION
2688 bool "Relocatable kernel"
2689 depends on SYS_SUPPORTS_RELOCATABLE
2690 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2691 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2692 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
2693 CPU_P5600 || CAVIUM_OCTEON_SOC || \
2696 This builds a kernel image that retains relocation information
2697 so it can be loaded someplace besides the default 1MB.
2698 The relocations make the kernel binary about 15% larger,
2699 but are discarded at runtime
2701 config RELOCATION_TABLE_SIZE
2702 hex "Relocation table size"
2703 depends on RELOCATABLE
2704 range 0x0 0x01000000
2705 default "0x00200000" if CPU_LOONGSON64
2706 default "0x00100000"
2708 A table of relocation data will be appended to the kernel binary
2709 and parsed at boot to fix up the relocated kernel.
2711 This option allows the amount of space reserved for the table to be
2712 adjusted, although the default of 1Mb should be ok in most cases.
2714 The build will fail and a valid size suggested if this is too small.
2716 If unsure, leave at the default value.
2718 config RANDOMIZE_BASE
2719 bool "Randomize the address of the kernel image"
2720 depends on RELOCATABLE
2722 Randomizes the physical and virtual address at which the
2723 kernel image is loaded, as a security feature that
2724 deters exploit attempts relying on knowledge of the location
2725 of kernel internals.
2727 Entropy is generated using any coprocessor 0 registers available.
2729 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2733 config RANDOMIZE_BASE_MAX_OFFSET
2734 hex "Maximum kASLR offset" if EXPERT
2735 depends on RANDOMIZE_BASE
2736 range 0x0 0x40000000 if EVA || 64BIT
2737 range 0x0 0x08000000
2738 default "0x01000000"
2740 When kASLR is active, this provides the maximum offset that will
2741 be applied to the kernel image. It should be set according to the
2742 amount of physical RAM available in the target system minus
2743 PHYSICAL_START and must be a power of 2.
2745 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2746 EVA or 64-bit. The default is 16Mb.
2753 config HW_PERF_EVENTS
2754 bool "Enable hardware performance counter support for perf events"
2755 depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_LOONGSON64)
2758 Enable hardware performance counter support for perf events. If
2759 disabled, perf events will use software events only.
2762 bool "Enable DMI scanning"
2763 depends on MACH_LOONGSON64
2764 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2767 Enabled scanning of DMI to identify machine quirks. Say Y
2768 here unless you have verified that your setup is not
2769 affected by entries in the DMI blacklist. Required by PNP
2773 bool "Multi-Processing support"
2774 depends on SYS_SUPPORTS_SMP
2776 This enables support for systems with more than one CPU. If you have
2777 a system with only one CPU, say N. If you have a system with more
2778 than one CPU, say Y.
2780 If you say N here, the kernel will run on uni- and multiprocessor
2781 machines, but will use only one CPU of a multiprocessor machine. If
2782 you say Y here, the kernel will run on many, but not all,
2783 uniprocessor machines. On a uniprocessor machine, the kernel
2784 will run faster if you say N here.
2786 People using multiprocessor machines who say Y here should also say
2787 Y to "Enhanced Real Time Clock Support", below.
2789 See also the SMP-HOWTO available at
2790 <https://www.tldp.org/docs.html#howto>.
2792 If you don't know what to do here, say N.
2795 bool "Support for hot-pluggable CPUs"
2796 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2798 Say Y here to allow turning CPUs off and on. CPUs can be
2799 controlled through /sys/devices/system/cpu.
2800 (Note: power management support will enable this option
2801 automatically on SMP systems. )
2802 Say N if you want to disable CPU hotplug.
2807 config SYS_SUPPORTS_MIPS_CMP
2810 config SYS_SUPPORTS_MIPS_CPS
2813 config SYS_SUPPORTS_SMP
2816 config NR_CPUS_DEFAULT_4
2819 config NR_CPUS_DEFAULT_8
2822 config NR_CPUS_DEFAULT_16
2825 config NR_CPUS_DEFAULT_32
2828 config NR_CPUS_DEFAULT_64
2832 int "Maximum number of CPUs (2-256)"
2835 default "4" if NR_CPUS_DEFAULT_4
2836 default "8" if NR_CPUS_DEFAULT_8
2837 default "16" if NR_CPUS_DEFAULT_16
2838 default "32" if NR_CPUS_DEFAULT_32
2839 default "64" if NR_CPUS_DEFAULT_64
2841 This allows you to specify the maximum number of CPUs which this
2842 kernel will support. The maximum supported value is 32 for 32-bit
2843 kernel and 64 for 64-bit kernels; the minimum value which makes
2844 sense is 1 for Qemu (useful only for kernel debugging purposes)
2845 and 2 for all others.
2847 This is purely to save memory - each supported CPU adds
2848 approximately eight kilobytes to the kernel image. For best
2849 performance should round up your number of processors to the next
2852 config MIPS_PERF_SHARED_TC_COUNTERS
2855 config MIPS_NR_CPU_NR_MAP_1024
2858 config MIPS_NR_CPU_NR_MAP
2861 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2862 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2865 # Timer Interrupt Frequency Configuration
2869 prompt "Timer frequency"
2872 Allows the configuration of the timer frequency.
2875 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2878 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2881 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2884 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2887 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2890 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2893 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2896 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2900 config SYS_SUPPORTS_24HZ
2903 config SYS_SUPPORTS_48HZ
2906 config SYS_SUPPORTS_100HZ
2909 config SYS_SUPPORTS_128HZ
2912 config SYS_SUPPORTS_250HZ
2915 config SYS_SUPPORTS_256HZ
2918 config SYS_SUPPORTS_1000HZ
2921 config SYS_SUPPORTS_1024HZ
2924 config SYS_SUPPORTS_ARBIT_HZ
2926 default y if !SYS_SUPPORTS_24HZ && \
2927 !SYS_SUPPORTS_48HZ && \
2928 !SYS_SUPPORTS_100HZ && \
2929 !SYS_SUPPORTS_128HZ && \
2930 !SYS_SUPPORTS_250HZ && \
2931 !SYS_SUPPORTS_256HZ && \
2932 !SYS_SUPPORTS_1000HZ && \
2933 !SYS_SUPPORTS_1024HZ
2939 default 100 if HZ_100
2940 default 128 if HZ_128
2941 default 250 if HZ_250
2942 default 256 if HZ_256
2943 default 1000 if HZ_1000
2944 default 1024 if HZ_1024
2947 def_bool HIGH_RES_TIMERS
2950 bool "Kexec system call"
2953 kexec is a system call that implements the ability to shutdown your
2954 current kernel, and to start another kernel. It is like a reboot
2955 but it is independent of the system firmware. And like a reboot
2956 you can start any kernel with it, not just Linux.
2958 The name comes from the similarity to the exec system call.
2960 It is an ongoing process to be certain the hardware in a machine
2961 is properly shutdown, so do not be surprised if this code does not
2962 initially work for you. As of this writing the exact hardware
2963 interface is strongly in flux, so no good recommendation can be
2967 bool "Kernel crash dumps"
2969 Generate crash dump after being started by kexec.
2970 This should be normally only set in special crash dump kernels
2971 which are loaded in the main kernel with kexec-tools into
2972 a specially reserved region and then later executed after
2973 a crash by kdump/kexec. The crash dump kernel must be compiled
2974 to a memory address not used by the main kernel or firmware using
2977 config PHYSICAL_START
2978 hex "Physical address where the kernel is loaded"
2979 default "0xffffffff84000000"
2980 depends on CRASH_DUMP
2982 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
2983 If you plan to use kernel for capturing the crash dump change
2984 this value to start of the reserved region (the "X" value as
2985 specified in the "crashkernel=YM@XM" command line boot parameter
2986 passed to the panic-ed kernel).
2988 config MIPS_O32_FP64_SUPPORT
2989 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
2990 depends on 32BIT || MIPS32_O32
2992 When this is enabled, the kernel will support use of 64-bit floating
2993 point registers with binaries using the O32 ABI along with the
2994 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
2995 32-bit MIPS systems this support is at the cost of increasing the
2996 size and complexity of the compiled FPU emulator. Thus if you are
2997 running a MIPS32 system and know that none of your userland binaries
2998 will require 64-bit floating point, you may wish to reduce the size
2999 of your kernel & potentially improve FP emulation performance by
3002 Although binutils currently supports use of this flag the details
3003 concerning its effect upon the O32 ABI in userland are still being
3004 worked on. In order to avoid userland becoming dependent upon current
3005 behaviour before the details have been finalised, this option should
3006 be considered experimental and only enabled by those working upon
3014 select OF_EARLY_FLATTREE
3024 prompt "Kernel appended dtb support" if USE_OF
3025 default MIPS_NO_APPENDED_DTB
3027 config MIPS_NO_APPENDED_DTB
3030 Do not enable appended dtb support.
3032 config MIPS_ELF_APPENDED_DTB
3035 With this option, the boot code will look for a device tree binary
3036 DTB) included in the vmlinux ELF section .appended_dtb. By default
3037 it is empty and the DTB can be appended using binutils command
3040 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
3042 This is meant as a backward compatibility convenience for those
3043 systems with a bootloader that can't be upgraded to accommodate
3044 the documented boot protocol using a device tree.
3046 config MIPS_RAW_APPENDED_DTB
3047 bool "vmlinux.bin or vmlinuz.bin"
3049 With this option, the boot code will look for a device tree binary
3050 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
3051 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
3053 This is meant as a backward compatibility convenience for those
3054 systems with a bootloader that can't be upgraded to accommodate
3055 the documented boot protocol using a device tree.
3057 Beware that there is very little in terms of protection against
3058 this option being confused by leftover garbage in memory that might
3059 look like a DTB header after a reboot if no actual DTB is appended
3060 to vmlinux.bin. Do not leave this option active in a production kernel
3061 if you don't intend to always append a DTB.
3065 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
3066 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
3067 !MACH_LOONGSON64 && !MIPS_MALTA && \
3069 default MIPS_CMDLINE_FROM_BOOTLOADER
3071 config MIPS_CMDLINE_FROM_DTB
3073 bool "Dtb kernel arguments if available"
3075 config MIPS_CMDLINE_DTB_EXTEND
3077 bool "Extend dtb kernel arguments with bootloader arguments"
3079 config MIPS_CMDLINE_FROM_BOOTLOADER
3080 bool "Bootloader kernel arguments if available"
3082 config MIPS_CMDLINE_BUILTIN_EXTEND
3083 depends on CMDLINE_BOOL
3084 bool "Extend builtin kernel arguments with bootloader arguments"
3089 config LOCKDEP_SUPPORT
3093 config STACKTRACE_SUPPORT
3097 config PGTABLE_LEVELS
3099 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3100 default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48)
3103 config MIPS_AUTO_PFN_OFFSET
3106 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3108 config PCI_DRIVERS_GENERIC
3109 select PCI_DOMAINS_GENERIC if PCI
3112 config PCI_DRIVERS_LEGACY
3113 def_bool !PCI_DRIVERS_GENERIC
3114 select NO_GENERIC_PCI_IOPORT_MAP
3115 select PCI_DOMAINS if PCI
3118 # ISA support is now enabled via select. Too many systems still have the one
3119 # or other ISA chip on the board that users don't know about so don't expect
3120 # users to choose the right thing ...
3126 bool "TURBOchannel support"
3127 depends on MACH_DECSTATION
3129 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3130 processors. TURBOchannel programming specifications are available
3132 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3134 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3135 Linux driver support status is documented at:
3136 <http://www.linux-mips.org/wiki/DECstation>
3142 config ARCH_MMAP_RND_BITS_MIN
3146 config ARCH_MMAP_RND_BITS_MAX
3150 config ARCH_MMAP_RND_COMPAT_BITS_MIN
3153 config ARCH_MMAP_RND_COMPAT_BITS_MAX
3160 select MIPS_EXTERNAL_TIMER
3166 config MIPS32_COMPAT
3173 bool "Kernel support for o32 binaries"
3175 select ARCH_WANT_OLD_COMPAT_IPC
3177 select MIPS32_COMPAT
3179 Select this option if you want to run o32 binaries. These are pure
3180 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3181 existing binaries are in this format.
3186 bool "Kernel support for n32 binaries"
3188 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3190 select MIPS32_COMPAT
3192 Select this option if you want to run n32 binaries. These are
3193 64-bit binaries using 32-bit quantities for addressing and certain
3194 data that would normally be 64-bit. They are used in special
3199 config CC_HAS_MNO_BRANCH_LIKELY
3201 depends on $(cc-option,-mno-branch-likely)
3203 # https://github.com/llvm/llvm-project/issues/61045
3204 config CC_HAS_BROKEN_INLINE_COMPAT_BRANCH
3205 def_bool y if CC_IS_CLANG
3207 menu "Power management options"
3209 config ARCH_HIBERNATION_POSSIBLE
3211 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3213 config ARCH_SUSPEND_POSSIBLE
3215 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3217 source "kernel/power/Kconfig"
3221 config MIPS_EXTERNAL_TIMER
3224 menu "CPU Power Management"
3226 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3227 source "drivers/cpufreq/Kconfig"
3228 endif # CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3230 source "drivers/cpuidle/Kconfig"
3234 source "arch/mips/kvm/Kconfig"
3236 source "arch/mips/vdso/Kconfig"