1 # SPDX-License-Identifier: GPL-2.0
5 select ARCH_32BIT_OFF_T if !64BIT
6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7 select ARCH_HAS_CURRENT_STACK_POINTER if !CC_IS_CLANG || CLANG_VERSION >= 140000
8 select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
9 select ARCH_HAS_FORTIFY_SOURCE
11 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
12 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
13 select ARCH_HAS_STRNCPY_FROM_USER
14 select ARCH_HAS_STRNLEN_USER
15 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
16 select ARCH_HAS_UBSAN_SANITIZE_ALL
17 select ARCH_HAS_GCOV_PROFILE_ALL
18 select ARCH_KEEP_MEMBLOCK
19 select ARCH_SUPPORTS_UPROBES
20 select ARCH_USE_BUILTIN_BSWAP
21 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
22 select ARCH_USE_MEMTEST
23 select ARCH_USE_QUEUED_RWLOCKS
24 select ARCH_USE_QUEUED_SPINLOCKS
25 select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES
26 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
27 select ARCH_WANT_IPC_PARSE_VERSION
28 select ARCH_WANT_LD_ORPHAN_WARN
29 select BUILDTIME_TABLE_SORT
30 select CLONE_BACKWARDS
31 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
32 select CPU_PM if CPU_IDLE
33 select GENERIC_ATOMIC64 if !64BIT
34 select GENERIC_CMOS_UPDATE
35 select GENERIC_CPU_AUTOPROBE
36 select GENERIC_GETTIMEOFDAY
38 select GENERIC_IRQ_PROBE
39 select GENERIC_IRQ_SHOW
40 select GENERIC_ISA_DMA if EISA
41 select GENERIC_LIB_ASHLDI3
42 select GENERIC_LIB_ASHRDI3
43 select GENERIC_LIB_CMPDI2
44 select GENERIC_LIB_LSHRDI3
45 select GENERIC_LIB_UCMPDI2
46 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
47 select GENERIC_SMP_IDLE_THREAD
48 select GENERIC_TIME_VSYSCALL
49 select GUP_GET_PXX_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
50 select HAS_IOPORT if !NO_IOPORT_MAP || ISA
51 select HAVE_ARCH_COMPILER_H
52 select HAVE_ARCH_JUMP_LABEL
53 select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
54 select HAVE_ARCH_MMAP_RND_BITS if MMU
55 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
56 select HAVE_ARCH_SECCOMP_FILTER
57 select HAVE_ARCH_TRACEHOOK
58 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
59 select HAVE_ASM_MODVERSIONS
60 select HAVE_CONTEXT_TRACKING_USER
62 select HAVE_C_RECORDMCOUNT
63 select HAVE_DEBUG_KMEMLEAK
64 select HAVE_DEBUG_STACKOVERFLOW
65 select HAVE_DMA_CONTIGUOUS
66 select HAVE_DYNAMIC_FTRACE
67 select HAVE_EBPF_JIT if !CPU_MICROMIPS
68 select HAVE_EXIT_THREAD
70 select HAVE_FTRACE_MCOUNT_RECORD
71 select HAVE_FUNCTION_GRAPH_TRACER
72 select HAVE_FUNCTION_TRACER
73 select HAVE_GCC_PLUGINS
74 select HAVE_GENERIC_VDSO
75 select HAVE_IOREMAP_PROT
76 select HAVE_IRQ_EXIT_ON_IRQ_STACK
77 select HAVE_IRQ_TIME_ACCOUNTING
79 select HAVE_KRETPROBES
80 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
81 select HAVE_MOD_ARCH_SPECIFIC
83 select HAVE_PERF_EVENTS
85 select HAVE_PERF_USER_STACK_DUMP
86 select HAVE_REGS_AND_STACK_ACCESS_API
88 select HAVE_SPARSE_SYSCALL_NR
89 select HAVE_STACKPROTECTOR
90 select HAVE_SYSCALL_TRACEPOINTS
91 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
92 select IRQ_FORCED_THREADING
94 select MODULES_USE_ELF_REL if MODULES
95 select MODULES_USE_ELF_RELA if MODULES && 64BIT
96 select PERF_USE_VMALLOC
97 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
99 select SYSCTL_EXCEPTION_TRACE
100 select TRACE_IRQFLAGS_SUPPORT
101 select ARCH_HAS_ELFCORE_COMPAT
102 select HAVE_ARCH_KCSAN if 64BIT
104 config MIPS_FIXUP_BIGPHYS_ADDR
112 select SYS_SUPPORTS_32BIT_KERNEL
113 select SYS_SUPPORTS_LITTLE_ENDIAN
114 select SYS_SUPPORTS_ZBOOT
115 select DMA_NONCOHERENT
116 select ARCH_HAS_SYNC_DMA_FOR_CPU
121 select GENERIC_IRQ_CHIP
122 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
124 select CPU_SUPPORTS_CPUFREQ
125 select MIPS_EXTERNAL_TIMER
127 menu "Machine selection"
131 default MIPS_GENERIC_KERNEL
133 config MIPS_GENERIC_KERNEL
134 bool "Generic board-agnostic MIPS kernel"
135 select ARCH_HAS_SETUP_DMA_OPS
140 select CLKSRC_MIPS_GIC
142 select CPU_MIPSR2_IRQ_EI
143 select CPU_MIPSR2_IRQ_VI
145 select DMA_NONCOHERENT
148 select MIPS_AUTO_PFN_OFFSET
149 select MIPS_CPU_SCACHE
151 select MIPS_L1_CACHE_SHIFT_7
152 select NO_EXCEPT_FILL
153 select PCI_DRIVERS_GENERIC
156 select SYS_HAS_CPU_MIPS32_R1
157 select SYS_HAS_CPU_MIPS32_R2
158 select SYS_HAS_CPU_MIPS32_R6
159 select SYS_HAS_CPU_MIPS64_R1
160 select SYS_HAS_CPU_MIPS64_R2
161 select SYS_HAS_CPU_MIPS64_R6
162 select SYS_SUPPORTS_32BIT_KERNEL
163 select SYS_SUPPORTS_64BIT_KERNEL
164 select SYS_SUPPORTS_BIG_ENDIAN
165 select SYS_SUPPORTS_HIGHMEM
166 select SYS_SUPPORTS_LITTLE_ENDIAN
167 select SYS_SUPPORTS_MICROMIPS
168 select SYS_SUPPORTS_MIPS16
169 select SYS_SUPPORTS_MIPS_CPS
170 select SYS_SUPPORTS_MULTITHREADING
171 select SYS_SUPPORTS_RELOCATABLE
172 select SYS_SUPPORTS_SMARTMIPS
173 select SYS_SUPPORTS_ZBOOT
175 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
176 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
177 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
178 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
179 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
180 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
183 Select this to build a kernel which aims to support multiple boards,
184 generally using a flattened device tree passed from the bootloader
185 using the boot protocol defined in the UHI (Unified Hosting
186 Interface) specification.
189 bool "Alchemy processor based machines"
190 select PHYS_ADDR_T_64BIT
194 select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is
195 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
196 select SYS_HAS_CPU_MIPS32_R1
197 select SYS_SUPPORTS_32BIT_KERNEL
198 select SYS_SUPPORTS_APM_EMULATION
200 select SYS_SUPPORTS_ZBOOT
204 bool "Texas Instruments AR7"
207 select DMA_NONCOHERENT
211 select NO_EXCEPT_FILL
213 select SYS_HAS_CPU_MIPS32_R1
214 select SYS_HAS_EARLY_PRINTK
215 select SYS_SUPPORTS_32BIT_KERNEL
216 select SYS_SUPPORTS_LITTLE_ENDIAN
217 select SYS_SUPPORTS_MIPS16
218 select SYS_SUPPORTS_ZBOOT_UART16550
222 Support for the Texas Instruments AR7 System-on-a-Chip
223 family: TNETD7100, 7200 and 7300.
226 bool "Atheros AR231x/AR531x SoC support"
229 select DMA_NONCOHERENT
232 select SYS_HAS_CPU_MIPS32_R1
233 select SYS_SUPPORTS_BIG_ENDIAN
234 select SYS_SUPPORTS_32BIT_KERNEL
235 select SYS_HAS_EARLY_PRINTK
237 Support for Atheros AR231x and Atheros AR531x based boards
240 bool "Atheros AR71XX/AR724X/AR913X based boards"
241 select ARCH_HAS_RESET_CONTROLLER
245 select DMA_NONCOHERENT
250 select SYS_HAS_CPU_MIPS32_R2
251 select SYS_HAS_EARLY_PRINTK
252 select SYS_SUPPORTS_32BIT_KERNEL
253 select SYS_SUPPORTS_BIG_ENDIAN
254 select SYS_SUPPORTS_MIPS16
255 select SYS_SUPPORTS_ZBOOT_UART_PROM
257 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
259 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
262 bool "Broadcom Generic BMIPS kernel"
263 select ARCH_HAS_RESET_CONTROLLER
264 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
266 select NO_EXCEPT_FILL
272 select BCM6345_L1_IRQ
273 select BCM7038_L1_IRQ
274 select BCM7120_L2_IRQ
275 select BRCMSTB_L2_IRQ
277 select DMA_NONCOHERENT
278 select SYS_SUPPORTS_32BIT_KERNEL
279 select SYS_SUPPORTS_LITTLE_ENDIAN
280 select SYS_SUPPORTS_BIG_ENDIAN
281 select SYS_SUPPORTS_HIGHMEM
282 select SYS_HAS_CPU_BMIPS32_3300
283 select SYS_HAS_CPU_BMIPS4350
284 select SYS_HAS_CPU_BMIPS4380
285 select SYS_HAS_CPU_BMIPS5000
287 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
288 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
289 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
290 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
291 select HARDIRQS_SW_RESEND
293 select PCI_DRIVERS_GENERIC
296 Build a generic DT-based kernel image that boots on select
297 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
298 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
299 must be set appropriately for your board.
302 bool "Broadcom BCM47XX based boards"
306 select DMA_NONCOHERENT
309 select SYS_HAS_CPU_MIPS32_R1
310 select NO_EXCEPT_FILL
311 select SYS_SUPPORTS_32BIT_KERNEL
312 select SYS_SUPPORTS_LITTLE_ENDIAN
313 select SYS_SUPPORTS_MIPS16
314 select SYS_SUPPORTS_ZBOOT
315 select SYS_HAS_EARLY_PRINTK
316 select USE_GENERIC_EARLY_PRINTK_8250
318 select LEDS_GPIO_REGISTER
321 select BCM47XX_SSB if !BCM47XX_BCMA
323 Support for BCM47XX based boards
326 bool "Broadcom BCM63XX based boards"
331 select DMA_NONCOHERENT
333 select SYS_SUPPORTS_32BIT_KERNEL
334 select SYS_SUPPORTS_BIG_ENDIAN
335 select SYS_HAS_EARLY_PRINTK
336 select SYS_HAS_CPU_BMIPS32_3300
337 select SYS_HAS_CPU_BMIPS4350
338 select SYS_HAS_CPU_BMIPS4380
341 select MIPS_L1_CACHE_SHIFT_4
342 select HAVE_LEGACY_CLK
344 Support for BCM63XX based boards
351 select DMA_NONCOHERENT
357 select PCI_GT64XXX_PCI0
358 select SYS_HAS_CPU_NEVADA
359 select SYS_HAS_EARLY_PRINTK
360 select SYS_SUPPORTS_32BIT_KERNEL
361 select SYS_SUPPORTS_64BIT_KERNEL
362 select SYS_SUPPORTS_LITTLE_ENDIAN
363 select USE_GENERIC_EARLY_PRINTK_8250
365 config MACH_DECSTATION
369 select CEVT_R4K if CPU_R4X00
371 select CSRC_R4K if CPU_R4X00
372 select CPU_DADDI_WORKAROUNDS if 64BIT
373 select CPU_R4000_WORKAROUNDS if 64BIT
374 select CPU_R4400_WORKAROUNDS if 64BIT
375 select DMA_NONCOHERENT
378 select SYS_HAS_CPU_R3000
379 select SYS_HAS_CPU_R4X00
380 select SYS_SUPPORTS_32BIT_KERNEL
381 select SYS_SUPPORTS_64BIT_KERNEL
382 select SYS_SUPPORTS_LITTLE_ENDIAN
383 select SYS_SUPPORTS_128HZ
384 select SYS_SUPPORTS_256HZ
385 select SYS_SUPPORTS_1024HZ
386 select MIPS_L1_CACHE_SHIFT_4
388 This enables support for DEC's MIPS based workstations. For details
389 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
390 DECstation porting pages on <http://decstation.unix-ag.org/>.
392 If you have one of the following DECstation Models you definitely
393 want to choose R4xx0 for the CPU Type:
400 otherwise choose R3000.
403 bool "Jazz family of machines"
406 select ARCH_MIGHT_HAVE_PC_PARPORT
407 select ARCH_MIGHT_HAVE_PC_SERIO
411 select ARCH_MAY_HAVE_PC_FDC
414 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
415 select GENERIC_ISA_DMA
416 select HAVE_PCSPKR_PLATFORM
421 select SYS_HAS_CPU_R4X00
422 select SYS_SUPPORTS_32BIT_KERNEL
423 select SYS_SUPPORTS_64BIT_KERNEL
424 select SYS_SUPPORTS_100HZ
425 select SYS_SUPPORTS_LITTLE_ENDIAN
427 This a family of machines based on the MIPS R4030 chipset which was
428 used by several vendors to build RISC/os and Windows NT workstations.
429 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
430 Olivetti M700-10 workstations.
432 config MACH_INGENIC_SOC
433 bool "Ingenic SoC based machines"
436 select SYS_SUPPORTS_ZBOOT_UART16550
437 select CPU_SUPPORTS_CPUFREQ
438 select MIPS_EXTERNAL_TIMER
441 bool "Lantiq based platforms"
442 select DMA_NONCOHERENT
446 select NO_EXCEPT_FILL
447 select SYS_HAS_CPU_MIPS32_R1
448 select SYS_HAS_CPU_MIPS32_R2
449 select SYS_SUPPORTS_BIG_ENDIAN
450 select SYS_SUPPORTS_32BIT_KERNEL
451 select SYS_SUPPORTS_MIPS16
452 select SYS_SUPPORTS_MULTITHREADING
453 select SYS_SUPPORTS_VPE_LOADER
454 select SYS_HAS_EARLY_PRINTK
458 select HAVE_LEGACY_CLK
461 select PINCTRL_LANTIQ
462 select ARCH_HAS_RESET_CONTROLLER
463 select RESET_CONTROLLER
465 config MACH_LOONGSON32
466 bool "Loongson 32-bit family of machines"
467 select SYS_SUPPORTS_ZBOOT
469 This enables support for the Loongson-1 family of machines.
471 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
472 the Institute of Computing Technology (ICT), Chinese Academy of
475 config MACH_LOONGSON2EF
476 bool "Loongson-2E/F family of machines"
477 select SYS_SUPPORTS_ZBOOT
479 This enables the support of early Loongson-2E/F family of machines.
481 config MACH_LOONGSON64
482 bool "Loongson 64-bit family of machines"
483 select ARCH_SPARSEMEM_ENABLE
484 select ARCH_MIGHT_HAVE_PC_PARPORT
485 select ARCH_MIGHT_HAVE_PC_SERIO
486 select GENERIC_ISA_DMA_SUPPORT_BROKEN
496 select NO_EXCEPT_FILL
497 select NR_CPUS_DEFAULT_64
498 select USE_GENERIC_EARLY_PRINTK_8250
499 select PCI_DRIVERS_GENERIC
500 select SYS_HAS_CPU_LOONGSON64
501 select SYS_HAS_EARLY_PRINTK
502 select SYS_SUPPORTS_SMP
503 select SYS_SUPPORTS_HOTPLUG_CPU
504 select SYS_SUPPORTS_NUMA
505 select SYS_SUPPORTS_64BIT_KERNEL
506 select SYS_SUPPORTS_HIGHMEM
507 select SYS_SUPPORTS_LITTLE_ENDIAN
508 select SYS_SUPPORTS_ZBOOT
509 select SYS_SUPPORTS_RELOCATABLE
514 select PCI_HOST_GENERIC
515 select HAVE_ARCH_NODEDATA_EXTENSION if NUMA
517 This enables the support of Loongson-2/3 family of machines.
519 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
520 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
521 and Loongson-2F which will be removed), developed by the Institute
522 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
525 bool "MIPS Malta board"
526 select ARCH_MAY_HAVE_PC_FDC
527 select ARCH_MIGHT_HAVE_PC_PARPORT
528 select ARCH_MIGHT_HAVE_PC_SERIO
533 select CLKSRC_MIPS_GIC
536 select DMA_NONCOHERENT
537 select GENERIC_ISA_DMA
538 select HAVE_PCSPKR_PLATFORM
544 select MIPS_CPU_SCACHE
546 select MIPS_L1_CACHE_SHIFT_6
548 select PCI_GT64XXX_PCI0
551 select SYS_HAS_CPU_MIPS32_R1
552 select SYS_HAS_CPU_MIPS32_R2
553 select SYS_HAS_CPU_MIPS32_R3_5
554 select SYS_HAS_CPU_MIPS32_R5
555 select SYS_HAS_CPU_MIPS32_R6
556 select SYS_HAS_CPU_MIPS64_R1
557 select SYS_HAS_CPU_MIPS64_R2
558 select SYS_HAS_CPU_MIPS64_R6
559 select SYS_HAS_CPU_NEVADA
560 select SYS_HAS_CPU_RM7000
561 select SYS_SUPPORTS_32BIT_KERNEL
562 select SYS_SUPPORTS_64BIT_KERNEL
563 select SYS_SUPPORTS_BIG_ENDIAN
564 select SYS_SUPPORTS_HIGHMEM
565 select SYS_SUPPORTS_LITTLE_ENDIAN
566 select SYS_SUPPORTS_MICROMIPS
567 select SYS_SUPPORTS_MIPS16
568 select SYS_SUPPORTS_MIPS_CMP
569 select SYS_SUPPORTS_MIPS_CPS
570 select SYS_SUPPORTS_MULTITHREADING
571 select SYS_SUPPORTS_RELOCATABLE
572 select SYS_SUPPORTS_SMARTMIPS
573 select SYS_SUPPORTS_VPE_LOADER
574 select SYS_SUPPORTS_ZBOOT
576 select WAR_ICACHE_REFILLS
577 select ZONE_DMA32 if 64BIT
579 This enables support for the MIPS Technologies Malta evaluation
583 bool "Microchip PIC32 Family"
585 This enables support for the Microchip PIC32 family of platforms.
587 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
590 config MACH_NINTENDO64
591 bool "Nintendo 64 console"
594 select SYS_HAS_CPU_R4300
595 select SYS_SUPPORTS_BIG_ENDIAN
596 select SYS_SUPPORTS_ZBOOT
597 select SYS_SUPPORTS_32BIT_KERNEL
598 select SYS_SUPPORTS_64BIT_KERNEL
599 select DMA_NONCOHERENT
603 bool "Ralink based machines"
608 select DMA_NONCOHERENT
611 select SYS_HAS_CPU_MIPS32_R2
612 select SYS_SUPPORTS_32BIT_KERNEL
613 select SYS_SUPPORTS_LITTLE_ENDIAN
614 select SYS_SUPPORTS_MIPS16
615 select SYS_SUPPORTS_ZBOOT
616 select SYS_HAS_EARLY_PRINTK
617 select ARCH_HAS_RESET_CONTROLLER
618 select RESET_CONTROLLER
620 config MACH_REALTEK_RTL
621 bool "Realtek RTL838x/RTL839x based machines"
623 select DMA_NONCOHERENT
627 select SYS_HAS_CPU_MIPS32_R1
628 select SYS_HAS_CPU_MIPS32_R2
629 select SYS_SUPPORTS_BIG_ENDIAN
630 select SYS_SUPPORTS_32BIT_KERNEL
631 select SYS_SUPPORTS_MIPS16
632 select SYS_SUPPORTS_MULTITHREADING
633 select SYS_SUPPORTS_VPE_LOADER
639 bool "SGI IP22 (Indy/Indigo2)"
644 select ARCH_MIGHT_HAVE_PC_SERIO
648 select DEFAULT_SGI_PARTITION
649 select DMA_NONCOHERENT
653 select IP22_CPU_SCACHE
655 select GENERIC_ISA_DMA_SUPPORT_BROKEN
657 select SGI_HAS_INDYDOG
663 select SYS_HAS_CPU_R4X00
664 select SYS_HAS_CPU_R5000
665 select SYS_HAS_EARLY_PRINTK
666 select SYS_SUPPORTS_32BIT_KERNEL
667 select SYS_SUPPORTS_64BIT_KERNEL
668 select SYS_SUPPORTS_BIG_ENDIAN
669 select WAR_R4600_V1_INDEX_ICACHEOP
670 select WAR_R4600_V1_HIT_CACHEOP
671 select WAR_R4600_V2_HIT_CACHEOP
672 select MIPS_L1_CACHE_SHIFT_7
674 This are the SGI Indy, Challenge S and Indigo2, as well as certain
675 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
676 that runs on these, say Y here.
679 bool "SGI IP27 (Origin200/2000)"
680 select ARCH_HAS_PHYS_TO_DMA
681 select ARCH_SPARSEMEM_ENABLE
684 select ARC_CMDLINE_ONLY
686 select DEFAULT_SGI_PARTITION
688 select SYS_HAS_EARLY_PRINTK
691 select IRQ_DOMAIN_HIERARCHY
692 select NR_CPUS_DEFAULT_64
693 select PCI_DRIVERS_GENERIC
694 select PCI_XTALK_BRIDGE
695 select SYS_HAS_CPU_R10000
696 select SYS_SUPPORTS_64BIT_KERNEL
697 select SYS_SUPPORTS_BIG_ENDIAN
698 select SYS_SUPPORTS_NUMA
699 select SYS_SUPPORTS_SMP
700 select WAR_R10000_LLSC
701 select MIPS_L1_CACHE_SHIFT_7
703 select HAVE_ARCH_NODEDATA_EXTENSION
705 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
706 workstations. To compile a Linux kernel that runs on these, say Y
710 bool "SGI IP28 (Indigo2 R10k)"
715 select ARCH_MIGHT_HAVE_PC_SERIO
719 select DEFAULT_SGI_PARTITION
720 select DMA_NONCOHERENT
721 select GENERIC_ISA_DMA_SUPPORT_BROKEN
727 select SGI_HAS_INDYDOG
733 select SYS_HAS_CPU_R10000
734 select SYS_HAS_EARLY_PRINTK
735 select SYS_SUPPORTS_64BIT_KERNEL
736 select SYS_SUPPORTS_BIG_ENDIAN
737 select WAR_R10000_LLSC
738 select MIPS_L1_CACHE_SHIFT_7
740 This is the SGI Indigo2 with R10000 processor. To compile a Linux
741 kernel that runs on these, say Y here.
744 bool "SGI IP30 (Octane/Octane2)"
745 select ARCH_HAS_PHYS_TO_DMA
752 select SYNC_R4K if SMP
756 select IRQ_DOMAIN_HIERARCHY
757 select PCI_DRIVERS_GENERIC
758 select PCI_XTALK_BRIDGE
759 select SYS_HAS_EARLY_PRINTK
760 select SYS_HAS_CPU_R10000
761 select SYS_SUPPORTS_64BIT_KERNEL
762 select SYS_SUPPORTS_BIG_ENDIAN
763 select SYS_SUPPORTS_SMP
764 select WAR_R10000_LLSC
765 select MIPS_L1_CACHE_SHIFT_7
768 These are the SGI Octane and Octane2 graphics workstations. To
769 compile a Linux kernel that runs on these, say Y here.
775 select ARCH_HAS_PHYS_TO_DMA
781 select DMA_NONCOHERENT
784 select R5000_CPU_SCACHE
785 select RM7000_CPU_SCACHE
786 select SYS_HAS_CPU_R5000
787 select SYS_HAS_CPU_R10000 if BROKEN
788 select SYS_HAS_CPU_RM7000
789 select SYS_HAS_CPU_NEVADA
790 select SYS_SUPPORTS_64BIT_KERNEL
791 select SYS_SUPPORTS_BIG_ENDIAN
792 select WAR_ICACHE_REFILLS
794 If you want this kernel to run on SGI O2 workstation, say Y here.
797 bool "Sibyte BCM91120C-CRhine"
799 select SIBYTE_BCM1120
801 select SYS_HAS_CPU_SB1
802 select SYS_SUPPORTS_BIG_ENDIAN
803 select SYS_SUPPORTS_LITTLE_ENDIAN
806 bool "Sibyte BCM91120x-Carmel"
808 select SIBYTE_BCM1120
810 select SYS_HAS_CPU_SB1
811 select SYS_SUPPORTS_BIG_ENDIAN
812 select SYS_SUPPORTS_LITTLE_ENDIAN
815 bool "Sibyte BCM91125C-CRhone"
817 select SIBYTE_BCM1125
819 select SYS_HAS_CPU_SB1
820 select SYS_SUPPORTS_BIG_ENDIAN
821 select SYS_SUPPORTS_HIGHMEM
822 select SYS_SUPPORTS_LITTLE_ENDIAN
825 bool "Sibyte BCM91125E-Rhone"
827 select SIBYTE_BCM1125H
829 select SYS_HAS_CPU_SB1
830 select SYS_SUPPORTS_BIG_ENDIAN
831 select SYS_SUPPORTS_LITTLE_ENDIAN
834 bool "Sibyte BCM91250A-SWARM"
836 select HAVE_PATA_PLATFORM
839 select SYS_HAS_CPU_SB1
840 select SYS_SUPPORTS_BIG_ENDIAN
841 select SYS_SUPPORTS_HIGHMEM
842 select SYS_SUPPORTS_LITTLE_ENDIAN
843 select ZONE_DMA32 if 64BIT
844 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
846 config SIBYTE_LITTLESUR
847 bool "Sibyte BCM91250C2-LittleSur"
849 select HAVE_PATA_PLATFORM
852 select SYS_HAS_CPU_SB1
853 select SYS_SUPPORTS_BIG_ENDIAN
854 select SYS_SUPPORTS_HIGHMEM
855 select SYS_SUPPORTS_LITTLE_ENDIAN
856 select ZONE_DMA32 if 64BIT
858 config SIBYTE_SENTOSA
859 bool "Sibyte BCM91250E-Sentosa"
863 select SYS_HAS_CPU_SB1
864 select SYS_SUPPORTS_BIG_ENDIAN
865 select SYS_SUPPORTS_LITTLE_ENDIAN
866 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
869 bool "Sibyte BCM91480B-BigSur"
871 select NR_CPUS_DEFAULT_4
872 select SIBYTE_BCM1x80
874 select SYS_HAS_CPU_SB1
875 select SYS_SUPPORTS_BIG_ENDIAN
876 select SYS_SUPPORTS_HIGHMEM
877 select SYS_SUPPORTS_LITTLE_ENDIAN
878 select ZONE_DMA32 if 64BIT
879 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
882 bool "SNI RM200/300/400"
885 select FW_ARC if CPU_LITTLE_ENDIAN
886 select FW_ARC32 if CPU_LITTLE_ENDIAN
887 select FW_SNIPROM if CPU_BIG_ENDIAN
888 select ARCH_MAY_HAVE_PC_FDC
889 select ARCH_MIGHT_HAVE_PC_PARPORT
890 select ARCH_MIGHT_HAVE_PC_SERIO
894 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
895 select DMA_NONCOHERENT
896 select GENERIC_ISA_DMA
898 select HAVE_PCSPKR_PLATFORM
904 select MIPS_L1_CACHE_SHIFT_6
905 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
906 select SYS_HAS_CPU_R4X00
907 select SYS_HAS_CPU_R5000
908 select SYS_HAS_CPU_R10000
909 select R5000_CPU_SCACHE
910 select SYS_HAS_EARLY_PRINTK
911 select SYS_SUPPORTS_32BIT_KERNEL
912 select SYS_SUPPORTS_64BIT_KERNEL
913 select SYS_SUPPORTS_BIG_ENDIAN
914 select SYS_SUPPORTS_HIGHMEM
915 select SYS_SUPPORTS_LITTLE_ENDIAN
916 select WAR_R4600_V2_HIT_CACHEOP
918 The SNI RM200/300/400 are MIPS-based machines manufactured by
919 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
920 Technology and now in turn merged with Fujitsu. Say Y here to
921 support this machine type.
924 bool "Toshiba TX49 series based machines"
925 select WAR_TX49XX_ICACHE_INDEX_INV
927 config MIKROTIK_RB532
928 bool "Mikrotik RB532 boards"
931 select DMA_NONCOHERENT
934 select SYS_HAS_CPU_MIPS32_R1
935 select SYS_SUPPORTS_32BIT_KERNEL
936 select SYS_SUPPORTS_LITTLE_ENDIAN
940 select MIPS_L1_CACHE_SHIFT_4
942 Support the Mikrotik(tm) RouterBoard 532 series,
943 based on the IDT RC32434 SoC.
945 config CAVIUM_OCTEON_SOC
946 bool "Cavium Networks Octeon SoC based boards"
948 select ARCH_HAS_PHYS_TO_DMA
950 select PHYS_ADDR_T_64BIT
951 select SYS_SUPPORTS_64BIT_KERNEL
952 select SYS_SUPPORTS_BIG_ENDIAN
954 select EDAC_ATOMIC_SCRUB
955 select SYS_SUPPORTS_LITTLE_ENDIAN
956 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
957 select SYS_HAS_EARLY_PRINTK
958 select SYS_HAS_CPU_CAVIUM_OCTEON
960 select HAVE_PLAT_DELAY
961 select HAVE_PLAT_FW_INIT_CMDLINE
962 select HAVE_PLAT_MEMCPY
966 select ARCH_SPARSEMEM_ENABLE
967 select SYS_SUPPORTS_SMP
968 select NR_CPUS_DEFAULT_64
969 select MIPS_NR_CPU_NR_MAP_1024
972 select MTD_COMPLEX_MAPPINGS
974 select SYS_SUPPORTS_RELOCATABLE
976 This option supports all of the Octeon reference boards from Cavium
977 Networks. It builds a kernel that dynamically determines the Octeon
978 CPU type and supports all known board reference implementations.
979 Some of the supported boards are:
986 Say Y here for most Octeon reference boards.
990 source "arch/mips/alchemy/Kconfig"
991 source "arch/mips/ath25/Kconfig"
992 source "arch/mips/ath79/Kconfig"
993 source "arch/mips/bcm47xx/Kconfig"
994 source "arch/mips/bcm63xx/Kconfig"
995 source "arch/mips/bmips/Kconfig"
996 source "arch/mips/generic/Kconfig"
997 source "arch/mips/ingenic/Kconfig"
998 source "arch/mips/jazz/Kconfig"
999 source "arch/mips/lantiq/Kconfig"
1000 source "arch/mips/pic32/Kconfig"
1001 source "arch/mips/ralink/Kconfig"
1002 source "arch/mips/sgi-ip27/Kconfig"
1003 source "arch/mips/sibyte/Kconfig"
1004 source "arch/mips/txx9/Kconfig"
1005 source "arch/mips/cavium-octeon/Kconfig"
1006 source "arch/mips/loongson2ef/Kconfig"
1007 source "arch/mips/loongson32/Kconfig"
1008 source "arch/mips/loongson64/Kconfig"
1012 config GENERIC_HWEIGHT
1016 config GENERIC_CALIBRATE_DELAY
1020 config SCHED_OMIT_FRAME_POINTER
1025 # Select some configuration options automatically based on user selections.
1030 config ARCH_MAY_HAVE_PC_FDC
1061 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1067 config MIPS_CLOCK_VSYSCALL
1068 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1077 config ARCH_SUPPORTS_UPROBES
1080 config DMA_NONCOHERENT
1083 # MIPS allows mixing "slightly different" Cacheability and Coherency
1084 # Attribute bits. It is believed that the uncached access through
1085 # KSEG1 and the implementation specific "uncached accelerated" used
1086 # by pgprot_writcombine can be mixed, and the latter sometimes provides
1087 # significant advantages.
1089 select ARCH_HAS_DMA_WRITE_COMBINE
1090 select ARCH_HAS_DMA_PREP_COHERENT
1091 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1092 select ARCH_HAS_DMA_SET_UNCACHED
1093 select DMA_NONCOHERENT_MMAP
1094 select NEED_DMA_MAP_STATE
1096 config SYS_HAS_EARLY_PRINTK
1099 config SYS_SUPPORTS_HOTPLUG_CPU
1102 config MIPS_BONITO64
1111 config NO_IOPORT_MAP
1115 def_bool CPU_NO_LOAD_STORE_LR
1117 config GENERIC_ISA_DMA
1119 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1122 config GENERIC_ISA_DMA_SUPPORT_BROKEN
1124 select GENERIC_ISA_DMA
1126 config HAVE_PLAT_DELAY
1129 config HAVE_PLAT_FW_INIT_CMDLINE
1132 config HAVE_PLAT_MEMCPY
1138 config SYS_SUPPORTS_RELOCATABLE
1141 Selected if the platform supports relocating the kernel.
1142 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1143 to allow access to command line and entropy sources.
1146 # Endianness selection. Sufficiently obscure so many users don't know what to
1147 # answer,so we try hard to limit the available choices. Also the use of a
1148 # choice statement should be more obvious to the user.
1151 prompt "Endianness selection"
1153 Some MIPS machines can be configured for either little or big endian
1154 byte order. These modes require different kernels and a different
1155 Linux distribution. In general there is one preferred byteorder for a
1156 particular system but some systems are just as commonly used in the
1157 one or the other endianness.
1159 config CPU_BIG_ENDIAN
1161 depends on SYS_SUPPORTS_BIG_ENDIAN
1163 config CPU_LITTLE_ENDIAN
1164 bool "Little endian"
1165 depends on SYS_SUPPORTS_LITTLE_ENDIAN
1172 config SYS_SUPPORTS_APM_EMULATION
1175 config SYS_SUPPORTS_BIG_ENDIAN
1178 config SYS_SUPPORTS_LITTLE_ENDIAN
1181 config MIPS_HUGE_TLB_SUPPORT
1182 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1196 config PCI_GT64XXX_PCI0
1199 config PCI_XTALK_BRIDGE
1202 config NO_EXCEPT_FILL
1208 config SWAP_IO_SPACE
1211 config SGI_HAS_INDYDOG
1223 config SGI_HAS_ZILOG
1226 config SGI_HAS_I8042
1229 config DEFAULT_SGI_PARTITION
1241 config MIPS_L1_CACHE_SHIFT_4
1244 config MIPS_L1_CACHE_SHIFT_5
1247 config MIPS_L1_CACHE_SHIFT_6
1250 config MIPS_L1_CACHE_SHIFT_7
1253 config MIPS_L1_CACHE_SHIFT
1255 default "7" if MIPS_L1_CACHE_SHIFT_7
1256 default "6" if MIPS_L1_CACHE_SHIFT_6
1257 default "5" if MIPS_L1_CACHE_SHIFT_5
1258 default "4" if MIPS_L1_CACHE_SHIFT_4
1261 config ARC_CMDLINE_ONLY
1265 bool "ARC console support"
1266 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1280 menu "CPU selection"
1286 config CPU_LOONGSON64
1287 bool "Loongson 64-bit CPU"
1288 depends on SYS_HAS_CPU_LOONGSON64
1289 select ARCH_HAS_PHYS_TO_DMA
1291 select CPU_HAS_PREFETCH
1292 select CPU_SUPPORTS_64BIT_KERNEL
1293 select CPU_SUPPORTS_HIGHMEM
1294 select CPU_SUPPORTS_HUGEPAGES
1295 select CPU_SUPPORTS_MSA
1296 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1297 select CPU_MIPSR2_IRQ_VI
1298 select WEAK_ORDERING
1299 select WEAK_REORDERING_BEYOND_LLSC
1300 select MIPS_ASID_BITS_VARIABLE
1301 select MIPS_PGD_C0_CONTEXT
1302 select MIPS_L1_CACHE_SHIFT_6
1303 select MIPS_FP_SUPPORT
1308 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1309 cores implements the MIPS64R2 instruction set with many extensions,
1310 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1311 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1312 Loongson-2E/2F is not covered here and will be removed in future.
1314 config LOONGSON3_ENHANCEMENT
1315 bool "New Loongson-3 CPU Enhancements"
1317 depends on CPU_LOONGSON64
1319 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1320 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1321 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1322 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1323 Fast TLB refill support, etc.
1325 This option enable those enhancements which are not probed at run
1326 time. If you want a generic kernel to run on all Loongson 3 machines,
1327 please say 'N' here. If you want a high-performance kernel to run on
1328 new Loongson-3 machines only, please say 'Y' here.
1330 config CPU_LOONGSON3_WORKAROUNDS
1331 bool "Loongson-3 LLSC Workarounds"
1333 depends on CPU_LOONGSON64
1335 Loongson-3 processors have the llsc issues which require workarounds.
1336 Without workarounds the system may hang unexpectedly.
1338 Say Y, unless you know what you are doing.
1340 config CPU_LOONGSON3_CPUCFG_EMULATION
1341 bool "Emulate the CPUCFG instruction on older Loongson cores"
1343 depends on CPU_LOONGSON64
1345 Loongson-3A R4 and newer have the CPUCFG instruction available for
1346 userland to query CPU capabilities, much like CPUID on x86. This
1347 option provides emulation of the instruction on older Loongson
1348 cores, back to Loongson-3A1000.
1350 If unsure, please say Y.
1352 config CPU_LOONGSON2E
1354 depends on SYS_HAS_CPU_LOONGSON2E
1355 select CPU_LOONGSON2EF
1357 The Loongson 2E processor implements the MIPS III instruction set
1358 with many extensions.
1360 It has an internal FPGA northbridge, which is compatible to
1363 config CPU_LOONGSON2F
1365 depends on SYS_HAS_CPU_LOONGSON2F
1366 select CPU_LOONGSON2EF
1369 The Loongson 2F processor implements the MIPS III instruction set
1370 with many extensions.
1372 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1373 have a similar programming interface with FPGA northbridge used in
1376 config CPU_LOONGSON1B
1378 depends on SYS_HAS_CPU_LOONGSON1B
1379 select CPU_LOONGSON32
1380 select LEDS_GPIO_REGISTER
1382 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1383 Release 1 instruction set and part of the MIPS32 Release 2
1386 config CPU_LOONGSON1C
1388 depends on SYS_HAS_CPU_LOONGSON1C
1389 select CPU_LOONGSON32
1390 select LEDS_GPIO_REGISTER
1392 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1393 Release 1 instruction set and part of the MIPS32 Release 2
1396 config CPU_MIPS32_R1
1397 bool "MIPS32 Release 1"
1398 depends on SYS_HAS_CPU_MIPS32_R1
1399 select CPU_HAS_PREFETCH
1400 select CPU_SUPPORTS_32BIT_KERNEL
1401 select CPU_SUPPORTS_HIGHMEM
1403 Choose this option to build a kernel for release 1 or later of the
1404 MIPS32 architecture. Most modern embedded systems with a 32-bit
1405 MIPS processor are based on a MIPS32 processor. If you know the
1406 specific type of processor in your system, choose those that one
1407 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1408 Release 2 of the MIPS32 architecture is available since several
1409 years so chances are you even have a MIPS32 Release 2 processor
1410 in which case you should choose CPU_MIPS32_R2 instead for better
1413 config CPU_MIPS32_R2
1414 bool "MIPS32 Release 2"
1415 depends on SYS_HAS_CPU_MIPS32_R2
1416 select CPU_HAS_PREFETCH
1417 select CPU_SUPPORTS_32BIT_KERNEL
1418 select CPU_SUPPORTS_HIGHMEM
1419 select CPU_SUPPORTS_MSA
1422 Choose this option to build a kernel for release 2 or later of the
1423 MIPS32 architecture. Most modern embedded systems with a 32-bit
1424 MIPS processor are based on a MIPS32 processor. If you know the
1425 specific type of processor in your system, choose those that one
1426 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1428 config CPU_MIPS32_R5
1429 bool "MIPS32 Release 5"
1430 depends on SYS_HAS_CPU_MIPS32_R5
1431 select CPU_HAS_PREFETCH
1432 select CPU_SUPPORTS_32BIT_KERNEL
1433 select CPU_SUPPORTS_HIGHMEM
1434 select CPU_SUPPORTS_MSA
1436 select MIPS_O32_FP64_SUPPORT
1438 Choose this option to build a kernel for release 5 or later of the
1439 MIPS32 architecture. New MIPS processors, starting with the Warrior
1440 family, are based on a MIPS32r5 processor. If you own an older
1441 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1443 config CPU_MIPS32_R6
1444 bool "MIPS32 Release 6"
1445 depends on SYS_HAS_CPU_MIPS32_R6
1446 select CPU_HAS_PREFETCH
1447 select CPU_NO_LOAD_STORE_LR
1448 select CPU_SUPPORTS_32BIT_KERNEL
1449 select CPU_SUPPORTS_HIGHMEM
1450 select CPU_SUPPORTS_MSA
1452 select MIPS_O32_FP64_SUPPORT
1454 Choose this option to build a kernel for release 6 or later of the
1455 MIPS32 architecture. New MIPS processors, starting with the Warrior
1456 family, are based on a MIPS32r6 processor. If you own an older
1457 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1459 config CPU_MIPS64_R1
1460 bool "MIPS64 Release 1"
1461 depends on SYS_HAS_CPU_MIPS64_R1
1462 select CPU_HAS_PREFETCH
1463 select CPU_SUPPORTS_32BIT_KERNEL
1464 select CPU_SUPPORTS_64BIT_KERNEL
1465 select CPU_SUPPORTS_HIGHMEM
1466 select CPU_SUPPORTS_HUGEPAGES
1468 Choose this option to build a kernel for release 1 or later of the
1469 MIPS64 architecture. Many modern embedded systems with a 64-bit
1470 MIPS processor are based on a MIPS64 processor. If you know the
1471 specific type of processor in your system, choose those that one
1472 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1473 Release 2 of the MIPS64 architecture is available since several
1474 years so chances are you even have a MIPS64 Release 2 processor
1475 in which case you should choose CPU_MIPS64_R2 instead for better
1478 config CPU_MIPS64_R2
1479 bool "MIPS64 Release 2"
1480 depends on SYS_HAS_CPU_MIPS64_R2
1481 select CPU_HAS_PREFETCH
1482 select CPU_SUPPORTS_32BIT_KERNEL
1483 select CPU_SUPPORTS_64BIT_KERNEL
1484 select CPU_SUPPORTS_HIGHMEM
1485 select CPU_SUPPORTS_HUGEPAGES
1486 select CPU_SUPPORTS_MSA
1489 Choose this option to build a kernel for release 2 or later of the
1490 MIPS64 architecture. Many modern embedded systems with a 64-bit
1491 MIPS processor are based on a MIPS64 processor. If you know the
1492 specific type of processor in your system, choose those that one
1493 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1495 config CPU_MIPS64_R5
1496 bool "MIPS64 Release 5"
1497 depends on SYS_HAS_CPU_MIPS64_R5
1498 select CPU_HAS_PREFETCH
1499 select CPU_SUPPORTS_32BIT_KERNEL
1500 select CPU_SUPPORTS_64BIT_KERNEL
1501 select CPU_SUPPORTS_HIGHMEM
1502 select CPU_SUPPORTS_HUGEPAGES
1503 select CPU_SUPPORTS_MSA
1504 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1507 Choose this option to build a kernel for release 5 or later of the
1508 MIPS64 architecture. This is a intermediate MIPS architecture
1509 release partly implementing release 6 features. Though there is no
1510 any hardware known to be based on this release.
1512 config CPU_MIPS64_R6
1513 bool "MIPS64 Release 6"
1514 depends on SYS_HAS_CPU_MIPS64_R6
1515 select CPU_HAS_PREFETCH
1516 select CPU_NO_LOAD_STORE_LR
1517 select CPU_SUPPORTS_32BIT_KERNEL
1518 select CPU_SUPPORTS_64BIT_KERNEL
1519 select CPU_SUPPORTS_HIGHMEM
1520 select CPU_SUPPORTS_HUGEPAGES
1521 select CPU_SUPPORTS_MSA
1522 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1525 Choose this option to build a kernel for release 6 or later of the
1526 MIPS64 architecture. New MIPS processors, starting with the Warrior
1527 family, are based on a MIPS64r6 processor. If you own an older
1528 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1531 bool "MIPS Warrior P5600"
1532 depends on SYS_HAS_CPU_P5600
1533 select CPU_HAS_PREFETCH
1534 select CPU_SUPPORTS_32BIT_KERNEL
1535 select CPU_SUPPORTS_HIGHMEM
1536 select CPU_SUPPORTS_MSA
1537 select CPU_SUPPORTS_CPUFREQ
1538 select CPU_MIPSR2_IRQ_VI
1539 select CPU_MIPSR2_IRQ_EI
1541 select MIPS_O32_FP64_SUPPORT
1543 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1544 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1545 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1546 level features like up to six P5600 calculation cores, CM2 with L2
1547 cache, IOCU/IOMMU (though might be unused depending on the system-
1548 specific IP core configuration), GIC, CPC, virtualisation module,
1553 depends on SYS_HAS_CPU_R3000
1556 select CPU_SUPPORTS_32BIT_KERNEL
1557 select CPU_SUPPORTS_HIGHMEM
1559 Please make sure to pick the right CPU type. Linux/MIPS is not
1560 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1561 *not* work on R4000 machines and vice versa. However, since most
1562 of the supported machines have an R4000 (or similar) CPU, R4x00
1563 might be a safe bet. If the resulting kernel does not work,
1564 try to recompile with R3000.
1568 depends on SYS_HAS_CPU_R4300
1569 select CPU_SUPPORTS_32BIT_KERNEL
1570 select CPU_SUPPORTS_64BIT_KERNEL
1572 MIPS Technologies R4300-series processors.
1576 depends on SYS_HAS_CPU_R4X00
1577 select CPU_SUPPORTS_32BIT_KERNEL
1578 select CPU_SUPPORTS_64BIT_KERNEL
1579 select CPU_SUPPORTS_HUGEPAGES
1581 MIPS Technologies R4000-series processors other than 4300, including
1582 the R4000, R4400, R4600, and 4700.
1586 depends on SYS_HAS_CPU_TX49XX
1587 select CPU_HAS_PREFETCH
1588 select CPU_SUPPORTS_32BIT_KERNEL
1589 select CPU_SUPPORTS_64BIT_KERNEL
1590 select CPU_SUPPORTS_HUGEPAGES
1594 depends on SYS_HAS_CPU_R5000
1595 select CPU_SUPPORTS_32BIT_KERNEL
1596 select CPU_SUPPORTS_64BIT_KERNEL
1597 select CPU_SUPPORTS_HUGEPAGES
1599 MIPS Technologies R5000-series processors other than the Nevada.
1603 depends on SYS_HAS_CPU_R5500
1604 select CPU_SUPPORTS_32BIT_KERNEL
1605 select CPU_SUPPORTS_64BIT_KERNEL
1606 select CPU_SUPPORTS_HUGEPAGES
1608 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1613 depends on SYS_HAS_CPU_NEVADA
1614 select CPU_SUPPORTS_32BIT_KERNEL
1615 select CPU_SUPPORTS_64BIT_KERNEL
1616 select CPU_SUPPORTS_HUGEPAGES
1618 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1622 depends on SYS_HAS_CPU_R10000
1623 select CPU_HAS_PREFETCH
1624 select CPU_SUPPORTS_32BIT_KERNEL
1625 select CPU_SUPPORTS_64BIT_KERNEL
1626 select CPU_SUPPORTS_HIGHMEM
1627 select CPU_SUPPORTS_HUGEPAGES
1629 MIPS Technologies R10000-series processors.
1633 depends on SYS_HAS_CPU_RM7000
1634 select CPU_HAS_PREFETCH
1635 select CPU_SUPPORTS_32BIT_KERNEL
1636 select CPU_SUPPORTS_64BIT_KERNEL
1637 select CPU_SUPPORTS_HIGHMEM
1638 select CPU_SUPPORTS_HUGEPAGES
1642 depends on SYS_HAS_CPU_SB1
1643 select CPU_SUPPORTS_32BIT_KERNEL
1644 select CPU_SUPPORTS_64BIT_KERNEL
1645 select CPU_SUPPORTS_HIGHMEM
1646 select CPU_SUPPORTS_HUGEPAGES
1647 select WEAK_ORDERING
1649 config CPU_CAVIUM_OCTEON
1650 bool "Cavium Octeon processor"
1651 depends on SYS_HAS_CPU_CAVIUM_OCTEON
1652 select CPU_HAS_PREFETCH
1653 select CPU_SUPPORTS_64BIT_KERNEL
1654 select WEAK_ORDERING
1655 select CPU_SUPPORTS_HIGHMEM
1656 select CPU_SUPPORTS_HUGEPAGES
1657 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1658 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1659 select MIPS_L1_CACHE_SHIFT_7
1662 The Cavium Octeon processor is a highly integrated chip containing
1663 many ethernet hardware widgets for networking tasks. The processor
1664 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1665 Full details can be found at http://www.caviumnetworks.com.
1668 bool "Broadcom BMIPS"
1669 depends on SYS_HAS_CPU_BMIPS
1671 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1672 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1673 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1674 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1675 select CPU_SUPPORTS_32BIT_KERNEL
1676 select DMA_NONCOHERENT
1678 select SWAP_IO_SPACE
1679 select WEAK_ORDERING
1680 select CPU_SUPPORTS_HIGHMEM
1681 select CPU_HAS_PREFETCH
1682 select CPU_SUPPORTS_CPUFREQ
1683 select MIPS_EXTERNAL_TIMER
1684 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
1686 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1690 config CPU_MIPS32_3_5_FEATURES
1691 bool "MIPS32 Release 3.5 Features"
1692 depends on SYS_HAS_CPU_MIPS32_R3_5
1693 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1696 Choose this option to build a kernel for release 2 or later of the
1697 MIPS32 architecture including features from the 3.5 release such as
1698 support for Enhanced Virtual Addressing (EVA).
1700 config CPU_MIPS32_3_5_EVA
1701 bool "Enhanced Virtual Addressing (EVA)"
1702 depends on CPU_MIPS32_3_5_FEATURES
1706 Choose this option if you want to enable the Enhanced Virtual
1707 Addressing (EVA) on your MIPS32 core (such as proAptiv).
1708 One of its primary benefits is an increase in the maximum size
1709 of lowmem (up to 3GB). If unsure, say 'N' here.
1711 config CPU_MIPS32_R5_FEATURES
1712 bool "MIPS32 Release 5 Features"
1713 depends on SYS_HAS_CPU_MIPS32_R5
1714 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1716 Choose this option to build a kernel for release 2 or later of the
1717 MIPS32 architecture including features from release 5 such as
1718 support for Extended Physical Addressing (XPA).
1720 config CPU_MIPS32_R5_XPA
1721 bool "Extended Physical Addressing (XPA)"
1722 depends on CPU_MIPS32_R5_FEATURES
1724 depends on !PAGE_SIZE_4KB
1725 depends on SYS_SUPPORTS_HIGHMEM
1728 select PHYS_ADDR_T_64BIT
1731 Choose this option if you want to enable the Extended Physical
1732 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1733 benefit is to increase physical addressing equal to or greater
1734 than 40 bits. Note that this has the side effect of turning on
1735 64-bit addressing which in turn makes the PTEs 64-bit in size.
1736 If unsure, say 'N' here.
1739 config CPU_NOP_WORKAROUNDS
1742 config CPU_JUMP_WORKAROUNDS
1745 config CPU_LOONGSON2F_WORKAROUNDS
1746 bool "Loongson 2F Workarounds"
1748 select CPU_NOP_WORKAROUNDS
1749 select CPU_JUMP_WORKAROUNDS
1751 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1752 require workarounds. Without workarounds the system may hang
1753 unexpectedly. For more information please refer to the gas
1754 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1756 Loongson 2F03 and later have fixed these issues and no workarounds
1757 are needed. The workarounds have no significant side effect on them
1758 but may decrease the performance of the system so this option should
1759 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1762 If unsure, please say Y.
1763 endif # CPU_LOONGSON2F
1765 config SYS_SUPPORTS_ZBOOT
1767 select HAVE_KERNEL_GZIP
1768 select HAVE_KERNEL_BZIP2
1769 select HAVE_KERNEL_LZ4
1770 select HAVE_KERNEL_LZMA
1771 select HAVE_KERNEL_LZO
1772 select HAVE_KERNEL_XZ
1773 select HAVE_KERNEL_ZSTD
1775 config SYS_SUPPORTS_ZBOOT_UART16550
1777 select SYS_SUPPORTS_ZBOOT
1779 config SYS_SUPPORTS_ZBOOT_UART_PROM
1781 select SYS_SUPPORTS_ZBOOT
1783 config CPU_LOONGSON2EF
1785 select CPU_SUPPORTS_32BIT_KERNEL
1786 select CPU_SUPPORTS_64BIT_KERNEL
1787 select CPU_SUPPORTS_HIGHMEM
1788 select CPU_SUPPORTS_HUGEPAGES
1789 select ARCH_HAS_PHYS_TO_DMA
1791 config CPU_LOONGSON32
1795 select CPU_HAS_PREFETCH
1796 select CPU_SUPPORTS_32BIT_KERNEL
1797 select CPU_SUPPORTS_HIGHMEM
1798 select CPU_SUPPORTS_CPUFREQ
1800 config CPU_BMIPS32_3300
1801 select SMP_UP if SMP
1804 config CPU_BMIPS4350
1806 select SYS_SUPPORTS_SMP
1807 select SYS_SUPPORTS_HOTPLUG_CPU
1809 config CPU_BMIPS4380
1811 select MIPS_L1_CACHE_SHIFT_6
1812 select SYS_SUPPORTS_SMP
1813 select SYS_SUPPORTS_HOTPLUG_CPU
1816 config CPU_BMIPS5000
1818 select MIPS_CPU_SCACHE
1819 select MIPS_L1_CACHE_SHIFT_7
1820 select SYS_SUPPORTS_SMP
1821 select SYS_SUPPORTS_HOTPLUG_CPU
1824 config SYS_HAS_CPU_LOONGSON64
1826 select CPU_SUPPORTS_CPUFREQ
1829 config SYS_HAS_CPU_LOONGSON2E
1832 config SYS_HAS_CPU_LOONGSON2F
1834 select CPU_SUPPORTS_CPUFREQ
1835 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1837 config SYS_HAS_CPU_LOONGSON1B
1840 config SYS_HAS_CPU_LOONGSON1C
1843 config SYS_HAS_CPU_MIPS32_R1
1846 config SYS_HAS_CPU_MIPS32_R2
1849 config SYS_HAS_CPU_MIPS32_R3_5
1852 config SYS_HAS_CPU_MIPS32_R5
1854 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1856 config SYS_HAS_CPU_MIPS32_R6
1858 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1860 config SYS_HAS_CPU_MIPS64_R1
1863 config SYS_HAS_CPU_MIPS64_R2
1866 config SYS_HAS_CPU_MIPS64_R5
1868 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1870 config SYS_HAS_CPU_MIPS64_R6
1872 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1874 config SYS_HAS_CPU_P5600
1876 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1878 config SYS_HAS_CPU_R3000
1881 config SYS_HAS_CPU_R4300
1884 config SYS_HAS_CPU_R4X00
1887 config SYS_HAS_CPU_TX49XX
1890 config SYS_HAS_CPU_R5000
1893 config SYS_HAS_CPU_R5500
1896 config SYS_HAS_CPU_NEVADA
1899 config SYS_HAS_CPU_R10000
1901 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1903 config SYS_HAS_CPU_RM7000
1906 config SYS_HAS_CPU_SB1
1909 config SYS_HAS_CPU_CAVIUM_OCTEON
1912 config SYS_HAS_CPU_BMIPS
1915 config SYS_HAS_CPU_BMIPS32_3300
1917 select SYS_HAS_CPU_BMIPS
1919 config SYS_HAS_CPU_BMIPS4350
1921 select SYS_HAS_CPU_BMIPS
1923 config SYS_HAS_CPU_BMIPS4380
1925 select SYS_HAS_CPU_BMIPS
1927 config SYS_HAS_CPU_BMIPS5000
1929 select SYS_HAS_CPU_BMIPS
1930 select ARCH_HAS_SYNC_DMA_FOR_CPU
1933 # CPU may reorder R->R, R->W, W->R, W->W
1934 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
1936 config WEAK_ORDERING
1940 # CPU may reorder reads and writes beyond LL/SC
1941 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
1943 config WEAK_REORDERING_BEYOND_LLSC
1948 # These two indicate any level of the MIPS32 and MIPS64 architecture
1952 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
1953 CPU_MIPS32_R6 || CPU_P5600
1957 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
1958 CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
1961 # These indicate the revision of the architecture
1965 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
1969 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
1971 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
1976 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
1978 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
1983 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
1985 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
1986 select HAVE_ARCH_BITREVERSE
1987 select MIPS_ASID_BITS_VARIABLE
1988 select MIPS_CRC_SUPPORT
1991 config TARGET_ISA_REV
1993 default 1 if CPU_MIPSR1
1994 default 2 if CPU_MIPSR2
1995 default 5 if CPU_MIPSR5
1996 default 6 if CPU_MIPSR6
1999 Reflects the ISA revision being targeted by the kernel build. This
2000 is effectively the Kconfig equivalent of MIPS_ISA_REV.
2008 config SYS_SUPPORTS_32BIT_KERNEL
2010 config SYS_SUPPORTS_64BIT_KERNEL
2012 config CPU_SUPPORTS_32BIT_KERNEL
2014 config CPU_SUPPORTS_64BIT_KERNEL
2016 config CPU_SUPPORTS_CPUFREQ
2018 config CPU_SUPPORTS_ADDRWINCFG
2020 config CPU_SUPPORTS_HUGEPAGES
2022 depends on !(32BIT && (PHYS_ADDR_T_64BIT || EVA))
2023 config MIPS_PGD_C0_CONTEXT
2026 default y if (CPU_MIPSR2 || CPU_MIPSR6)
2029 # Set to y for ptrace access to watch registers.
2031 config HARDWARE_WATCHPOINTS
2033 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
2038 prompt "Kernel code model"
2040 You should only select this option if you have a workload that
2041 actually benefits from 64-bit processing or if your machine has
2042 large memory. You will only be presented a single option in this
2043 menu if your system does not support both 32-bit and 64-bit kernels.
2046 bool "32-bit kernel"
2047 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2050 Select this option if you want to build a 32-bit kernel.
2053 bool "64-bit kernel"
2054 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2056 Select this option if you want to build a 64-bit kernel.
2060 config MIPS_VA_BITS_48
2061 bool "48 bits virtual memory"
2064 Support a maximum at least 48 bits of application virtual
2065 memory. Default is 40 bits or less, depending on the CPU.
2066 For page sizes 16k and above, this option results in a small
2067 memory overhead for page tables. For 4k page size, a fourth
2068 level of page tables is added which imposes both a memory
2069 overhead as well as slower TLB fault handling.
2073 config ZBOOT_LOAD_ADDRESS
2074 hex "Compressed kernel load address"
2075 default 0xffffffff80400000 if BCM47XX
2077 depends on SYS_SUPPORTS_ZBOOT
2079 The address to load compressed kernel, aka vmlinuz.
2081 This is only used if non-zero.
2084 prompt "Kernel page size"
2085 default PAGE_SIZE_4KB
2087 config PAGE_SIZE_4KB
2089 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
2091 This option select the standard 4kB Linux page size. On some
2092 R3000-family processors this is the only available page size. Using
2093 4kB page size will minimize memory consumption and is therefore
2094 recommended for low memory systems.
2096 config PAGE_SIZE_8KB
2098 depends on CPU_CAVIUM_OCTEON
2099 depends on !MIPS_VA_BITS_48
2101 Using 8kB page size will result in higher performance kernel at
2102 the price of higher memory consumption. This option is available
2103 only on cnMIPS processors. Note that you will need a suitable Linux
2104 distribution to support this.
2106 config PAGE_SIZE_16KB
2108 depends on !CPU_R3000
2110 Using 16kB page size will result in higher performance kernel at
2111 the price of higher memory consumption. This option is available on
2112 all non-R3000 family processors. Note that you will need a suitable
2113 Linux distribution to support this.
2115 config PAGE_SIZE_32KB
2117 depends on CPU_CAVIUM_OCTEON
2118 depends on !MIPS_VA_BITS_48
2120 Using 32kB page size will result in higher performance kernel at
2121 the price of higher memory consumption. This option is available
2122 only on cnMIPS cores. Note that you will need a suitable Linux
2123 distribution to support this.
2125 config PAGE_SIZE_64KB
2127 depends on !CPU_R3000
2129 Using 64kB page size will result in higher performance kernel at
2130 the price of higher memory consumption. This option is available on
2131 all non-R3000 family processor. Not that at the time of this
2132 writing this option is still high experimental.
2136 config ARCH_FORCE_MAX_ORDER
2137 int "Maximum zone order"
2138 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2139 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2140 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2141 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2142 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2143 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2147 The kernel memory allocator divides physically contiguous memory
2148 blocks into "zones", where each zone is a power of two number of
2149 pages. This option selects the largest power of two that the kernel
2150 keeps in the memory allocator. If you need to allocate very large
2151 blocks of physically contiguous memory, then you may need to
2152 increase this value.
2154 This config option is actually maximum order plus one. For example,
2155 a value of 11 means that the largest free memory block is 2^10 pages.
2157 The page size is not necessarily 4KB. Keep this in mind
2158 when choosing a value for this option.
2163 config IP22_CPU_SCACHE
2168 # Support for a MIPS32 / MIPS64 style S-caches
2170 config MIPS_CPU_SCACHE
2174 config R5000_CPU_SCACHE
2178 config RM7000_CPU_SCACHE
2182 config SIBYTE_DMA_PAGEOPS
2183 bool "Use DMA to clear/copy pages"
2186 Instead of using the CPU to zero and copy pages, use a Data Mover
2187 channel. These DMA channels are otherwise unused by the standard
2188 SiByte Linux port. Seems to give a small performance benefit.
2190 config CPU_HAS_PREFETCH
2193 config CPU_GENERIC_DUMP_TLB
2195 default y if !CPU_R3000
2197 config MIPS_FP_SUPPORT
2198 bool "Floating Point support" if EXPERT
2201 Select y to include support for floating point in the kernel
2202 including initialization of FPU hardware, FP context save & restore
2203 and emulation of an FPU where necessary. Without this support any
2204 userland program attempting to use floating point instructions will
2207 If you know that your userland will not attempt to use floating point
2208 instructions then you can say n here to shrink the kernel a little.
2212 config CPU_R2300_FPU
2214 depends on MIPS_FP_SUPPORT
2215 default y if CPU_R3000
2222 depends on MIPS_FP_SUPPORT
2223 default y if !CPU_R2300_FPU
2225 config CPU_R4K_CACHE_TLB
2227 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2230 bool "MIPS MT SMP support (1 TC on each available VPE)"
2232 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
2233 select CPU_MIPSR2_IRQ_VI
2234 select CPU_MIPSR2_IRQ_EI
2239 select SYS_SUPPORTS_SMP
2240 select SYS_SUPPORTS_SCHED_SMT
2241 select MIPS_PERF_SHARED_TC_COUNTERS
2243 This is a kernel model which is known as SMVP. This is supported
2244 on cores with the MT ASE and uses the available VPEs to implement
2245 virtual processors which supports SMP. This is equivalent to the
2246 Intel Hyperthreading feature. For further information go to
2247 <http://www.imgtec.com/mips/mips-multithreading.asp>.
2253 bool "SMT (multithreading) scheduler support"
2254 depends on SYS_SUPPORTS_SCHED_SMT
2257 SMT scheduler support improves the CPU scheduler's decision making
2258 when dealing with MIPS MT enabled cores at a cost of slightly
2259 increased overhead in some places. If unsure say N here.
2261 config SYS_SUPPORTS_SCHED_SMT
2264 config SYS_SUPPORTS_MULTITHREADING
2267 config MIPS_MT_FPAFF
2268 bool "Dynamic FPU affinity for FP-intensive threads"
2270 depends on MIPS_MT_SMP
2272 config MIPSR2_TO_R6_EMULATOR
2273 bool "MIPS R2-to-R6 emulator"
2274 depends on CPU_MIPSR6
2275 depends on MIPS_FP_SUPPORT
2278 Choose this option if you want to run non-R6 MIPS userland code.
2279 Even if you say 'Y' here, the emulator will still be disabled by
2280 default. You can enable it using the 'mipsr2emu' kernel option.
2281 The only reason this is a build-time option is to save ~14K from the
2284 config SYS_SUPPORTS_VPE_LOADER
2286 depends on SYS_SUPPORTS_MULTITHREADING
2288 Indicates that the platform supports the VPE loader, and provides
2291 config MIPS_VPE_LOADER
2292 bool "VPE loader support."
2293 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2294 select CPU_MIPSR2_IRQ_VI
2295 select CPU_MIPSR2_IRQ_EI
2298 Includes a loader for loading an elf relocatable object
2299 onto another VPE and running it.
2301 config MIPS_VPE_LOADER_CMP
2304 depends on MIPS_VPE_LOADER && MIPS_CMP
2306 config MIPS_VPE_LOADER_MT
2309 depends on MIPS_VPE_LOADER && !MIPS_CMP
2311 config MIPS_VPE_LOADER_TOM
2312 bool "Load VPE program into memory hidden from linux"
2313 depends on MIPS_VPE_LOADER
2316 The loader can use memory that is present but has been hidden from
2317 Linux using the kernel command line option "mem=xxMB". It's up to
2318 you to ensure the amount you put in the option and the space your
2319 program requires is less or equal to the amount physically present.
2321 config MIPS_VPE_APSP_API
2322 bool "Enable support for AP/SP API (RTLX)"
2323 depends on MIPS_VPE_LOADER
2325 config MIPS_VPE_APSP_API_CMP
2328 depends on MIPS_VPE_APSP_API && MIPS_CMP
2330 config MIPS_VPE_APSP_API_MT
2333 depends on MIPS_VPE_APSP_API && !MIPS_CMP
2336 bool "MIPS CMP framework support (DEPRECATED)"
2337 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2340 select SYS_SUPPORTS_SMP
2341 select WEAK_ORDERING
2344 Select this if you are using a bootloader which implements the "CMP
2345 framework" protocol (ie. YAMON) and want your kernel to make use of
2346 its ability to start secondary CPUs.
2348 Unless you have a specific need, you should use CONFIG_MIPS_CPS
2352 bool "MIPS Coherent Processing System support"
2353 depends on SYS_SUPPORTS_MIPS_CPS
2355 select MIPS_CPS_PM if HOTPLUG_CPU
2357 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2358 select SYS_SUPPORTS_HOTPLUG_CPU
2359 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2360 select SYS_SUPPORTS_SMP
2361 select WEAK_ORDERING
2362 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
2364 Select this if you wish to run an SMP kernel across multiple cores
2365 within a MIPS Coherent Processing System. When this option is
2366 enabled the kernel will probe for other cores and boot them with
2367 no external assistance. It is safe to enable this when hardware
2368 support is unavailable.
2381 config SB1_PASS_2_WORKAROUNDS
2383 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2386 config SB1_PASS_2_1_WORKAROUNDS
2388 depends on CPU_SB1 && CPU_SB1_PASS_2
2392 prompt "SmartMIPS or microMIPS ASE support"
2394 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2397 Select this if you want neither microMIPS nor SmartMIPS support
2399 config CPU_HAS_SMARTMIPS
2400 depends on SYS_SUPPORTS_SMARTMIPS
2403 SmartMIPS is a extension of the MIPS32 architecture aimed at
2404 increased security at both hardware and software level for
2405 smartcards. Enabling this option will allow proper use of the
2406 SmartMIPS instructions by Linux applications. However a kernel with
2407 this option will not work on a MIPS core without SmartMIPS core. If
2408 you don't know you probably don't have SmartMIPS and should say N
2411 config CPU_MICROMIPS
2412 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2415 When this option is enabled the kernel will be built using the
2421 bool "Support for the MIPS SIMD Architecture"
2422 depends on CPU_SUPPORTS_MSA
2423 depends on MIPS_FP_SUPPORT
2424 depends on 64BIT || MIPS_O32_FP64_SUPPORT
2426 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2427 and a set of SIMD instructions to operate on them. When this option
2428 is enabled the kernel will support allocating & switching MSA
2429 vector register contexts. If you know that your kernel will only be
2430 running on CPUs which do not support MSA or that your userland will
2431 not be making use of it then you may wish to say N here to reduce
2432 the size & complexity of your kernel.
2443 depends on !CPU_DIEI_BROKEN
2446 config CPU_DIEI_BROKEN
2452 config CPU_NO_LOAD_STORE_LR
2455 CPU lacks support for unaligned load and store instructions:
2456 LWL, LWR, SWL, SWR (Load/store word left/right).
2457 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2461 # Vectored interrupt mode is an R2 feature
2463 config CPU_MIPSR2_IRQ_VI
2467 # Extended interrupt mode is an R2 feature
2469 config CPU_MIPSR2_IRQ_EI
2474 depends on !CPU_R3000
2481 # Work around the "daddi" and "daddiu" CPU errata:
2483 # - The `daddi' instruction fails to trap on overflow.
2484 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2487 # - The `daddiu' instruction can produce an incorrect result.
2488 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2490 # "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
2492 # "MIPS R4400PC/SC Errata, Processor Revision 1.0", erratum #7
2493 # "MIPS R4400MC Errata, Processor Revision 1.0", erratum #5
2494 config CPU_DADDI_WORKAROUNDS
2497 # Work around certain R4000 CPU errata (as implemented by GCC):
2499 # - A double-word or a variable shift may give an incorrect result
2500 # if executed immediately after starting an integer division:
2501 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2503 # "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
2506 # - A double-word or a variable shift may give an incorrect result
2507 # if executed while an integer multiplication is in progress:
2508 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2511 # - An integer division may give an incorrect result if started in
2512 # a delay slot of a taken branch or a jump:
2513 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2515 config CPU_R4000_WORKAROUNDS
2517 select CPU_R4400_WORKAROUNDS
2519 # Work around certain R4400 CPU errata (as implemented by GCC):
2521 # - A double-word or a variable shift may give an incorrect result
2522 # if executed immediately after starting an integer division:
2523 # "MIPS R4400MC Errata, Processor Revision 1.0", erratum #10
2524 # "MIPS R4400MC Errata, Processor Revision 2.0 & 3.0", erratum #4
2525 config CPU_R4400_WORKAROUNDS
2528 config CPU_R4X00_BUGS64
2530 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2532 config MIPS_ASID_SHIFT
2534 default 6 if CPU_R3000
2537 config MIPS_ASID_BITS
2539 default 0 if MIPS_ASID_BITS_VARIABLE
2540 default 6 if CPU_R3000
2543 config MIPS_ASID_BITS_VARIABLE
2546 config MIPS_CRC_SUPPORT
2549 # R4600 erratum. Due to the lack of errata information the exact
2550 # technical details aren't known. I've experimentally found that disabling
2551 # interrupts during indexed I-cache flushes seems to be sufficient to deal
2553 config WAR_R4600_V1_INDEX_ICACHEOP
2556 # Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
2558 # 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2559 # Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2560 # executed if there is no other dcache activity. If the dcache is
2561 # accessed for another instruction immediately preceding when these
2562 # cache instructions are executing, it is possible that the dcache
2563 # tag match outputs used by these cache instructions will be
2564 # incorrect. These cache instructions should be preceded by at least
2565 # four instructions that are not any kind of load or store
2568 # This is not allowed: lw
2572 # cache Hit_Writeback_Invalidate_D
2574 # This is allowed: lw
2579 # cache Hit_Writeback_Invalidate_D
2580 config WAR_R4600_V1_HIT_CACHEOP
2583 # Writeback and invalidate the primary cache dcache before DMA.
2585 # R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2586 # Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2587 # operate correctly if the internal data cache refill buffer is empty. These
2588 # CACHE instructions should be separated from any potential data cache miss
2589 # by a load instruction to an uncached address to empty the response buffer."
2590 # (Revision 2.0 device errata from IDT available on https://www.idt.com/
2592 config WAR_R4600_V2_HIT_CACHEOP
2595 # From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2596 # the line which this instruction itself exists, the following
2597 # operation is not guaranteed."
2599 # Workaround: do two phase flushing for Index_Invalidate_I
2600 config WAR_TX49XX_ICACHE_INDEX_INV
2603 # The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2604 # opposes it being called that) where invalid instructions in the same
2605 # I-cache line worth of instructions being fetched may case spurious
2607 config WAR_ICACHE_REFILLS
2610 # On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2611 # may cause ll / sc and lld / scd sequences to execute non-atomically.
2612 config WAR_R10000_LLSC
2615 # 34K core erratum: "Problems Executing the TLBR Instruction"
2616 config WAR_MIPS34K_MISSED_ITLB
2620 # - Highmem only makes sense for the 32-bit kernel.
2621 # - The current highmem code will only work properly on physically indexed
2622 # caches such as R3000, SB1, R7000 or those that look like they're virtually
2623 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2624 # moment we protect the user and offer the highmem option only on machines
2625 # where it's known to be safe. This will not offer highmem on a few systems
2626 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2627 # indexed CPUs but we're playing safe.
2628 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2629 # know they might have memory configurations that could make use of highmem
2633 bool "High Memory Support"
2634 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2637 config CPU_SUPPORTS_HIGHMEM
2640 config SYS_SUPPORTS_HIGHMEM
2643 config SYS_SUPPORTS_SMARTMIPS
2646 config SYS_SUPPORTS_MICROMIPS
2649 config SYS_SUPPORTS_MIPS16
2652 This option must be set if a kernel might be executed on a MIPS16-
2653 enabled CPU even if MIPS16 is not actually being used. In other
2654 words, it makes the kernel MIPS16-tolerant.
2656 config CPU_SUPPORTS_MSA
2659 config ARCH_FLATMEM_ENABLE
2661 depends on !NUMA && !CPU_LOONGSON2EF
2663 config ARCH_SPARSEMEM_ENABLE
2668 depends on SYS_SUPPORTS_NUMA
2670 select HAVE_SETUP_PER_CPU_AREA
2671 select NEED_PER_CPU_EMBED_FIRST_CHUNK
2673 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2674 Access). This option improves performance on systems with more
2675 than two nodes; on two node systems it is generally better to
2676 leave it disabled; on single node systems leave this option
2679 config SYS_SUPPORTS_NUMA
2682 config HAVE_ARCH_NODEDATA_EXTENSION
2686 bool "Relocatable kernel"
2687 depends on SYS_SUPPORTS_RELOCATABLE
2688 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2689 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2690 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
2691 CPU_P5600 || CAVIUM_OCTEON_SOC || \
2694 This builds a kernel image that retains relocation information
2695 so it can be loaded someplace besides the default 1MB.
2696 The relocations make the kernel binary about 15% larger,
2697 but are discarded at runtime
2699 config RELOCATION_TABLE_SIZE
2700 hex "Relocation table size"
2701 depends on RELOCATABLE
2702 range 0x0 0x01000000
2703 default "0x00200000" if CPU_LOONGSON64
2704 default "0x00100000"
2706 A table of relocation data will be appended to the kernel binary
2707 and parsed at boot to fix up the relocated kernel.
2709 This option allows the amount of space reserved for the table to be
2710 adjusted, although the default of 1Mb should be ok in most cases.
2712 The build will fail and a valid size suggested if this is too small.
2714 If unsure, leave at the default value.
2716 config RANDOMIZE_BASE
2717 bool "Randomize the address of the kernel image"
2718 depends on RELOCATABLE
2720 Randomizes the physical and virtual address at which the
2721 kernel image is loaded, as a security feature that
2722 deters exploit attempts relying on knowledge of the location
2723 of kernel internals.
2725 Entropy is generated using any coprocessor 0 registers available.
2727 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2731 config RANDOMIZE_BASE_MAX_OFFSET
2732 hex "Maximum kASLR offset" if EXPERT
2733 depends on RANDOMIZE_BASE
2734 range 0x0 0x40000000 if EVA || 64BIT
2735 range 0x0 0x08000000
2736 default "0x01000000"
2738 When kASLR is active, this provides the maximum offset that will
2739 be applied to the kernel image. It should be set according to the
2740 amount of physical RAM available in the target system minus
2741 PHYSICAL_START and must be a power of 2.
2743 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2744 EVA or 64-bit. The default is 16Mb.
2751 config HW_PERF_EVENTS
2752 bool "Enable hardware performance counter support for perf events"
2753 depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_LOONGSON64)
2756 Enable hardware performance counter support for perf events. If
2757 disabled, perf events will use software events only.
2760 bool "Enable DMI scanning"
2761 depends on MACH_LOONGSON64
2762 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2765 Enabled scanning of DMI to identify machine quirks. Say Y
2766 here unless you have verified that your setup is not
2767 affected by entries in the DMI blacklist. Required by PNP
2771 bool "Multi-Processing support"
2772 depends on SYS_SUPPORTS_SMP
2774 This enables support for systems with more than one CPU. If you have
2775 a system with only one CPU, say N. If you have a system with more
2776 than one CPU, say Y.
2778 If you say N here, the kernel will run on uni- and multiprocessor
2779 machines, but will use only one CPU of a multiprocessor machine. If
2780 you say Y here, the kernel will run on many, but not all,
2781 uniprocessor machines. On a uniprocessor machine, the kernel
2782 will run faster if you say N here.
2784 People using multiprocessor machines who say Y here should also say
2785 Y to "Enhanced Real Time Clock Support", below.
2787 See also the SMP-HOWTO available at
2788 <https://www.tldp.org/docs.html#howto>.
2790 If you don't know what to do here, say N.
2793 bool "Support for hot-pluggable CPUs"
2794 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2796 Say Y here to allow turning CPUs off and on. CPUs can be
2797 controlled through /sys/devices/system/cpu.
2798 (Note: power management support will enable this option
2799 automatically on SMP systems. )
2800 Say N if you want to disable CPU hotplug.
2805 config SYS_SUPPORTS_MIPS_CMP
2808 config SYS_SUPPORTS_MIPS_CPS
2811 config SYS_SUPPORTS_SMP
2814 config NR_CPUS_DEFAULT_4
2817 config NR_CPUS_DEFAULT_8
2820 config NR_CPUS_DEFAULT_16
2823 config NR_CPUS_DEFAULT_32
2826 config NR_CPUS_DEFAULT_64
2830 int "Maximum number of CPUs (2-256)"
2833 default "4" if NR_CPUS_DEFAULT_4
2834 default "8" if NR_CPUS_DEFAULT_8
2835 default "16" if NR_CPUS_DEFAULT_16
2836 default "32" if NR_CPUS_DEFAULT_32
2837 default "64" if NR_CPUS_DEFAULT_64
2839 This allows you to specify the maximum number of CPUs which this
2840 kernel will support. The maximum supported value is 32 for 32-bit
2841 kernel and 64 for 64-bit kernels; the minimum value which makes
2842 sense is 1 for Qemu (useful only for kernel debugging purposes)
2843 and 2 for all others.
2845 This is purely to save memory - each supported CPU adds
2846 approximately eight kilobytes to the kernel image. For best
2847 performance should round up your number of processors to the next
2850 config MIPS_PERF_SHARED_TC_COUNTERS
2853 config MIPS_NR_CPU_NR_MAP_1024
2856 config MIPS_NR_CPU_NR_MAP
2859 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2860 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2863 # Timer Interrupt Frequency Configuration
2867 prompt "Timer frequency"
2870 Allows the configuration of the timer frequency.
2873 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2876 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2879 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2882 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2885 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2888 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2891 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2894 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2898 config SYS_SUPPORTS_24HZ
2901 config SYS_SUPPORTS_48HZ
2904 config SYS_SUPPORTS_100HZ
2907 config SYS_SUPPORTS_128HZ
2910 config SYS_SUPPORTS_250HZ
2913 config SYS_SUPPORTS_256HZ
2916 config SYS_SUPPORTS_1000HZ
2919 config SYS_SUPPORTS_1024HZ
2922 config SYS_SUPPORTS_ARBIT_HZ
2924 default y if !SYS_SUPPORTS_24HZ && \
2925 !SYS_SUPPORTS_48HZ && \
2926 !SYS_SUPPORTS_100HZ && \
2927 !SYS_SUPPORTS_128HZ && \
2928 !SYS_SUPPORTS_250HZ && \
2929 !SYS_SUPPORTS_256HZ && \
2930 !SYS_SUPPORTS_1000HZ && \
2931 !SYS_SUPPORTS_1024HZ
2937 default 100 if HZ_100
2938 default 128 if HZ_128
2939 default 250 if HZ_250
2940 default 256 if HZ_256
2941 default 1000 if HZ_1000
2942 default 1024 if HZ_1024
2945 def_bool HIGH_RES_TIMERS
2948 bool "Kexec system call"
2951 kexec is a system call that implements the ability to shutdown your
2952 current kernel, and to start another kernel. It is like a reboot
2953 but it is independent of the system firmware. And like a reboot
2954 you can start any kernel with it, not just Linux.
2956 The name comes from the similarity to the exec system call.
2958 It is an ongoing process to be certain the hardware in a machine
2959 is properly shutdown, so do not be surprised if this code does not
2960 initially work for you. As of this writing the exact hardware
2961 interface is strongly in flux, so no good recommendation can be
2965 bool "Kernel crash dumps"
2967 Generate crash dump after being started by kexec.
2968 This should be normally only set in special crash dump kernels
2969 which are loaded in the main kernel with kexec-tools into
2970 a specially reserved region and then later executed after
2971 a crash by kdump/kexec. The crash dump kernel must be compiled
2972 to a memory address not used by the main kernel or firmware using
2975 config PHYSICAL_START
2976 hex "Physical address where the kernel is loaded"
2977 default "0xffffffff84000000"
2978 depends on CRASH_DUMP
2980 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
2981 If you plan to use kernel for capturing the crash dump change
2982 this value to start of the reserved region (the "X" value as
2983 specified in the "crashkernel=YM@XM" command line boot parameter
2984 passed to the panic-ed kernel).
2986 config MIPS_O32_FP64_SUPPORT
2987 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
2988 depends on 32BIT || MIPS32_O32
2990 When this is enabled, the kernel will support use of 64-bit floating
2991 point registers with binaries using the O32 ABI along with the
2992 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
2993 32-bit MIPS systems this support is at the cost of increasing the
2994 size and complexity of the compiled FPU emulator. Thus if you are
2995 running a MIPS32 system and know that none of your userland binaries
2996 will require 64-bit floating point, you may wish to reduce the size
2997 of your kernel & potentially improve FP emulation performance by
3000 Although binutils currently supports use of this flag the details
3001 concerning its effect upon the O32 ABI in userland are still being
3002 worked on. In order to avoid userland becoming dependent upon current
3003 behaviour before the details have been finalised, this option should
3004 be considered experimental and only enabled by those working upon
3012 select OF_EARLY_FLATTREE
3022 prompt "Kernel appended dtb support" if USE_OF
3023 default MIPS_NO_APPENDED_DTB
3025 config MIPS_NO_APPENDED_DTB
3028 Do not enable appended dtb support.
3030 config MIPS_ELF_APPENDED_DTB
3033 With this option, the boot code will look for a device tree binary
3034 DTB) included in the vmlinux ELF section .appended_dtb. By default
3035 it is empty and the DTB can be appended using binutils command
3038 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
3040 This is meant as a backward compatibility convenience for those
3041 systems with a bootloader that can't be upgraded to accommodate
3042 the documented boot protocol using a device tree.
3044 config MIPS_RAW_APPENDED_DTB
3045 bool "vmlinux.bin or vmlinuz.bin"
3047 With this option, the boot code will look for a device tree binary
3048 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
3049 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
3051 This is meant as a backward compatibility convenience for those
3052 systems with a bootloader that can't be upgraded to accommodate
3053 the documented boot protocol using a device tree.
3055 Beware that there is very little in terms of protection against
3056 this option being confused by leftover garbage in memory that might
3057 look like a DTB header after a reboot if no actual DTB is appended
3058 to vmlinux.bin. Do not leave this option active in a production kernel
3059 if you don't intend to always append a DTB.
3063 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
3064 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
3065 !MACH_LOONGSON64 && !MIPS_MALTA && \
3067 default MIPS_CMDLINE_FROM_BOOTLOADER
3069 config MIPS_CMDLINE_FROM_DTB
3071 bool "Dtb kernel arguments if available"
3073 config MIPS_CMDLINE_DTB_EXTEND
3075 bool "Extend dtb kernel arguments with bootloader arguments"
3077 config MIPS_CMDLINE_FROM_BOOTLOADER
3078 bool "Bootloader kernel arguments if available"
3080 config MIPS_CMDLINE_BUILTIN_EXTEND
3081 depends on CMDLINE_BOOL
3082 bool "Extend builtin kernel arguments with bootloader arguments"
3087 config LOCKDEP_SUPPORT
3091 config STACKTRACE_SUPPORT
3095 config PGTABLE_LEVELS
3097 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3098 default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48)
3101 config MIPS_AUTO_PFN_OFFSET
3104 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3106 config PCI_DRIVERS_GENERIC
3107 select PCI_DOMAINS_GENERIC if PCI
3110 config PCI_DRIVERS_LEGACY
3111 def_bool !PCI_DRIVERS_GENERIC
3112 select NO_GENERIC_PCI_IOPORT_MAP
3113 select PCI_DOMAINS if PCI
3116 # ISA support is now enabled via select. Too many systems still have the one
3117 # or other ISA chip on the board that users don't know about so don't expect
3118 # users to choose the right thing ...
3124 bool "TURBOchannel support"
3125 depends on MACH_DECSTATION
3127 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3128 processors. TURBOchannel programming specifications are available
3130 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3132 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3133 Linux driver support status is documented at:
3134 <http://www.linux-mips.org/wiki/DECstation>
3140 config ARCH_MMAP_RND_BITS_MIN
3144 config ARCH_MMAP_RND_BITS_MAX
3148 config ARCH_MMAP_RND_COMPAT_BITS_MIN
3151 config ARCH_MMAP_RND_COMPAT_BITS_MAX
3158 select MIPS_EXTERNAL_TIMER
3164 config MIPS32_COMPAT
3171 bool "Kernel support for o32 binaries"
3173 select ARCH_WANT_OLD_COMPAT_IPC
3175 select MIPS32_COMPAT
3177 Select this option if you want to run o32 binaries. These are pure
3178 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3179 existing binaries are in this format.
3184 bool "Kernel support for n32 binaries"
3186 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3188 select MIPS32_COMPAT
3190 Select this option if you want to run n32 binaries. These are
3191 64-bit binaries using 32-bit quantities for addressing and certain
3192 data that would normally be 64-bit. They are used in special
3197 config CC_HAS_MNO_BRANCH_LIKELY
3199 depends on $(cc-option,-mno-branch-likely)
3201 # https://github.com/llvm/llvm-project/issues/61045
3202 config CC_HAS_BROKEN_INLINE_COMPAT_BRANCH
3203 def_bool y if CC_IS_CLANG
3205 menu "Power management options"
3207 config ARCH_HIBERNATION_POSSIBLE
3209 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3211 config ARCH_SUSPEND_POSSIBLE
3213 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3215 source "kernel/power/Kconfig"
3219 config MIPS_EXTERNAL_TIMER
3222 menu "CPU Power Management"
3224 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3225 source "drivers/cpufreq/Kconfig"
3226 endif # CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3228 source "drivers/cpuidle/Kconfig"
3232 source "arch/mips/kvm/Kconfig"
3234 source "arch/mips/vdso/Kconfig"