1 # SPDX-License-Identifier: GPL-2.0
5 select ARCH_32BIT_OFF_T if !64BIT
6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7 select ARCH_HAS_CURRENT_STACK_POINTER if !CC_IS_CLANG || CLANG_VERSION >= 140000
8 select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
9 select ARCH_HAS_FORTIFY_SOURCE
11 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
12 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
13 select ARCH_HAS_STRNCPY_FROM_USER
14 select ARCH_HAS_STRNLEN_USER
15 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
16 select ARCH_HAS_UBSAN_SANITIZE_ALL
17 select ARCH_HAS_GCOV_PROFILE_ALL
18 select ARCH_KEEP_MEMBLOCK
19 select ARCH_SUPPORTS_UPROBES
20 select ARCH_USE_BUILTIN_BSWAP
21 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
22 select ARCH_USE_MEMTEST
23 select ARCH_USE_QUEUED_RWLOCKS
24 select ARCH_USE_QUEUED_SPINLOCKS
25 select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES
26 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
27 select ARCH_WANT_IPC_PARSE_VERSION
28 select ARCH_WANT_LD_ORPHAN_WARN
29 select BUILDTIME_TABLE_SORT
30 select CLONE_BACKWARDS
31 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
32 select CPU_PM if CPU_IDLE
33 select GENERIC_ATOMIC64 if !64BIT
34 select GENERIC_CMOS_UPDATE
35 select GENERIC_CPU_AUTOPROBE
36 select GENERIC_GETTIMEOFDAY
38 select GENERIC_IRQ_PROBE
39 select GENERIC_IRQ_SHOW
40 select GENERIC_ISA_DMA if EISA
41 select GENERIC_LIB_ASHLDI3
42 select GENERIC_LIB_ASHRDI3
43 select GENERIC_LIB_CMPDI2
44 select GENERIC_LIB_LSHRDI3
45 select GENERIC_LIB_UCMPDI2
46 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
47 select GENERIC_SMP_IDLE_THREAD
48 select GENERIC_TIME_VSYSCALL
49 select GUP_GET_PXX_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
50 select HAS_IOPORT if !NO_IOPORT_MAP || ISA
51 select HAVE_ARCH_COMPILER_H
52 select HAVE_ARCH_JUMP_LABEL
53 select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
54 select HAVE_ARCH_MMAP_RND_BITS if MMU
55 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
56 select HAVE_ARCH_SECCOMP_FILTER
57 select HAVE_ARCH_TRACEHOOK
58 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
59 select HAVE_ASM_MODVERSIONS
60 select HAVE_CONTEXT_TRACKING_USER
62 select HAVE_C_RECORDMCOUNT
63 select HAVE_DEBUG_KMEMLEAK
64 select HAVE_DEBUG_STACKOVERFLOW
65 select HAVE_DMA_CONTIGUOUS
66 select HAVE_DYNAMIC_FTRACE
67 select HAVE_EBPF_JIT if !CPU_MICROMIPS && \
68 !CPU_DADDI_WORKAROUNDS && \
69 !CPU_R4000_WORKAROUNDS && \
70 !CPU_R4400_WORKAROUNDS
71 select HAVE_EXIT_THREAD
73 select HAVE_FTRACE_MCOUNT_RECORD
74 select HAVE_FUNCTION_GRAPH_TRACER
75 select HAVE_FUNCTION_TRACER
76 select HAVE_GCC_PLUGINS
77 select HAVE_GENERIC_VDSO
78 select HAVE_IOREMAP_PROT
79 select HAVE_IRQ_EXIT_ON_IRQ_STACK
80 select HAVE_IRQ_TIME_ACCOUNTING
82 select HAVE_KRETPROBES
83 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
84 select HAVE_MOD_ARCH_SPECIFIC
86 select HAVE_PERF_EVENTS
88 select HAVE_PERF_USER_STACK_DUMP
89 select HAVE_REGS_AND_STACK_ACCESS_API
91 select HAVE_SPARSE_SYSCALL_NR
92 select HAVE_STACKPROTECTOR
93 select HAVE_SYSCALL_TRACEPOINTS
94 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
95 select IRQ_FORCED_THREADING
97 select MODULES_USE_ELF_REL if MODULES
98 select MODULES_USE_ELF_RELA if MODULES && 64BIT
99 select PERF_USE_VMALLOC
100 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
102 select SYSCTL_EXCEPTION_TRACE
103 select TRACE_IRQFLAGS_SUPPORT
104 select ARCH_HAS_ELFCORE_COMPAT
105 select HAVE_ARCH_KCSAN if 64BIT
107 config MIPS_FIXUP_BIGPHYS_ADDR
115 select SYS_SUPPORTS_32BIT_KERNEL
116 select SYS_SUPPORTS_LITTLE_ENDIAN
117 select SYS_SUPPORTS_ZBOOT
118 select DMA_NONCOHERENT
119 select ARCH_HAS_SYNC_DMA_FOR_CPU
124 select GENERIC_IRQ_CHIP
125 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
127 select CPU_SUPPORTS_CPUFREQ
128 select MIPS_EXTERNAL_TIMER
130 menu "Machine selection"
134 default MIPS_GENERIC_KERNEL
136 config MIPS_GENERIC_KERNEL
137 bool "Generic board-agnostic MIPS kernel"
138 select ARCH_HAS_SETUP_DMA_OPS
143 select CLKSRC_MIPS_GIC
145 select CPU_MIPSR2_IRQ_EI
146 select CPU_MIPSR2_IRQ_VI
148 select DMA_NONCOHERENT
151 select MIPS_AUTO_PFN_OFFSET
152 select MIPS_CPU_SCACHE
154 select MIPS_L1_CACHE_SHIFT_7
155 select NO_EXCEPT_FILL
156 select PCI_DRIVERS_GENERIC
159 select SYS_HAS_CPU_MIPS32_R1
160 select SYS_HAS_CPU_MIPS32_R2
161 select SYS_HAS_CPU_MIPS32_R6
162 select SYS_HAS_CPU_MIPS64_R1
163 select SYS_HAS_CPU_MIPS64_R2
164 select SYS_HAS_CPU_MIPS64_R6
165 select SYS_SUPPORTS_32BIT_KERNEL
166 select SYS_SUPPORTS_64BIT_KERNEL
167 select SYS_SUPPORTS_BIG_ENDIAN
168 select SYS_SUPPORTS_HIGHMEM
169 select SYS_SUPPORTS_LITTLE_ENDIAN
170 select SYS_SUPPORTS_MICROMIPS
171 select SYS_SUPPORTS_MIPS16
172 select SYS_SUPPORTS_MIPS_CPS
173 select SYS_SUPPORTS_MULTITHREADING
174 select SYS_SUPPORTS_RELOCATABLE
175 select SYS_SUPPORTS_SMARTMIPS
176 select SYS_SUPPORTS_ZBOOT
178 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
179 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
180 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
181 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
182 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
183 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
186 Select this to build a kernel which aims to support multiple boards,
187 generally using a flattened device tree passed from the bootloader
188 using the boot protocol defined in the UHI (Unified Hosting
189 Interface) specification.
192 bool "Alchemy processor based machines"
193 select PHYS_ADDR_T_64BIT
197 select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is
198 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
199 select SYS_HAS_CPU_MIPS32_R1
200 select SYS_SUPPORTS_32BIT_KERNEL
201 select SYS_SUPPORTS_APM_EMULATION
203 select SYS_SUPPORTS_ZBOOT
207 bool "Texas Instruments AR7"
210 select DMA_NONCOHERENT
214 select NO_EXCEPT_FILL
216 select SYS_HAS_CPU_MIPS32_R1
217 select SYS_HAS_EARLY_PRINTK
218 select SYS_SUPPORTS_32BIT_KERNEL
219 select SYS_SUPPORTS_LITTLE_ENDIAN
220 select SYS_SUPPORTS_MIPS16
221 select SYS_SUPPORTS_ZBOOT_UART16550
225 Support for the Texas Instruments AR7 System-on-a-Chip
226 family: TNETD7100, 7200 and 7300.
229 bool "Atheros AR231x/AR531x SoC support"
232 select DMA_NONCOHERENT
235 select SYS_HAS_CPU_MIPS32_R1
236 select SYS_SUPPORTS_BIG_ENDIAN
237 select SYS_SUPPORTS_32BIT_KERNEL
238 select SYS_HAS_EARLY_PRINTK
240 Support for Atheros AR231x and Atheros AR531x based boards
243 bool "Atheros AR71XX/AR724X/AR913X based boards"
244 select ARCH_HAS_RESET_CONTROLLER
248 select DMA_NONCOHERENT
253 select SYS_HAS_CPU_MIPS32_R2
254 select SYS_HAS_EARLY_PRINTK
255 select SYS_SUPPORTS_32BIT_KERNEL
256 select SYS_SUPPORTS_BIG_ENDIAN
257 select SYS_SUPPORTS_MIPS16
258 select SYS_SUPPORTS_ZBOOT_UART_PROM
260 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
262 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
265 bool "Broadcom Generic BMIPS kernel"
266 select ARCH_HAS_RESET_CONTROLLER
267 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
269 select NO_EXCEPT_FILL
275 select BCM6345_L1_IRQ
276 select BCM7038_L1_IRQ
277 select BCM7120_L2_IRQ
278 select BRCMSTB_L2_IRQ
280 select DMA_NONCOHERENT
281 select SYS_SUPPORTS_32BIT_KERNEL
282 select SYS_SUPPORTS_LITTLE_ENDIAN
283 select SYS_SUPPORTS_BIG_ENDIAN
284 select SYS_SUPPORTS_HIGHMEM
285 select SYS_HAS_CPU_BMIPS32_3300
286 select SYS_HAS_CPU_BMIPS4350
287 select SYS_HAS_CPU_BMIPS4380
288 select SYS_HAS_CPU_BMIPS5000
290 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
291 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
292 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
293 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
294 select HARDIRQS_SW_RESEND
296 select PCI_DRIVERS_GENERIC
299 Build a generic DT-based kernel image that boots on select
300 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
301 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
302 must be set appropriately for your board.
305 bool "Broadcom BCM47XX based boards"
309 select DMA_NONCOHERENT
312 select SYS_HAS_CPU_MIPS32_R1
313 select NO_EXCEPT_FILL
314 select SYS_SUPPORTS_32BIT_KERNEL
315 select SYS_SUPPORTS_LITTLE_ENDIAN
316 select SYS_SUPPORTS_MIPS16
317 select SYS_SUPPORTS_ZBOOT
318 select SYS_HAS_EARLY_PRINTK
319 select USE_GENERIC_EARLY_PRINTK_8250
321 select LEDS_GPIO_REGISTER
324 select BCM47XX_SSB if !BCM47XX_BCMA
326 Support for BCM47XX based boards
329 bool "Broadcom BCM63XX based boards"
334 select DMA_NONCOHERENT
336 select SYS_SUPPORTS_32BIT_KERNEL
337 select SYS_SUPPORTS_BIG_ENDIAN
338 select SYS_HAS_EARLY_PRINTK
339 select SYS_HAS_CPU_BMIPS32_3300
340 select SYS_HAS_CPU_BMIPS4350
341 select SYS_HAS_CPU_BMIPS4380
344 select MIPS_L1_CACHE_SHIFT_4
345 select HAVE_LEGACY_CLK
347 Support for BCM63XX based boards
354 select DMA_NONCOHERENT
360 select PCI_GT64XXX_PCI0
361 select SYS_HAS_CPU_NEVADA
362 select SYS_HAS_EARLY_PRINTK
363 select SYS_SUPPORTS_32BIT_KERNEL
364 select SYS_SUPPORTS_64BIT_KERNEL
365 select SYS_SUPPORTS_LITTLE_ENDIAN
366 select USE_GENERIC_EARLY_PRINTK_8250
368 config MACH_DECSTATION
372 select CEVT_R4K if CPU_R4X00
374 select CSRC_R4K if CPU_R4X00
375 select CPU_DADDI_WORKAROUNDS if 64BIT
376 select CPU_R4000_WORKAROUNDS if 64BIT
377 select CPU_R4400_WORKAROUNDS if 64BIT
378 select DMA_NONCOHERENT
381 select SYS_HAS_CPU_R3000
382 select SYS_HAS_CPU_R4X00
383 select SYS_SUPPORTS_32BIT_KERNEL
384 select SYS_SUPPORTS_64BIT_KERNEL
385 select SYS_SUPPORTS_LITTLE_ENDIAN
386 select SYS_SUPPORTS_128HZ
387 select SYS_SUPPORTS_256HZ
388 select SYS_SUPPORTS_1024HZ
389 select MIPS_L1_CACHE_SHIFT_4
391 This enables support for DEC's MIPS based workstations. For details
392 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
393 DECstation porting pages on <http://decstation.unix-ag.org/>.
395 If you have one of the following DECstation Models you definitely
396 want to choose R4xx0 for the CPU Type:
403 otherwise choose R3000.
406 bool "Jazz family of machines"
409 select ARCH_MIGHT_HAVE_PC_PARPORT
410 select ARCH_MIGHT_HAVE_PC_SERIO
414 select ARCH_MAY_HAVE_PC_FDC
417 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
418 select GENERIC_ISA_DMA
419 select HAVE_PCSPKR_PLATFORM
424 select SYS_HAS_CPU_R4X00
425 select SYS_SUPPORTS_32BIT_KERNEL
426 select SYS_SUPPORTS_64BIT_KERNEL
427 select SYS_SUPPORTS_100HZ
428 select SYS_SUPPORTS_LITTLE_ENDIAN
430 This a family of machines based on the MIPS R4030 chipset which was
431 used by several vendors to build RISC/os and Windows NT workstations.
432 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
433 Olivetti M700-10 workstations.
435 config MACH_INGENIC_SOC
436 bool "Ingenic SoC based machines"
439 select SYS_SUPPORTS_ZBOOT_UART16550
440 select CPU_SUPPORTS_CPUFREQ
441 select MIPS_EXTERNAL_TIMER
444 bool "Lantiq based platforms"
445 select DMA_NONCOHERENT
449 select NO_EXCEPT_FILL
450 select SYS_HAS_CPU_MIPS32_R1
451 select SYS_HAS_CPU_MIPS32_R2
452 select SYS_SUPPORTS_BIG_ENDIAN
453 select SYS_SUPPORTS_32BIT_KERNEL
454 select SYS_SUPPORTS_MIPS16
455 select SYS_SUPPORTS_MULTITHREADING
456 select SYS_SUPPORTS_VPE_LOADER
457 select SYS_HAS_EARLY_PRINTK
461 select HAVE_LEGACY_CLK
464 select PINCTRL_LANTIQ
465 select ARCH_HAS_RESET_CONTROLLER
466 select RESET_CONTROLLER
468 config MACH_LOONGSON32
469 bool "Loongson 32-bit family of machines"
470 select SYS_SUPPORTS_ZBOOT
472 This enables support for the Loongson-1 family of machines.
474 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
475 the Institute of Computing Technology (ICT), Chinese Academy of
478 config MACH_LOONGSON2EF
479 bool "Loongson-2E/F family of machines"
480 select SYS_SUPPORTS_ZBOOT
482 This enables the support of early Loongson-2E/F family of machines.
484 config MACH_LOONGSON64
485 bool "Loongson 64-bit family of machines"
486 select ARCH_SPARSEMEM_ENABLE
487 select ARCH_MIGHT_HAVE_PC_PARPORT
488 select ARCH_MIGHT_HAVE_PC_SERIO
489 select GENERIC_ISA_DMA_SUPPORT_BROKEN
499 select NO_EXCEPT_FILL
500 select NR_CPUS_DEFAULT_64
501 select USE_GENERIC_EARLY_PRINTK_8250
502 select PCI_DRIVERS_GENERIC
503 select SYS_HAS_CPU_LOONGSON64
504 select SYS_HAS_EARLY_PRINTK
505 select SYS_SUPPORTS_SMP
506 select SYS_SUPPORTS_HOTPLUG_CPU
507 select SYS_SUPPORTS_NUMA
508 select SYS_SUPPORTS_64BIT_KERNEL
509 select SYS_SUPPORTS_HIGHMEM
510 select SYS_SUPPORTS_LITTLE_ENDIAN
511 select SYS_SUPPORTS_ZBOOT
512 select SYS_SUPPORTS_RELOCATABLE
517 select PCI_HOST_GENERIC
518 select HAVE_ARCH_NODEDATA_EXTENSION if NUMA
520 This enables the support of Loongson-2/3 family of machines.
522 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
523 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
524 and Loongson-2F which will be removed), developed by the Institute
525 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
528 bool "MIPS Malta board"
529 select ARCH_MAY_HAVE_PC_FDC
530 select ARCH_MIGHT_HAVE_PC_PARPORT
531 select ARCH_MIGHT_HAVE_PC_SERIO
536 select CLKSRC_MIPS_GIC
539 select DMA_NONCOHERENT
540 select GENERIC_ISA_DMA
541 select HAVE_PCSPKR_PLATFORM
547 select MIPS_CPU_SCACHE
549 select MIPS_L1_CACHE_SHIFT_6
551 select PCI_GT64XXX_PCI0
554 select SYS_HAS_CPU_MIPS32_R1
555 select SYS_HAS_CPU_MIPS32_R2
556 select SYS_HAS_CPU_MIPS32_R3_5
557 select SYS_HAS_CPU_MIPS32_R5
558 select SYS_HAS_CPU_MIPS32_R6
559 select SYS_HAS_CPU_MIPS64_R1
560 select SYS_HAS_CPU_MIPS64_R2
561 select SYS_HAS_CPU_MIPS64_R6
562 select SYS_HAS_CPU_NEVADA
563 select SYS_HAS_CPU_RM7000
564 select SYS_SUPPORTS_32BIT_KERNEL
565 select SYS_SUPPORTS_64BIT_KERNEL
566 select SYS_SUPPORTS_BIG_ENDIAN
567 select SYS_SUPPORTS_HIGHMEM
568 select SYS_SUPPORTS_LITTLE_ENDIAN
569 select SYS_SUPPORTS_MICROMIPS
570 select SYS_SUPPORTS_MIPS16
571 select SYS_SUPPORTS_MIPS_CMP
572 select SYS_SUPPORTS_MIPS_CPS
573 select SYS_SUPPORTS_MULTITHREADING
574 select SYS_SUPPORTS_RELOCATABLE
575 select SYS_SUPPORTS_SMARTMIPS
576 select SYS_SUPPORTS_VPE_LOADER
577 select SYS_SUPPORTS_ZBOOT
579 select WAR_ICACHE_REFILLS
580 select ZONE_DMA32 if 64BIT
582 This enables support for the MIPS Technologies Malta evaluation
586 bool "Microchip PIC32 Family"
588 This enables support for the Microchip PIC32 family of platforms.
590 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
593 config MACH_NINTENDO64
594 bool "Nintendo 64 console"
597 select SYS_HAS_CPU_R4300
598 select SYS_SUPPORTS_BIG_ENDIAN
599 select SYS_SUPPORTS_ZBOOT
600 select SYS_SUPPORTS_32BIT_KERNEL
601 select SYS_SUPPORTS_64BIT_KERNEL
602 select DMA_NONCOHERENT
606 bool "Ralink based machines"
611 select DMA_NONCOHERENT
614 select SYS_HAS_CPU_MIPS32_R2
615 select SYS_SUPPORTS_32BIT_KERNEL
616 select SYS_SUPPORTS_LITTLE_ENDIAN
617 select SYS_SUPPORTS_MIPS16
618 select SYS_SUPPORTS_ZBOOT
619 select SYS_HAS_EARLY_PRINTK
620 select ARCH_HAS_RESET_CONTROLLER
621 select RESET_CONTROLLER
623 config MACH_REALTEK_RTL
624 bool "Realtek RTL838x/RTL839x based machines"
626 select DMA_NONCOHERENT
630 select SYS_HAS_CPU_MIPS32_R1
631 select SYS_HAS_CPU_MIPS32_R2
632 select SYS_SUPPORTS_BIG_ENDIAN
633 select SYS_SUPPORTS_32BIT_KERNEL
634 select SYS_SUPPORTS_MIPS16
635 select SYS_SUPPORTS_MULTITHREADING
636 select SYS_SUPPORTS_VPE_LOADER
642 bool "SGI IP22 (Indy/Indigo2)"
647 select ARCH_MIGHT_HAVE_PC_SERIO
651 select DEFAULT_SGI_PARTITION
652 select DMA_NONCOHERENT
656 select IP22_CPU_SCACHE
658 select GENERIC_ISA_DMA_SUPPORT_BROKEN
660 select SGI_HAS_INDYDOG
666 select SYS_HAS_CPU_R4X00
667 select SYS_HAS_CPU_R5000
668 select SYS_HAS_EARLY_PRINTK
669 select SYS_SUPPORTS_32BIT_KERNEL
670 select SYS_SUPPORTS_64BIT_KERNEL
671 select SYS_SUPPORTS_BIG_ENDIAN
672 select WAR_R4600_V1_INDEX_ICACHEOP
673 select WAR_R4600_V1_HIT_CACHEOP
674 select WAR_R4600_V2_HIT_CACHEOP
675 select MIPS_L1_CACHE_SHIFT_7
677 This are the SGI Indy, Challenge S and Indigo2, as well as certain
678 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
679 that runs on these, say Y here.
682 bool "SGI IP27 (Origin200/2000)"
683 select ARCH_HAS_PHYS_TO_DMA
684 select ARCH_SPARSEMEM_ENABLE
687 select ARC_CMDLINE_ONLY
689 select DEFAULT_SGI_PARTITION
691 select SYS_HAS_EARLY_PRINTK
694 select IRQ_DOMAIN_HIERARCHY
695 select NR_CPUS_DEFAULT_64
696 select PCI_DRIVERS_GENERIC
697 select PCI_XTALK_BRIDGE
698 select SYS_HAS_CPU_R10000
699 select SYS_SUPPORTS_64BIT_KERNEL
700 select SYS_SUPPORTS_BIG_ENDIAN
701 select SYS_SUPPORTS_NUMA
702 select SYS_SUPPORTS_SMP
703 select WAR_R10000_LLSC
704 select MIPS_L1_CACHE_SHIFT_7
706 select HAVE_ARCH_NODEDATA_EXTENSION
708 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
709 workstations. To compile a Linux kernel that runs on these, say Y
713 bool "SGI IP28 (Indigo2 R10k)"
718 select ARCH_MIGHT_HAVE_PC_SERIO
722 select DEFAULT_SGI_PARTITION
723 select DMA_NONCOHERENT
724 select GENERIC_ISA_DMA_SUPPORT_BROKEN
730 select SGI_HAS_INDYDOG
736 select SYS_HAS_CPU_R10000
737 select SYS_HAS_EARLY_PRINTK
738 select SYS_SUPPORTS_64BIT_KERNEL
739 select SYS_SUPPORTS_BIG_ENDIAN
740 select WAR_R10000_LLSC
741 select MIPS_L1_CACHE_SHIFT_7
743 This is the SGI Indigo2 with R10000 processor. To compile a Linux
744 kernel that runs on these, say Y here.
747 bool "SGI IP30 (Octane/Octane2)"
748 select ARCH_HAS_PHYS_TO_DMA
755 select SYNC_R4K if SMP
759 select IRQ_DOMAIN_HIERARCHY
760 select PCI_DRIVERS_GENERIC
761 select PCI_XTALK_BRIDGE
762 select SYS_HAS_EARLY_PRINTK
763 select SYS_HAS_CPU_R10000
764 select SYS_SUPPORTS_64BIT_KERNEL
765 select SYS_SUPPORTS_BIG_ENDIAN
766 select SYS_SUPPORTS_SMP
767 select WAR_R10000_LLSC
768 select MIPS_L1_CACHE_SHIFT_7
771 These are the SGI Octane and Octane2 graphics workstations. To
772 compile a Linux kernel that runs on these, say Y here.
778 select ARCH_HAS_PHYS_TO_DMA
784 select DMA_NONCOHERENT
787 select R5000_CPU_SCACHE
788 select RM7000_CPU_SCACHE
789 select SYS_HAS_CPU_R5000
790 select SYS_HAS_CPU_R10000 if BROKEN
791 select SYS_HAS_CPU_RM7000
792 select SYS_HAS_CPU_NEVADA
793 select SYS_SUPPORTS_64BIT_KERNEL
794 select SYS_SUPPORTS_BIG_ENDIAN
795 select WAR_ICACHE_REFILLS
797 If you want this kernel to run on SGI O2 workstation, say Y here.
800 bool "Sibyte BCM91120C-CRhine"
802 select SIBYTE_BCM1120
804 select SYS_HAS_CPU_SB1
805 select SYS_SUPPORTS_BIG_ENDIAN
806 select SYS_SUPPORTS_LITTLE_ENDIAN
809 bool "Sibyte BCM91120x-Carmel"
811 select SIBYTE_BCM1120
813 select SYS_HAS_CPU_SB1
814 select SYS_SUPPORTS_BIG_ENDIAN
815 select SYS_SUPPORTS_LITTLE_ENDIAN
818 bool "Sibyte BCM91125C-CRhone"
820 select SIBYTE_BCM1125
822 select SYS_HAS_CPU_SB1
823 select SYS_SUPPORTS_BIG_ENDIAN
824 select SYS_SUPPORTS_HIGHMEM
825 select SYS_SUPPORTS_LITTLE_ENDIAN
828 bool "Sibyte BCM91125E-Rhone"
830 select SIBYTE_BCM1125H
832 select SYS_HAS_CPU_SB1
833 select SYS_SUPPORTS_BIG_ENDIAN
834 select SYS_SUPPORTS_LITTLE_ENDIAN
837 bool "Sibyte BCM91250A-SWARM"
839 select HAVE_PATA_PLATFORM
842 select SYS_HAS_CPU_SB1
843 select SYS_SUPPORTS_BIG_ENDIAN
844 select SYS_SUPPORTS_HIGHMEM
845 select SYS_SUPPORTS_LITTLE_ENDIAN
846 select ZONE_DMA32 if 64BIT
847 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
849 config SIBYTE_LITTLESUR
850 bool "Sibyte BCM91250C2-LittleSur"
852 select HAVE_PATA_PLATFORM
855 select SYS_HAS_CPU_SB1
856 select SYS_SUPPORTS_BIG_ENDIAN
857 select SYS_SUPPORTS_HIGHMEM
858 select SYS_SUPPORTS_LITTLE_ENDIAN
859 select ZONE_DMA32 if 64BIT
861 config SIBYTE_SENTOSA
862 bool "Sibyte BCM91250E-Sentosa"
866 select SYS_HAS_CPU_SB1
867 select SYS_SUPPORTS_BIG_ENDIAN
868 select SYS_SUPPORTS_LITTLE_ENDIAN
869 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
872 bool "Sibyte BCM91480B-BigSur"
874 select NR_CPUS_DEFAULT_4
875 select SIBYTE_BCM1x80
877 select SYS_HAS_CPU_SB1
878 select SYS_SUPPORTS_BIG_ENDIAN
879 select SYS_SUPPORTS_HIGHMEM
880 select SYS_SUPPORTS_LITTLE_ENDIAN
881 select ZONE_DMA32 if 64BIT
882 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
885 bool "SNI RM200/300/400"
888 select FW_ARC if CPU_LITTLE_ENDIAN
889 select FW_ARC32 if CPU_LITTLE_ENDIAN
890 select FW_SNIPROM if CPU_BIG_ENDIAN
891 select ARCH_MAY_HAVE_PC_FDC
892 select ARCH_MIGHT_HAVE_PC_PARPORT
893 select ARCH_MIGHT_HAVE_PC_SERIO
897 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
898 select DMA_NONCOHERENT
899 select GENERIC_ISA_DMA
901 select HAVE_PCSPKR_PLATFORM
907 select MIPS_L1_CACHE_SHIFT_6
908 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
909 select SYS_HAS_CPU_R4X00
910 select SYS_HAS_CPU_R5000
911 select SYS_HAS_CPU_R10000
912 select R5000_CPU_SCACHE
913 select SYS_HAS_EARLY_PRINTK
914 select SYS_SUPPORTS_32BIT_KERNEL
915 select SYS_SUPPORTS_64BIT_KERNEL
916 select SYS_SUPPORTS_BIG_ENDIAN
917 select SYS_SUPPORTS_HIGHMEM
918 select SYS_SUPPORTS_LITTLE_ENDIAN
919 select WAR_R4600_V2_HIT_CACHEOP
921 The SNI RM200/300/400 are MIPS-based machines manufactured by
922 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
923 Technology and now in turn merged with Fujitsu. Say Y here to
924 support this machine type.
927 bool "Toshiba TX49 series based machines"
928 select WAR_TX49XX_ICACHE_INDEX_INV
930 config MIKROTIK_RB532
931 bool "Mikrotik RB532 boards"
934 select DMA_NONCOHERENT
937 select SYS_HAS_CPU_MIPS32_R1
938 select SYS_SUPPORTS_32BIT_KERNEL
939 select SYS_SUPPORTS_LITTLE_ENDIAN
943 select MIPS_L1_CACHE_SHIFT_4
945 Support the Mikrotik(tm) RouterBoard 532 series,
946 based on the IDT RC32434 SoC.
948 config CAVIUM_OCTEON_SOC
949 bool "Cavium Networks Octeon SoC based boards"
951 select ARCH_HAS_PHYS_TO_DMA
953 select PHYS_ADDR_T_64BIT
954 select SYS_SUPPORTS_64BIT_KERNEL
955 select SYS_SUPPORTS_BIG_ENDIAN
957 select EDAC_ATOMIC_SCRUB
958 select SYS_SUPPORTS_LITTLE_ENDIAN
959 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
960 select SYS_HAS_EARLY_PRINTK
961 select SYS_HAS_CPU_CAVIUM_OCTEON
963 select HAVE_PLAT_DELAY
964 select HAVE_PLAT_FW_INIT_CMDLINE
965 select HAVE_PLAT_MEMCPY
969 select ARCH_SPARSEMEM_ENABLE
970 select SYS_SUPPORTS_SMP
971 select NR_CPUS_DEFAULT_64
972 select MIPS_NR_CPU_NR_MAP_1024
975 select MTD_COMPLEX_MAPPINGS
977 select SYS_SUPPORTS_RELOCATABLE
979 This option supports all of the Octeon reference boards from Cavium
980 Networks. It builds a kernel that dynamically determines the Octeon
981 CPU type and supports all known board reference implementations.
982 Some of the supported boards are:
989 Say Y here for most Octeon reference boards.
993 source "arch/mips/alchemy/Kconfig"
994 source "arch/mips/ath25/Kconfig"
995 source "arch/mips/ath79/Kconfig"
996 source "arch/mips/bcm47xx/Kconfig"
997 source "arch/mips/bcm63xx/Kconfig"
998 source "arch/mips/bmips/Kconfig"
999 source "arch/mips/generic/Kconfig"
1000 source "arch/mips/ingenic/Kconfig"
1001 source "arch/mips/jazz/Kconfig"
1002 source "arch/mips/lantiq/Kconfig"
1003 source "arch/mips/pic32/Kconfig"
1004 source "arch/mips/ralink/Kconfig"
1005 source "arch/mips/sgi-ip27/Kconfig"
1006 source "arch/mips/sibyte/Kconfig"
1007 source "arch/mips/txx9/Kconfig"
1008 source "arch/mips/cavium-octeon/Kconfig"
1009 source "arch/mips/loongson2ef/Kconfig"
1010 source "arch/mips/loongson32/Kconfig"
1011 source "arch/mips/loongson64/Kconfig"
1015 config GENERIC_HWEIGHT
1019 config GENERIC_CALIBRATE_DELAY
1023 config SCHED_OMIT_FRAME_POINTER
1028 # Select some configuration options automatically based on user selections.
1033 config ARCH_MAY_HAVE_PC_FDC
1064 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1070 config MIPS_CLOCK_VSYSCALL
1071 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1080 config ARCH_SUPPORTS_UPROBES
1083 config DMA_NONCOHERENT
1086 # MIPS allows mixing "slightly different" Cacheability and Coherency
1087 # Attribute bits. It is believed that the uncached access through
1088 # KSEG1 and the implementation specific "uncached accelerated" used
1089 # by pgprot_writcombine can be mixed, and the latter sometimes provides
1090 # significant advantages.
1092 select ARCH_HAS_DMA_WRITE_COMBINE
1093 select ARCH_HAS_DMA_PREP_COHERENT
1094 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1095 select ARCH_HAS_DMA_SET_UNCACHED
1096 select DMA_NONCOHERENT_MMAP
1097 select NEED_DMA_MAP_STATE
1099 config SYS_HAS_EARLY_PRINTK
1102 config SYS_SUPPORTS_HOTPLUG_CPU
1105 config MIPS_BONITO64
1114 config NO_IOPORT_MAP
1118 def_bool CPU_NO_LOAD_STORE_LR
1120 config GENERIC_ISA_DMA
1122 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1125 config GENERIC_ISA_DMA_SUPPORT_BROKEN
1127 select GENERIC_ISA_DMA
1129 config HAVE_PLAT_DELAY
1132 config HAVE_PLAT_FW_INIT_CMDLINE
1135 config HAVE_PLAT_MEMCPY
1141 config SYS_SUPPORTS_RELOCATABLE
1144 Selected if the platform supports relocating the kernel.
1145 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1146 to allow access to command line and entropy sources.
1149 # Endianness selection. Sufficiently obscure so many users don't know what to
1150 # answer,so we try hard to limit the available choices. Also the use of a
1151 # choice statement should be more obvious to the user.
1154 prompt "Endianness selection"
1156 Some MIPS machines can be configured for either little or big endian
1157 byte order. These modes require different kernels and a different
1158 Linux distribution. In general there is one preferred byteorder for a
1159 particular system but some systems are just as commonly used in the
1160 one or the other endianness.
1162 config CPU_BIG_ENDIAN
1164 depends on SYS_SUPPORTS_BIG_ENDIAN
1166 config CPU_LITTLE_ENDIAN
1167 bool "Little endian"
1168 depends on SYS_SUPPORTS_LITTLE_ENDIAN
1175 config SYS_SUPPORTS_APM_EMULATION
1178 config SYS_SUPPORTS_BIG_ENDIAN
1181 config SYS_SUPPORTS_LITTLE_ENDIAN
1184 config MIPS_HUGE_TLB_SUPPORT
1185 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1199 config PCI_GT64XXX_PCI0
1202 config PCI_XTALK_BRIDGE
1205 config NO_EXCEPT_FILL
1211 config SWAP_IO_SPACE
1214 config SGI_HAS_INDYDOG
1226 config SGI_HAS_ZILOG
1229 config SGI_HAS_I8042
1232 config DEFAULT_SGI_PARTITION
1244 config MIPS_L1_CACHE_SHIFT_4
1247 config MIPS_L1_CACHE_SHIFT_5
1250 config MIPS_L1_CACHE_SHIFT_6
1253 config MIPS_L1_CACHE_SHIFT_7
1256 config MIPS_L1_CACHE_SHIFT
1258 default "7" if MIPS_L1_CACHE_SHIFT_7
1259 default "6" if MIPS_L1_CACHE_SHIFT_6
1260 default "5" if MIPS_L1_CACHE_SHIFT_5
1261 default "4" if MIPS_L1_CACHE_SHIFT_4
1264 config ARC_CMDLINE_ONLY
1268 bool "ARC console support"
1269 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1283 menu "CPU selection"
1289 config CPU_LOONGSON64
1290 bool "Loongson 64-bit CPU"
1291 depends on SYS_HAS_CPU_LOONGSON64
1292 select ARCH_HAS_PHYS_TO_DMA
1294 select CPU_HAS_PREFETCH
1295 select CPU_SUPPORTS_64BIT_KERNEL
1296 select CPU_SUPPORTS_HIGHMEM
1297 select CPU_SUPPORTS_HUGEPAGES
1298 select CPU_SUPPORTS_MSA
1299 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1300 select CPU_MIPSR2_IRQ_VI
1301 select WEAK_ORDERING
1302 select WEAK_REORDERING_BEYOND_LLSC
1303 select MIPS_ASID_BITS_VARIABLE
1304 select MIPS_PGD_C0_CONTEXT
1305 select MIPS_L1_CACHE_SHIFT_6
1306 select MIPS_FP_SUPPORT
1311 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1312 cores implements the MIPS64R2 instruction set with many extensions,
1313 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1314 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1315 Loongson-2E/2F is not covered here and will be removed in future.
1317 config LOONGSON3_ENHANCEMENT
1318 bool "New Loongson-3 CPU Enhancements"
1320 depends on CPU_LOONGSON64
1322 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1323 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1324 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1325 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1326 Fast TLB refill support, etc.
1328 This option enable those enhancements which are not probed at run
1329 time. If you want a generic kernel to run on all Loongson 3 machines,
1330 please say 'N' here. If you want a high-performance kernel to run on
1331 new Loongson-3 machines only, please say 'Y' here.
1333 config CPU_LOONGSON3_WORKAROUNDS
1334 bool "Loongson-3 LLSC Workarounds"
1336 depends on CPU_LOONGSON64
1338 Loongson-3 processors have the llsc issues which require workarounds.
1339 Without workarounds the system may hang unexpectedly.
1341 Say Y, unless you know what you are doing.
1343 config CPU_LOONGSON3_CPUCFG_EMULATION
1344 bool "Emulate the CPUCFG instruction on older Loongson cores"
1346 depends on CPU_LOONGSON64
1348 Loongson-3A R4 and newer have the CPUCFG instruction available for
1349 userland to query CPU capabilities, much like CPUID on x86. This
1350 option provides emulation of the instruction on older Loongson
1351 cores, back to Loongson-3A1000.
1353 If unsure, please say Y.
1355 config CPU_LOONGSON2E
1357 depends on SYS_HAS_CPU_LOONGSON2E
1358 select CPU_LOONGSON2EF
1360 The Loongson 2E processor implements the MIPS III instruction set
1361 with many extensions.
1363 It has an internal FPGA northbridge, which is compatible to
1366 config CPU_LOONGSON2F
1368 depends on SYS_HAS_CPU_LOONGSON2F
1369 select CPU_LOONGSON2EF
1372 The Loongson 2F processor implements the MIPS III instruction set
1373 with many extensions.
1375 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1376 have a similar programming interface with FPGA northbridge used in
1379 config CPU_LOONGSON1B
1381 depends on SYS_HAS_CPU_LOONGSON1B
1382 select CPU_LOONGSON32
1383 select LEDS_GPIO_REGISTER
1385 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1386 Release 1 instruction set and part of the MIPS32 Release 2
1389 config CPU_LOONGSON1C
1391 depends on SYS_HAS_CPU_LOONGSON1C
1392 select CPU_LOONGSON32
1393 select LEDS_GPIO_REGISTER
1395 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1396 Release 1 instruction set and part of the MIPS32 Release 2
1399 config CPU_MIPS32_R1
1400 bool "MIPS32 Release 1"
1401 depends on SYS_HAS_CPU_MIPS32_R1
1402 select CPU_HAS_PREFETCH
1403 select CPU_SUPPORTS_32BIT_KERNEL
1404 select CPU_SUPPORTS_HIGHMEM
1406 Choose this option to build a kernel for release 1 or later of the
1407 MIPS32 architecture. Most modern embedded systems with a 32-bit
1408 MIPS processor are based on a MIPS32 processor. If you know the
1409 specific type of processor in your system, choose those that one
1410 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1411 Release 2 of the MIPS32 architecture is available since several
1412 years so chances are you even have a MIPS32 Release 2 processor
1413 in which case you should choose CPU_MIPS32_R2 instead for better
1416 config CPU_MIPS32_R2
1417 bool "MIPS32 Release 2"
1418 depends on SYS_HAS_CPU_MIPS32_R2
1419 select CPU_HAS_PREFETCH
1420 select CPU_SUPPORTS_32BIT_KERNEL
1421 select CPU_SUPPORTS_HIGHMEM
1422 select CPU_SUPPORTS_MSA
1425 Choose this option to build a kernel for release 2 or later of the
1426 MIPS32 architecture. Most modern embedded systems with a 32-bit
1427 MIPS processor are based on a MIPS32 processor. If you know the
1428 specific type of processor in your system, choose those that one
1429 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1431 config CPU_MIPS32_R5
1432 bool "MIPS32 Release 5"
1433 depends on SYS_HAS_CPU_MIPS32_R5
1434 select CPU_HAS_PREFETCH
1435 select CPU_SUPPORTS_32BIT_KERNEL
1436 select CPU_SUPPORTS_HIGHMEM
1437 select CPU_SUPPORTS_MSA
1439 select MIPS_O32_FP64_SUPPORT
1441 Choose this option to build a kernel for release 5 or later of the
1442 MIPS32 architecture. New MIPS processors, starting with the Warrior
1443 family, are based on a MIPS32r5 processor. If you own an older
1444 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1446 config CPU_MIPS32_R6
1447 bool "MIPS32 Release 6"
1448 depends on SYS_HAS_CPU_MIPS32_R6
1449 select CPU_HAS_PREFETCH
1450 select CPU_NO_LOAD_STORE_LR
1451 select CPU_SUPPORTS_32BIT_KERNEL
1452 select CPU_SUPPORTS_HIGHMEM
1453 select CPU_SUPPORTS_MSA
1455 select MIPS_O32_FP64_SUPPORT
1457 Choose this option to build a kernel for release 6 or later of the
1458 MIPS32 architecture. New MIPS processors, starting with the Warrior
1459 family, are based on a MIPS32r6 processor. If you own an older
1460 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1462 config CPU_MIPS64_R1
1463 bool "MIPS64 Release 1"
1464 depends on SYS_HAS_CPU_MIPS64_R1
1465 select CPU_HAS_PREFETCH
1466 select CPU_SUPPORTS_32BIT_KERNEL
1467 select CPU_SUPPORTS_64BIT_KERNEL
1468 select CPU_SUPPORTS_HIGHMEM
1469 select CPU_SUPPORTS_HUGEPAGES
1471 Choose this option to build a kernel for release 1 or later of the
1472 MIPS64 architecture. Many modern embedded systems with a 64-bit
1473 MIPS processor are based on a MIPS64 processor. If you know the
1474 specific type of processor in your system, choose those that one
1475 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1476 Release 2 of the MIPS64 architecture is available since several
1477 years so chances are you even have a MIPS64 Release 2 processor
1478 in which case you should choose CPU_MIPS64_R2 instead for better
1481 config CPU_MIPS64_R2
1482 bool "MIPS64 Release 2"
1483 depends on SYS_HAS_CPU_MIPS64_R2
1484 select CPU_HAS_PREFETCH
1485 select CPU_SUPPORTS_32BIT_KERNEL
1486 select CPU_SUPPORTS_64BIT_KERNEL
1487 select CPU_SUPPORTS_HIGHMEM
1488 select CPU_SUPPORTS_HUGEPAGES
1489 select CPU_SUPPORTS_MSA
1492 Choose this option to build a kernel for release 2 or later of the
1493 MIPS64 architecture. Many modern embedded systems with a 64-bit
1494 MIPS processor are based on a MIPS64 processor. If you know the
1495 specific type of processor in your system, choose those that one
1496 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1498 config CPU_MIPS64_R5
1499 bool "MIPS64 Release 5"
1500 depends on SYS_HAS_CPU_MIPS64_R5
1501 select CPU_HAS_PREFETCH
1502 select CPU_SUPPORTS_32BIT_KERNEL
1503 select CPU_SUPPORTS_64BIT_KERNEL
1504 select CPU_SUPPORTS_HIGHMEM
1505 select CPU_SUPPORTS_HUGEPAGES
1506 select CPU_SUPPORTS_MSA
1507 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1510 Choose this option to build a kernel for release 5 or later of the
1511 MIPS64 architecture. This is a intermediate MIPS architecture
1512 release partly implementing release 6 features. Though there is no
1513 any hardware known to be based on this release.
1515 config CPU_MIPS64_R6
1516 bool "MIPS64 Release 6"
1517 depends on SYS_HAS_CPU_MIPS64_R6
1518 select CPU_HAS_PREFETCH
1519 select CPU_NO_LOAD_STORE_LR
1520 select CPU_SUPPORTS_32BIT_KERNEL
1521 select CPU_SUPPORTS_64BIT_KERNEL
1522 select CPU_SUPPORTS_HIGHMEM
1523 select CPU_SUPPORTS_HUGEPAGES
1524 select CPU_SUPPORTS_MSA
1525 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1528 Choose this option to build a kernel for release 6 or later of the
1529 MIPS64 architecture. New MIPS processors, starting with the Warrior
1530 family, are based on a MIPS64r6 processor. If you own an older
1531 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1534 bool "MIPS Warrior P5600"
1535 depends on SYS_HAS_CPU_P5600
1536 select CPU_HAS_PREFETCH
1537 select CPU_SUPPORTS_32BIT_KERNEL
1538 select CPU_SUPPORTS_HIGHMEM
1539 select CPU_SUPPORTS_MSA
1540 select CPU_SUPPORTS_CPUFREQ
1541 select CPU_MIPSR2_IRQ_VI
1542 select CPU_MIPSR2_IRQ_EI
1544 select MIPS_O32_FP64_SUPPORT
1546 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1547 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1548 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1549 level features like up to six P5600 calculation cores, CM2 with L2
1550 cache, IOCU/IOMMU (though might be unused depending on the system-
1551 specific IP core configuration), GIC, CPC, virtualisation module,
1556 depends on SYS_HAS_CPU_R3000
1559 select CPU_SUPPORTS_32BIT_KERNEL
1560 select CPU_SUPPORTS_HIGHMEM
1562 Please make sure to pick the right CPU type. Linux/MIPS is not
1563 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1564 *not* work on R4000 machines and vice versa. However, since most
1565 of the supported machines have an R4000 (or similar) CPU, R4x00
1566 might be a safe bet. If the resulting kernel does not work,
1567 try to recompile with R3000.
1571 depends on SYS_HAS_CPU_R4300
1572 select CPU_SUPPORTS_32BIT_KERNEL
1573 select CPU_SUPPORTS_64BIT_KERNEL
1575 MIPS Technologies R4300-series processors.
1579 depends on SYS_HAS_CPU_R4X00
1580 select CPU_SUPPORTS_32BIT_KERNEL
1581 select CPU_SUPPORTS_64BIT_KERNEL
1582 select CPU_SUPPORTS_HUGEPAGES
1584 MIPS Technologies R4000-series processors other than 4300, including
1585 the R4000, R4400, R4600, and 4700.
1589 depends on SYS_HAS_CPU_TX49XX
1590 select CPU_HAS_PREFETCH
1591 select CPU_SUPPORTS_32BIT_KERNEL
1592 select CPU_SUPPORTS_64BIT_KERNEL
1593 select CPU_SUPPORTS_HUGEPAGES
1597 depends on SYS_HAS_CPU_R5000
1598 select CPU_SUPPORTS_32BIT_KERNEL
1599 select CPU_SUPPORTS_64BIT_KERNEL
1600 select CPU_SUPPORTS_HUGEPAGES
1602 MIPS Technologies R5000-series processors other than the Nevada.
1606 depends on SYS_HAS_CPU_R5500
1607 select CPU_SUPPORTS_32BIT_KERNEL
1608 select CPU_SUPPORTS_64BIT_KERNEL
1609 select CPU_SUPPORTS_HUGEPAGES
1611 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1616 depends on SYS_HAS_CPU_NEVADA
1617 select CPU_SUPPORTS_32BIT_KERNEL
1618 select CPU_SUPPORTS_64BIT_KERNEL
1619 select CPU_SUPPORTS_HUGEPAGES
1621 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1625 depends on SYS_HAS_CPU_R10000
1626 select CPU_HAS_PREFETCH
1627 select CPU_SUPPORTS_32BIT_KERNEL
1628 select CPU_SUPPORTS_64BIT_KERNEL
1629 select CPU_SUPPORTS_HIGHMEM
1630 select CPU_SUPPORTS_HUGEPAGES
1632 MIPS Technologies R10000-series processors.
1636 depends on SYS_HAS_CPU_RM7000
1637 select CPU_HAS_PREFETCH
1638 select CPU_SUPPORTS_32BIT_KERNEL
1639 select CPU_SUPPORTS_64BIT_KERNEL
1640 select CPU_SUPPORTS_HIGHMEM
1641 select CPU_SUPPORTS_HUGEPAGES
1645 depends on SYS_HAS_CPU_SB1
1646 select CPU_SUPPORTS_32BIT_KERNEL
1647 select CPU_SUPPORTS_64BIT_KERNEL
1648 select CPU_SUPPORTS_HIGHMEM
1649 select CPU_SUPPORTS_HUGEPAGES
1650 select WEAK_ORDERING
1652 config CPU_CAVIUM_OCTEON
1653 bool "Cavium Octeon processor"
1654 depends on SYS_HAS_CPU_CAVIUM_OCTEON
1655 select CPU_HAS_PREFETCH
1656 select CPU_SUPPORTS_64BIT_KERNEL
1657 select WEAK_ORDERING
1658 select CPU_SUPPORTS_HIGHMEM
1659 select CPU_SUPPORTS_HUGEPAGES
1660 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1661 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1662 select MIPS_L1_CACHE_SHIFT_7
1665 The Cavium Octeon processor is a highly integrated chip containing
1666 many ethernet hardware widgets for networking tasks. The processor
1667 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1668 Full details can be found at http://www.caviumnetworks.com.
1671 bool "Broadcom BMIPS"
1672 depends on SYS_HAS_CPU_BMIPS
1674 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1675 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1676 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1677 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1678 select CPU_SUPPORTS_32BIT_KERNEL
1679 select DMA_NONCOHERENT
1681 select SWAP_IO_SPACE
1682 select WEAK_ORDERING
1683 select CPU_SUPPORTS_HIGHMEM
1684 select CPU_HAS_PREFETCH
1685 select CPU_SUPPORTS_CPUFREQ
1686 select MIPS_EXTERNAL_TIMER
1687 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
1689 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1693 config CPU_MIPS32_3_5_FEATURES
1694 bool "MIPS32 Release 3.5 Features"
1695 depends on SYS_HAS_CPU_MIPS32_R3_5
1696 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1699 Choose this option to build a kernel for release 2 or later of the
1700 MIPS32 architecture including features from the 3.5 release such as
1701 support for Enhanced Virtual Addressing (EVA).
1703 config CPU_MIPS32_3_5_EVA
1704 bool "Enhanced Virtual Addressing (EVA)"
1705 depends on CPU_MIPS32_3_5_FEATURES
1709 Choose this option if you want to enable the Enhanced Virtual
1710 Addressing (EVA) on your MIPS32 core (such as proAptiv).
1711 One of its primary benefits is an increase in the maximum size
1712 of lowmem (up to 3GB). If unsure, say 'N' here.
1714 config CPU_MIPS32_R5_FEATURES
1715 bool "MIPS32 Release 5 Features"
1716 depends on SYS_HAS_CPU_MIPS32_R5
1717 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1719 Choose this option to build a kernel for release 2 or later of the
1720 MIPS32 architecture including features from release 5 such as
1721 support for Extended Physical Addressing (XPA).
1723 config CPU_MIPS32_R5_XPA
1724 bool "Extended Physical Addressing (XPA)"
1725 depends on CPU_MIPS32_R5_FEATURES
1727 depends on !PAGE_SIZE_4KB
1728 depends on SYS_SUPPORTS_HIGHMEM
1731 select PHYS_ADDR_T_64BIT
1734 Choose this option if you want to enable the Extended Physical
1735 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1736 benefit is to increase physical addressing equal to or greater
1737 than 40 bits. Note that this has the side effect of turning on
1738 64-bit addressing which in turn makes the PTEs 64-bit in size.
1739 If unsure, say 'N' here.
1742 config CPU_NOP_WORKAROUNDS
1745 config CPU_JUMP_WORKAROUNDS
1748 config CPU_LOONGSON2F_WORKAROUNDS
1749 bool "Loongson 2F Workarounds"
1751 select CPU_NOP_WORKAROUNDS
1752 select CPU_JUMP_WORKAROUNDS
1754 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1755 require workarounds. Without workarounds the system may hang
1756 unexpectedly. For more information please refer to the gas
1757 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1759 Loongson 2F03 and later have fixed these issues and no workarounds
1760 are needed. The workarounds have no significant side effect on them
1761 but may decrease the performance of the system so this option should
1762 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1765 If unsure, please say Y.
1766 endif # CPU_LOONGSON2F
1768 config SYS_SUPPORTS_ZBOOT
1770 select HAVE_KERNEL_GZIP
1771 select HAVE_KERNEL_BZIP2
1772 select HAVE_KERNEL_LZ4
1773 select HAVE_KERNEL_LZMA
1774 select HAVE_KERNEL_LZO
1775 select HAVE_KERNEL_XZ
1776 select HAVE_KERNEL_ZSTD
1778 config SYS_SUPPORTS_ZBOOT_UART16550
1780 select SYS_SUPPORTS_ZBOOT
1782 config SYS_SUPPORTS_ZBOOT_UART_PROM
1784 select SYS_SUPPORTS_ZBOOT
1786 config CPU_LOONGSON2EF
1788 select CPU_SUPPORTS_32BIT_KERNEL
1789 select CPU_SUPPORTS_64BIT_KERNEL
1790 select CPU_SUPPORTS_HIGHMEM
1791 select CPU_SUPPORTS_HUGEPAGES
1792 select ARCH_HAS_PHYS_TO_DMA
1794 config CPU_LOONGSON32
1798 select CPU_HAS_PREFETCH
1799 select CPU_SUPPORTS_32BIT_KERNEL
1800 select CPU_SUPPORTS_HIGHMEM
1801 select CPU_SUPPORTS_CPUFREQ
1803 config CPU_BMIPS32_3300
1804 select SMP_UP if SMP
1807 config CPU_BMIPS4350
1809 select SYS_SUPPORTS_SMP
1810 select SYS_SUPPORTS_HOTPLUG_CPU
1812 config CPU_BMIPS4380
1814 select MIPS_L1_CACHE_SHIFT_6
1815 select SYS_SUPPORTS_SMP
1816 select SYS_SUPPORTS_HOTPLUG_CPU
1819 config CPU_BMIPS5000
1821 select MIPS_CPU_SCACHE
1822 select MIPS_L1_CACHE_SHIFT_7
1823 select SYS_SUPPORTS_SMP
1824 select SYS_SUPPORTS_HOTPLUG_CPU
1827 config SYS_HAS_CPU_LOONGSON64
1829 select CPU_SUPPORTS_CPUFREQ
1832 config SYS_HAS_CPU_LOONGSON2E
1835 config SYS_HAS_CPU_LOONGSON2F
1837 select CPU_SUPPORTS_CPUFREQ
1838 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1840 config SYS_HAS_CPU_LOONGSON1B
1843 config SYS_HAS_CPU_LOONGSON1C
1846 config SYS_HAS_CPU_MIPS32_R1
1849 config SYS_HAS_CPU_MIPS32_R2
1852 config SYS_HAS_CPU_MIPS32_R3_5
1855 config SYS_HAS_CPU_MIPS32_R5
1857 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1859 config SYS_HAS_CPU_MIPS32_R6
1861 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1863 config SYS_HAS_CPU_MIPS64_R1
1866 config SYS_HAS_CPU_MIPS64_R2
1869 config SYS_HAS_CPU_MIPS64_R5
1871 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1873 config SYS_HAS_CPU_MIPS64_R6
1875 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1877 config SYS_HAS_CPU_P5600
1879 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1881 config SYS_HAS_CPU_R3000
1884 config SYS_HAS_CPU_R4300
1887 config SYS_HAS_CPU_R4X00
1890 config SYS_HAS_CPU_TX49XX
1893 config SYS_HAS_CPU_R5000
1896 config SYS_HAS_CPU_R5500
1899 config SYS_HAS_CPU_NEVADA
1902 config SYS_HAS_CPU_R10000
1904 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1906 config SYS_HAS_CPU_RM7000
1909 config SYS_HAS_CPU_SB1
1912 config SYS_HAS_CPU_CAVIUM_OCTEON
1915 config SYS_HAS_CPU_BMIPS
1918 config SYS_HAS_CPU_BMIPS32_3300
1920 select SYS_HAS_CPU_BMIPS
1922 config SYS_HAS_CPU_BMIPS4350
1924 select SYS_HAS_CPU_BMIPS
1926 config SYS_HAS_CPU_BMIPS4380
1928 select SYS_HAS_CPU_BMIPS
1930 config SYS_HAS_CPU_BMIPS5000
1932 select SYS_HAS_CPU_BMIPS
1933 select ARCH_HAS_SYNC_DMA_FOR_CPU
1936 # CPU may reorder R->R, R->W, W->R, W->W
1937 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
1939 config WEAK_ORDERING
1943 # CPU may reorder reads and writes beyond LL/SC
1944 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
1946 config WEAK_REORDERING_BEYOND_LLSC
1951 # These two indicate any level of the MIPS32 and MIPS64 architecture
1955 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
1956 CPU_MIPS32_R6 || CPU_P5600
1960 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
1961 CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
1964 # These indicate the revision of the architecture
1968 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
1972 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
1974 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
1979 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
1981 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
1986 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
1988 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
1989 select HAVE_ARCH_BITREVERSE
1990 select MIPS_ASID_BITS_VARIABLE
1991 select MIPS_CRC_SUPPORT
1994 config TARGET_ISA_REV
1996 default 1 if CPU_MIPSR1
1997 default 2 if CPU_MIPSR2
1998 default 5 if CPU_MIPSR5
1999 default 6 if CPU_MIPSR6
2002 Reflects the ISA revision being targeted by the kernel build. This
2003 is effectively the Kconfig equivalent of MIPS_ISA_REV.
2011 config SYS_SUPPORTS_32BIT_KERNEL
2013 config SYS_SUPPORTS_64BIT_KERNEL
2015 config CPU_SUPPORTS_32BIT_KERNEL
2017 config CPU_SUPPORTS_64BIT_KERNEL
2019 config CPU_SUPPORTS_CPUFREQ
2021 config CPU_SUPPORTS_ADDRWINCFG
2023 config CPU_SUPPORTS_HUGEPAGES
2025 depends on !(32BIT && (PHYS_ADDR_T_64BIT || EVA))
2026 config MIPS_PGD_C0_CONTEXT
2029 default y if (CPU_MIPSR2 || CPU_MIPSR6)
2032 # Set to y for ptrace access to watch registers.
2034 config HARDWARE_WATCHPOINTS
2036 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
2041 prompt "Kernel code model"
2043 You should only select this option if you have a workload that
2044 actually benefits from 64-bit processing or if your machine has
2045 large memory. You will only be presented a single option in this
2046 menu if your system does not support both 32-bit and 64-bit kernels.
2049 bool "32-bit kernel"
2050 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2053 Select this option if you want to build a 32-bit kernel.
2056 bool "64-bit kernel"
2057 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2059 Select this option if you want to build a 64-bit kernel.
2063 config MIPS_VA_BITS_48
2064 bool "48 bits virtual memory"
2067 Support a maximum at least 48 bits of application virtual
2068 memory. Default is 40 bits or less, depending on the CPU.
2069 For page sizes 16k and above, this option results in a small
2070 memory overhead for page tables. For 4k page size, a fourth
2071 level of page tables is added which imposes both a memory
2072 overhead as well as slower TLB fault handling.
2076 config ZBOOT_LOAD_ADDRESS
2077 hex "Compressed kernel load address"
2078 default 0xffffffff80400000 if BCM47XX
2080 depends on SYS_SUPPORTS_ZBOOT
2082 The address to load compressed kernel, aka vmlinuz.
2084 This is only used if non-zero.
2087 prompt "Kernel page size"
2088 default PAGE_SIZE_4KB
2090 config PAGE_SIZE_4KB
2092 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
2094 This option select the standard 4kB Linux page size. On some
2095 R3000-family processors this is the only available page size. Using
2096 4kB page size will minimize memory consumption and is therefore
2097 recommended for low memory systems.
2099 config PAGE_SIZE_8KB
2101 depends on CPU_CAVIUM_OCTEON
2102 depends on !MIPS_VA_BITS_48
2104 Using 8kB page size will result in higher performance kernel at
2105 the price of higher memory consumption. This option is available
2106 only on cnMIPS processors. Note that you will need a suitable Linux
2107 distribution to support this.
2109 config PAGE_SIZE_16KB
2111 depends on !CPU_R3000
2113 Using 16kB page size will result in higher performance kernel at
2114 the price of higher memory consumption. This option is available on
2115 all non-R3000 family processors. Note that you will need a suitable
2116 Linux distribution to support this.
2118 config PAGE_SIZE_32KB
2120 depends on CPU_CAVIUM_OCTEON
2121 depends on !MIPS_VA_BITS_48
2123 Using 32kB page size will result in higher performance kernel at
2124 the price of higher memory consumption. This option is available
2125 only on cnMIPS cores. Note that you will need a suitable Linux
2126 distribution to support this.
2128 config PAGE_SIZE_64KB
2130 depends on !CPU_R3000
2132 Using 64kB page size will result in higher performance kernel at
2133 the price of higher memory consumption. This option is available on
2134 all non-R3000 family processor. Not that at the time of this
2135 writing this option is still high experimental.
2139 config ARCH_FORCE_MAX_ORDER
2140 int "Maximum zone order"
2141 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2142 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2143 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2144 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2145 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2146 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2150 The kernel memory allocator divides physically contiguous memory
2151 blocks into "zones", where each zone is a power of two number of
2152 pages. This option selects the largest power of two that the kernel
2153 keeps in the memory allocator. If you need to allocate very large
2154 blocks of physically contiguous memory, then you may need to
2155 increase this value.
2157 This config option is actually maximum order plus one. For example,
2158 a value of 11 means that the largest free memory block is 2^10 pages.
2160 The page size is not necessarily 4KB. Keep this in mind
2161 when choosing a value for this option.
2166 config IP22_CPU_SCACHE
2171 # Support for a MIPS32 / MIPS64 style S-caches
2173 config MIPS_CPU_SCACHE
2177 config R5000_CPU_SCACHE
2181 config RM7000_CPU_SCACHE
2185 config SIBYTE_DMA_PAGEOPS
2186 bool "Use DMA to clear/copy pages"
2189 Instead of using the CPU to zero and copy pages, use a Data Mover
2190 channel. These DMA channels are otherwise unused by the standard
2191 SiByte Linux port. Seems to give a small performance benefit.
2193 config CPU_HAS_PREFETCH
2196 config CPU_GENERIC_DUMP_TLB
2198 default y if !CPU_R3000
2200 config MIPS_FP_SUPPORT
2201 bool "Floating Point support" if EXPERT
2204 Select y to include support for floating point in the kernel
2205 including initialization of FPU hardware, FP context save & restore
2206 and emulation of an FPU where necessary. Without this support any
2207 userland program attempting to use floating point instructions will
2210 If you know that your userland will not attempt to use floating point
2211 instructions then you can say n here to shrink the kernel a little.
2215 config CPU_R2300_FPU
2217 depends on MIPS_FP_SUPPORT
2218 default y if CPU_R3000
2225 depends on MIPS_FP_SUPPORT
2226 default y if !CPU_R2300_FPU
2228 config CPU_R4K_CACHE_TLB
2230 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2233 bool "MIPS MT SMP support (1 TC on each available VPE)"
2235 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
2236 select CPU_MIPSR2_IRQ_VI
2237 select CPU_MIPSR2_IRQ_EI
2242 select SYS_SUPPORTS_SMP
2243 select SYS_SUPPORTS_SCHED_SMT
2244 select MIPS_PERF_SHARED_TC_COUNTERS
2246 This is a kernel model which is known as SMVP. This is supported
2247 on cores with the MT ASE and uses the available VPEs to implement
2248 virtual processors which supports SMP. This is equivalent to the
2249 Intel Hyperthreading feature. For further information go to
2250 <http://www.imgtec.com/mips/mips-multithreading.asp>.
2256 bool "SMT (multithreading) scheduler support"
2257 depends on SYS_SUPPORTS_SCHED_SMT
2260 SMT scheduler support improves the CPU scheduler's decision making
2261 when dealing with MIPS MT enabled cores at a cost of slightly
2262 increased overhead in some places. If unsure say N here.
2264 config SYS_SUPPORTS_SCHED_SMT
2267 config SYS_SUPPORTS_MULTITHREADING
2270 config MIPS_MT_FPAFF
2271 bool "Dynamic FPU affinity for FP-intensive threads"
2273 depends on MIPS_MT_SMP
2275 config MIPSR2_TO_R6_EMULATOR
2276 bool "MIPS R2-to-R6 emulator"
2277 depends on CPU_MIPSR6
2278 depends on MIPS_FP_SUPPORT
2281 Choose this option if you want to run non-R6 MIPS userland code.
2282 Even if you say 'Y' here, the emulator will still be disabled by
2283 default. You can enable it using the 'mipsr2emu' kernel option.
2284 The only reason this is a build-time option is to save ~14K from the
2287 config SYS_SUPPORTS_VPE_LOADER
2289 depends on SYS_SUPPORTS_MULTITHREADING
2291 Indicates that the platform supports the VPE loader, and provides
2294 config MIPS_VPE_LOADER
2295 bool "VPE loader support."
2296 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2297 select CPU_MIPSR2_IRQ_VI
2298 select CPU_MIPSR2_IRQ_EI
2301 Includes a loader for loading an elf relocatable object
2302 onto another VPE and running it.
2304 config MIPS_VPE_LOADER_CMP
2307 depends on MIPS_VPE_LOADER && MIPS_CMP
2309 config MIPS_VPE_LOADER_MT
2312 depends on MIPS_VPE_LOADER && !MIPS_CMP
2314 config MIPS_VPE_LOADER_TOM
2315 bool "Load VPE program into memory hidden from linux"
2316 depends on MIPS_VPE_LOADER
2319 The loader can use memory that is present but has been hidden from
2320 Linux using the kernel command line option "mem=xxMB". It's up to
2321 you to ensure the amount you put in the option and the space your
2322 program requires is less or equal to the amount physically present.
2324 config MIPS_VPE_APSP_API
2325 bool "Enable support for AP/SP API (RTLX)"
2326 depends on MIPS_VPE_LOADER
2328 config MIPS_VPE_APSP_API_CMP
2331 depends on MIPS_VPE_APSP_API && MIPS_CMP
2333 config MIPS_VPE_APSP_API_MT
2336 depends on MIPS_VPE_APSP_API && !MIPS_CMP
2339 bool "MIPS CMP framework support (DEPRECATED)"
2340 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2343 select SYS_SUPPORTS_SMP
2344 select WEAK_ORDERING
2347 Select this if you are using a bootloader which implements the "CMP
2348 framework" protocol (ie. YAMON) and want your kernel to make use of
2349 its ability to start secondary CPUs.
2351 Unless you have a specific need, you should use CONFIG_MIPS_CPS
2355 bool "MIPS Coherent Processing System support"
2356 depends on SYS_SUPPORTS_MIPS_CPS
2358 select MIPS_CPS_PM if HOTPLUG_CPU
2360 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2361 select SYS_SUPPORTS_HOTPLUG_CPU
2362 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2363 select SYS_SUPPORTS_SMP
2364 select WEAK_ORDERING
2365 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
2367 Select this if you wish to run an SMP kernel across multiple cores
2368 within a MIPS Coherent Processing System. When this option is
2369 enabled the kernel will probe for other cores and boot them with
2370 no external assistance. It is safe to enable this when hardware
2371 support is unavailable.
2384 config SB1_PASS_2_WORKAROUNDS
2386 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2389 config SB1_PASS_2_1_WORKAROUNDS
2391 depends on CPU_SB1 && CPU_SB1_PASS_2
2395 prompt "SmartMIPS or microMIPS ASE support"
2397 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2400 Select this if you want neither microMIPS nor SmartMIPS support
2402 config CPU_HAS_SMARTMIPS
2403 depends on SYS_SUPPORTS_SMARTMIPS
2406 SmartMIPS is a extension of the MIPS32 architecture aimed at
2407 increased security at both hardware and software level for
2408 smartcards. Enabling this option will allow proper use of the
2409 SmartMIPS instructions by Linux applications. However a kernel with
2410 this option will not work on a MIPS core without SmartMIPS core. If
2411 you don't know you probably don't have SmartMIPS and should say N
2414 config CPU_MICROMIPS
2415 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2418 When this option is enabled the kernel will be built using the
2424 bool "Support for the MIPS SIMD Architecture"
2425 depends on CPU_SUPPORTS_MSA
2426 depends on MIPS_FP_SUPPORT
2427 depends on 64BIT || MIPS_O32_FP64_SUPPORT
2429 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2430 and a set of SIMD instructions to operate on them. When this option
2431 is enabled the kernel will support allocating & switching MSA
2432 vector register contexts. If you know that your kernel will only be
2433 running on CPUs which do not support MSA or that your userland will
2434 not be making use of it then you may wish to say N here to reduce
2435 the size & complexity of your kernel.
2446 depends on !CPU_DIEI_BROKEN
2449 config CPU_DIEI_BROKEN
2455 config CPU_NO_LOAD_STORE_LR
2458 CPU lacks support for unaligned load and store instructions:
2459 LWL, LWR, SWL, SWR (Load/store word left/right).
2460 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2464 # Vectored interrupt mode is an R2 feature
2466 config CPU_MIPSR2_IRQ_VI
2470 # Extended interrupt mode is an R2 feature
2472 config CPU_MIPSR2_IRQ_EI
2477 depends on !CPU_R3000
2484 # Work around the "daddi" and "daddiu" CPU errata:
2486 # - The `daddi' instruction fails to trap on overflow.
2487 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2490 # - The `daddiu' instruction can produce an incorrect result.
2491 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2493 # "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
2495 # "MIPS R4400PC/SC Errata, Processor Revision 1.0", erratum #7
2496 # "MIPS R4400MC Errata, Processor Revision 1.0", erratum #5
2497 config CPU_DADDI_WORKAROUNDS
2500 # Work around certain R4000 CPU errata (as implemented by GCC):
2502 # - A double-word or a variable shift may give an incorrect result
2503 # if executed immediately after starting an integer division:
2504 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2506 # "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
2509 # - A double-word or a variable shift may give an incorrect result
2510 # if executed while an integer multiplication is in progress:
2511 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2514 # - An integer division may give an incorrect result if started in
2515 # a delay slot of a taken branch or a jump:
2516 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2518 config CPU_R4000_WORKAROUNDS
2520 select CPU_R4400_WORKAROUNDS
2522 # Work around certain R4400 CPU errata (as implemented by GCC):
2524 # - A double-word or a variable shift may give an incorrect result
2525 # if executed immediately after starting an integer division:
2526 # "MIPS R4400MC Errata, Processor Revision 1.0", erratum #10
2527 # "MIPS R4400MC Errata, Processor Revision 2.0 & 3.0", erratum #4
2528 config CPU_R4400_WORKAROUNDS
2531 config CPU_R4X00_BUGS64
2533 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2535 config MIPS_ASID_SHIFT
2537 default 6 if CPU_R3000
2540 config MIPS_ASID_BITS
2542 default 0 if MIPS_ASID_BITS_VARIABLE
2543 default 6 if CPU_R3000
2546 config MIPS_ASID_BITS_VARIABLE
2549 config MIPS_CRC_SUPPORT
2552 # R4600 erratum. Due to the lack of errata information the exact
2553 # technical details aren't known. I've experimentally found that disabling
2554 # interrupts during indexed I-cache flushes seems to be sufficient to deal
2556 config WAR_R4600_V1_INDEX_ICACHEOP
2559 # Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
2561 # 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2562 # Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2563 # executed if there is no other dcache activity. If the dcache is
2564 # accessed for another instruction immediately preceding when these
2565 # cache instructions are executing, it is possible that the dcache
2566 # tag match outputs used by these cache instructions will be
2567 # incorrect. These cache instructions should be preceded by at least
2568 # four instructions that are not any kind of load or store
2571 # This is not allowed: lw
2575 # cache Hit_Writeback_Invalidate_D
2577 # This is allowed: lw
2582 # cache Hit_Writeback_Invalidate_D
2583 config WAR_R4600_V1_HIT_CACHEOP
2586 # Writeback and invalidate the primary cache dcache before DMA.
2588 # R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2589 # Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2590 # operate correctly if the internal data cache refill buffer is empty. These
2591 # CACHE instructions should be separated from any potential data cache miss
2592 # by a load instruction to an uncached address to empty the response buffer."
2593 # (Revision 2.0 device errata from IDT available on https://www.idt.com/
2595 config WAR_R4600_V2_HIT_CACHEOP
2598 # From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2599 # the line which this instruction itself exists, the following
2600 # operation is not guaranteed."
2602 # Workaround: do two phase flushing for Index_Invalidate_I
2603 config WAR_TX49XX_ICACHE_INDEX_INV
2606 # The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2607 # opposes it being called that) where invalid instructions in the same
2608 # I-cache line worth of instructions being fetched may case spurious
2610 config WAR_ICACHE_REFILLS
2613 # On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2614 # may cause ll / sc and lld / scd sequences to execute non-atomically.
2615 config WAR_R10000_LLSC
2618 # 34K core erratum: "Problems Executing the TLBR Instruction"
2619 config WAR_MIPS34K_MISSED_ITLB
2623 # - Highmem only makes sense for the 32-bit kernel.
2624 # - The current highmem code will only work properly on physically indexed
2625 # caches such as R3000, SB1, R7000 or those that look like they're virtually
2626 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2627 # moment we protect the user and offer the highmem option only on machines
2628 # where it's known to be safe. This will not offer highmem on a few systems
2629 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2630 # indexed CPUs but we're playing safe.
2631 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2632 # know they might have memory configurations that could make use of highmem
2636 bool "High Memory Support"
2637 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2640 config CPU_SUPPORTS_HIGHMEM
2643 config SYS_SUPPORTS_HIGHMEM
2646 config SYS_SUPPORTS_SMARTMIPS
2649 config SYS_SUPPORTS_MICROMIPS
2652 config SYS_SUPPORTS_MIPS16
2655 This option must be set if a kernel might be executed on a MIPS16-
2656 enabled CPU even if MIPS16 is not actually being used. In other
2657 words, it makes the kernel MIPS16-tolerant.
2659 config CPU_SUPPORTS_MSA
2662 config ARCH_FLATMEM_ENABLE
2664 depends on !NUMA && !CPU_LOONGSON2EF
2666 config ARCH_SPARSEMEM_ENABLE
2671 depends on SYS_SUPPORTS_NUMA
2673 select HAVE_SETUP_PER_CPU_AREA
2674 select NEED_PER_CPU_EMBED_FIRST_CHUNK
2676 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2677 Access). This option improves performance on systems with more
2678 than two nodes; on two node systems it is generally better to
2679 leave it disabled; on single node systems leave this option
2682 config SYS_SUPPORTS_NUMA
2685 config HAVE_ARCH_NODEDATA_EXTENSION
2689 bool "Relocatable kernel"
2690 depends on SYS_SUPPORTS_RELOCATABLE
2691 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2692 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2693 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
2694 CPU_P5600 || CAVIUM_OCTEON_SOC || \
2697 This builds a kernel image that retains relocation information
2698 so it can be loaded someplace besides the default 1MB.
2699 The relocations make the kernel binary about 15% larger,
2700 but are discarded at runtime
2702 config RELOCATION_TABLE_SIZE
2703 hex "Relocation table size"
2704 depends on RELOCATABLE
2705 range 0x0 0x01000000
2706 default "0x00200000" if CPU_LOONGSON64
2707 default "0x00100000"
2709 A table of relocation data will be appended to the kernel binary
2710 and parsed at boot to fix up the relocated kernel.
2712 This option allows the amount of space reserved for the table to be
2713 adjusted, although the default of 1Mb should be ok in most cases.
2715 The build will fail and a valid size suggested if this is too small.
2717 If unsure, leave at the default value.
2719 config RANDOMIZE_BASE
2720 bool "Randomize the address of the kernel image"
2721 depends on RELOCATABLE
2723 Randomizes the physical and virtual address at which the
2724 kernel image is loaded, as a security feature that
2725 deters exploit attempts relying on knowledge of the location
2726 of kernel internals.
2728 Entropy is generated using any coprocessor 0 registers available.
2730 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2734 config RANDOMIZE_BASE_MAX_OFFSET
2735 hex "Maximum kASLR offset" if EXPERT
2736 depends on RANDOMIZE_BASE
2737 range 0x0 0x40000000 if EVA || 64BIT
2738 range 0x0 0x08000000
2739 default "0x01000000"
2741 When kASLR is active, this provides the maximum offset that will
2742 be applied to the kernel image. It should be set according to the
2743 amount of physical RAM available in the target system minus
2744 PHYSICAL_START and must be a power of 2.
2746 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2747 EVA or 64-bit. The default is 16Mb.
2754 config HW_PERF_EVENTS
2755 bool "Enable hardware performance counter support for perf events"
2756 depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_LOONGSON64)
2759 Enable hardware performance counter support for perf events. If
2760 disabled, perf events will use software events only.
2763 bool "Enable DMI scanning"
2764 depends on MACH_LOONGSON64
2765 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2768 Enabled scanning of DMI to identify machine quirks. Say Y
2769 here unless you have verified that your setup is not
2770 affected by entries in the DMI blacklist. Required by PNP
2774 bool "Multi-Processing support"
2775 depends on SYS_SUPPORTS_SMP
2777 This enables support for systems with more than one CPU. If you have
2778 a system with only one CPU, say N. If you have a system with more
2779 than one CPU, say Y.
2781 If you say N here, the kernel will run on uni- and multiprocessor
2782 machines, but will use only one CPU of a multiprocessor machine. If
2783 you say Y here, the kernel will run on many, but not all,
2784 uniprocessor machines. On a uniprocessor machine, the kernel
2785 will run faster if you say N here.
2787 People using multiprocessor machines who say Y here should also say
2788 Y to "Enhanced Real Time Clock Support", below.
2790 See also the SMP-HOWTO available at
2791 <https://www.tldp.org/docs.html#howto>.
2793 If you don't know what to do here, say N.
2796 bool "Support for hot-pluggable CPUs"
2797 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2799 Say Y here to allow turning CPUs off and on. CPUs can be
2800 controlled through /sys/devices/system/cpu.
2801 (Note: power management support will enable this option
2802 automatically on SMP systems. )
2803 Say N if you want to disable CPU hotplug.
2808 config SYS_SUPPORTS_MIPS_CMP
2811 config SYS_SUPPORTS_MIPS_CPS
2814 config SYS_SUPPORTS_SMP
2817 config NR_CPUS_DEFAULT_4
2820 config NR_CPUS_DEFAULT_8
2823 config NR_CPUS_DEFAULT_16
2826 config NR_CPUS_DEFAULT_32
2829 config NR_CPUS_DEFAULT_64
2833 int "Maximum number of CPUs (2-256)"
2836 default "4" if NR_CPUS_DEFAULT_4
2837 default "8" if NR_CPUS_DEFAULT_8
2838 default "16" if NR_CPUS_DEFAULT_16
2839 default "32" if NR_CPUS_DEFAULT_32
2840 default "64" if NR_CPUS_DEFAULT_64
2842 This allows you to specify the maximum number of CPUs which this
2843 kernel will support. The maximum supported value is 32 for 32-bit
2844 kernel and 64 for 64-bit kernels; the minimum value which makes
2845 sense is 1 for Qemu (useful only for kernel debugging purposes)
2846 and 2 for all others.
2848 This is purely to save memory - each supported CPU adds
2849 approximately eight kilobytes to the kernel image. For best
2850 performance should round up your number of processors to the next
2853 config MIPS_PERF_SHARED_TC_COUNTERS
2856 config MIPS_NR_CPU_NR_MAP_1024
2859 config MIPS_NR_CPU_NR_MAP
2862 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2863 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2866 # Timer Interrupt Frequency Configuration
2870 prompt "Timer frequency"
2873 Allows the configuration of the timer frequency.
2876 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2879 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2882 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2885 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2888 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2891 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2894 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2897 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2901 config SYS_SUPPORTS_24HZ
2904 config SYS_SUPPORTS_48HZ
2907 config SYS_SUPPORTS_100HZ
2910 config SYS_SUPPORTS_128HZ
2913 config SYS_SUPPORTS_250HZ
2916 config SYS_SUPPORTS_256HZ
2919 config SYS_SUPPORTS_1000HZ
2922 config SYS_SUPPORTS_1024HZ
2925 config SYS_SUPPORTS_ARBIT_HZ
2927 default y if !SYS_SUPPORTS_24HZ && \
2928 !SYS_SUPPORTS_48HZ && \
2929 !SYS_SUPPORTS_100HZ && \
2930 !SYS_SUPPORTS_128HZ && \
2931 !SYS_SUPPORTS_250HZ && \
2932 !SYS_SUPPORTS_256HZ && \
2933 !SYS_SUPPORTS_1000HZ && \
2934 !SYS_SUPPORTS_1024HZ
2940 default 100 if HZ_100
2941 default 128 if HZ_128
2942 default 250 if HZ_250
2943 default 256 if HZ_256
2944 default 1000 if HZ_1000
2945 default 1024 if HZ_1024
2948 def_bool HIGH_RES_TIMERS
2951 bool "Kexec system call"
2954 kexec is a system call that implements the ability to shutdown your
2955 current kernel, and to start another kernel. It is like a reboot
2956 but it is independent of the system firmware. And like a reboot
2957 you can start any kernel with it, not just Linux.
2959 The name comes from the similarity to the exec system call.
2961 It is an ongoing process to be certain the hardware in a machine
2962 is properly shutdown, so do not be surprised if this code does not
2963 initially work for you. As of this writing the exact hardware
2964 interface is strongly in flux, so no good recommendation can be
2968 bool "Kernel crash dumps"
2970 Generate crash dump after being started by kexec.
2971 This should be normally only set in special crash dump kernels
2972 which are loaded in the main kernel with kexec-tools into
2973 a specially reserved region and then later executed after
2974 a crash by kdump/kexec. The crash dump kernel must be compiled
2975 to a memory address not used by the main kernel or firmware using
2978 config PHYSICAL_START
2979 hex "Physical address where the kernel is loaded"
2980 default "0xffffffff84000000"
2981 depends on CRASH_DUMP
2983 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
2984 If you plan to use kernel for capturing the crash dump change
2985 this value to start of the reserved region (the "X" value as
2986 specified in the "crashkernel=YM@XM" command line boot parameter
2987 passed to the panic-ed kernel).
2989 config MIPS_O32_FP64_SUPPORT
2990 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
2991 depends on 32BIT || MIPS32_O32
2993 When this is enabled, the kernel will support use of 64-bit floating
2994 point registers with binaries using the O32 ABI along with the
2995 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
2996 32-bit MIPS systems this support is at the cost of increasing the
2997 size and complexity of the compiled FPU emulator. Thus if you are
2998 running a MIPS32 system and know that none of your userland binaries
2999 will require 64-bit floating point, you may wish to reduce the size
3000 of your kernel & potentially improve FP emulation performance by
3003 Although binutils currently supports use of this flag the details
3004 concerning its effect upon the O32 ABI in userland are still being
3005 worked on. In order to avoid userland becoming dependent upon current
3006 behaviour before the details have been finalised, this option should
3007 be considered experimental and only enabled by those working upon
3015 select OF_EARLY_FLATTREE
3025 prompt "Kernel appended dtb support" if USE_OF
3026 default MIPS_NO_APPENDED_DTB
3028 config MIPS_NO_APPENDED_DTB
3031 Do not enable appended dtb support.
3033 config MIPS_ELF_APPENDED_DTB
3036 With this option, the boot code will look for a device tree binary
3037 DTB) included in the vmlinux ELF section .appended_dtb. By default
3038 it is empty and the DTB can be appended using binutils command
3041 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
3043 This is meant as a backward compatibility convenience for those
3044 systems with a bootloader that can't be upgraded to accommodate
3045 the documented boot protocol using a device tree.
3047 config MIPS_RAW_APPENDED_DTB
3048 bool "vmlinux.bin or vmlinuz.bin"
3050 With this option, the boot code will look for a device tree binary
3051 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
3052 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
3054 This is meant as a backward compatibility convenience for those
3055 systems with a bootloader that can't be upgraded to accommodate
3056 the documented boot protocol using a device tree.
3058 Beware that there is very little in terms of protection against
3059 this option being confused by leftover garbage in memory that might
3060 look like a DTB header after a reboot if no actual DTB is appended
3061 to vmlinux.bin. Do not leave this option active in a production kernel
3062 if you don't intend to always append a DTB.
3066 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
3067 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
3068 !MACH_LOONGSON64 && !MIPS_MALTA && \
3070 default MIPS_CMDLINE_FROM_BOOTLOADER
3072 config MIPS_CMDLINE_FROM_DTB
3074 bool "Dtb kernel arguments if available"
3076 config MIPS_CMDLINE_DTB_EXTEND
3078 bool "Extend dtb kernel arguments with bootloader arguments"
3080 config MIPS_CMDLINE_FROM_BOOTLOADER
3081 bool "Bootloader kernel arguments if available"
3083 config MIPS_CMDLINE_BUILTIN_EXTEND
3084 depends on CMDLINE_BOOL
3085 bool "Extend builtin kernel arguments with bootloader arguments"
3090 config LOCKDEP_SUPPORT
3094 config STACKTRACE_SUPPORT
3098 config PGTABLE_LEVELS
3100 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3101 default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48)
3104 config MIPS_AUTO_PFN_OFFSET
3107 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3109 config PCI_DRIVERS_GENERIC
3110 select PCI_DOMAINS_GENERIC if PCI
3113 config PCI_DRIVERS_LEGACY
3114 def_bool !PCI_DRIVERS_GENERIC
3115 select NO_GENERIC_PCI_IOPORT_MAP
3116 select PCI_DOMAINS if PCI
3119 # ISA support is now enabled via select. Too many systems still have the one
3120 # or other ISA chip on the board that users don't know about so don't expect
3121 # users to choose the right thing ...
3127 bool "TURBOchannel support"
3128 depends on MACH_DECSTATION
3130 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3131 processors. TURBOchannel programming specifications are available
3133 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3135 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3136 Linux driver support status is documented at:
3137 <http://www.linux-mips.org/wiki/DECstation>
3143 config ARCH_MMAP_RND_BITS_MIN
3147 config ARCH_MMAP_RND_BITS_MAX
3151 config ARCH_MMAP_RND_COMPAT_BITS_MIN
3154 config ARCH_MMAP_RND_COMPAT_BITS_MAX
3161 select MIPS_EXTERNAL_TIMER
3167 config MIPS32_COMPAT
3174 bool "Kernel support for o32 binaries"
3176 select ARCH_WANT_OLD_COMPAT_IPC
3178 select MIPS32_COMPAT
3180 Select this option if you want to run o32 binaries. These are pure
3181 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3182 existing binaries are in this format.
3187 bool "Kernel support for n32 binaries"
3189 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3191 select MIPS32_COMPAT
3193 Select this option if you want to run n32 binaries. These are
3194 64-bit binaries using 32-bit quantities for addressing and certain
3195 data that would normally be 64-bit. They are used in special
3200 config CC_HAS_MNO_BRANCH_LIKELY
3202 depends on $(cc-option,-mno-branch-likely)
3204 # https://github.com/llvm/llvm-project/issues/61045
3205 config CC_HAS_BROKEN_INLINE_COMPAT_BRANCH
3206 def_bool y if CC_IS_CLANG
3208 menu "Power management options"
3210 config ARCH_HIBERNATION_POSSIBLE
3212 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3214 config ARCH_SUSPEND_POSSIBLE
3216 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3218 source "kernel/power/Kconfig"
3222 config MIPS_EXTERNAL_TIMER
3225 menu "CPU Power Management"
3227 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3228 source "drivers/cpufreq/Kconfig"
3229 endif # CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3231 source "drivers/cpuidle/Kconfig"
3235 source "arch/mips/kvm/Kconfig"
3237 source "arch/mips/vdso/Kconfig"