1 # SPDX-License-Identifier: GPL-2.0
5 select ARCH_32BIT_OFF_T if !64BIT
6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7 select ARCH_HAS_CURRENT_STACK_POINTER if !CC_IS_CLANG || CLANG_VERSION >= 140000
8 select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
9 select ARCH_HAS_FORTIFY_SOURCE
11 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
12 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
13 select ARCH_HAS_STRNCPY_FROM_USER
14 select ARCH_HAS_STRNLEN_USER
15 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
16 select ARCH_HAS_UBSAN_SANITIZE_ALL
17 select ARCH_HAS_GCOV_PROFILE_ALL
18 select ARCH_KEEP_MEMBLOCK
19 select ARCH_SUPPORTS_UPROBES
20 select ARCH_USE_BUILTIN_BSWAP
21 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
22 select ARCH_USE_MEMTEST
23 select ARCH_USE_QUEUED_RWLOCKS
24 select ARCH_USE_QUEUED_SPINLOCKS
25 select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES
26 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
27 select ARCH_WANT_IPC_PARSE_VERSION
28 select ARCH_WANT_LD_ORPHAN_WARN
29 select BUILDTIME_TABLE_SORT
30 select CLONE_BACKWARDS
31 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
32 select CPU_PM if CPU_IDLE
33 select GENERIC_ATOMIC64 if !64BIT
34 select GENERIC_CMOS_UPDATE
35 select GENERIC_CPU_AUTOPROBE
36 select GENERIC_GETTIMEOFDAY
38 select GENERIC_IRQ_PROBE
39 select GENERIC_IRQ_SHOW
40 select GENERIC_ISA_DMA if EISA
41 select GENERIC_LIB_ASHLDI3
42 select GENERIC_LIB_ASHRDI3
43 select GENERIC_LIB_CMPDI2
44 select GENERIC_LIB_LSHRDI3
45 select GENERIC_LIB_UCMPDI2
46 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
47 select GENERIC_SMP_IDLE_THREAD
48 select GENERIC_TIME_VSYSCALL
49 select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
50 select HAVE_ARCH_COMPILER_H
51 select HAVE_ARCH_JUMP_LABEL
52 select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
53 select HAVE_ARCH_MMAP_RND_BITS if MMU
54 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
55 select HAVE_ARCH_SECCOMP_FILTER
56 select HAVE_ARCH_TRACEHOOK
57 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
58 select HAVE_ASM_MODVERSIONS
59 select HAVE_CONTEXT_TRACKING_USER
61 select HAVE_C_RECORDMCOUNT
62 select HAVE_DEBUG_KMEMLEAK
63 select HAVE_DEBUG_STACKOVERFLOW
64 select HAVE_DMA_CONTIGUOUS
65 select HAVE_DYNAMIC_FTRACE
66 select HAVE_EBPF_JIT if !CPU_MICROMIPS && \
67 !CPU_DADDI_WORKAROUNDS && \
68 !CPU_R4000_WORKAROUNDS && \
69 !CPU_R4400_WORKAROUNDS
70 select HAVE_EXIT_THREAD
72 select HAVE_FTRACE_MCOUNT_RECORD
73 select HAVE_FUNCTION_GRAPH_TRACER
74 select HAVE_FUNCTION_TRACER
75 select HAVE_GCC_PLUGINS
76 select HAVE_GENERIC_VDSO
77 select HAVE_IOREMAP_PROT
78 select HAVE_IRQ_EXIT_ON_IRQ_STACK
79 select HAVE_IRQ_TIME_ACCOUNTING
81 select HAVE_KRETPROBES
82 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
83 select HAVE_MOD_ARCH_SPECIFIC
85 select HAVE_PERF_EVENTS
87 select HAVE_PERF_USER_STACK_DUMP
88 select HAVE_REGS_AND_STACK_ACCESS_API
90 select HAVE_SPARSE_SYSCALL_NR
91 select HAVE_STACKPROTECTOR
92 select HAVE_SYSCALL_TRACEPOINTS
93 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
94 select IRQ_FORCED_THREADING
96 select MODULES_USE_ELF_REL if MODULES
97 select MODULES_USE_ELF_RELA if MODULES && 64BIT
98 select PERF_USE_VMALLOC
99 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
101 select SYSCTL_EXCEPTION_TRACE
102 select TRACE_IRQFLAGS_SUPPORT
103 select ARCH_HAS_ELFCORE_COMPAT
104 select HAVE_ARCH_KCSAN if 64BIT
106 config MIPS_FIXUP_BIGPHYS_ADDR
114 select SYS_SUPPORTS_32BIT_KERNEL
115 select SYS_SUPPORTS_LITTLE_ENDIAN
116 select SYS_SUPPORTS_ZBOOT
117 select DMA_NONCOHERENT
118 select ARCH_HAS_SYNC_DMA_FOR_CPU
123 select GENERIC_IRQ_CHIP
124 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
126 select CPU_SUPPORTS_CPUFREQ
127 select MIPS_EXTERNAL_TIMER
129 menu "Machine selection"
133 default MIPS_GENERIC_KERNEL
135 config MIPS_GENERIC_KERNEL
136 bool "Generic board-agnostic MIPS kernel"
137 select ARCH_HAS_SETUP_DMA_OPS
142 select CLKSRC_MIPS_GIC
144 select CPU_MIPSR2_IRQ_EI
145 select CPU_MIPSR2_IRQ_VI
147 select DMA_NONCOHERENT
150 select MIPS_AUTO_PFN_OFFSET
151 select MIPS_CPU_SCACHE
153 select MIPS_L1_CACHE_SHIFT_7
154 select NO_EXCEPT_FILL
155 select PCI_DRIVERS_GENERIC
158 select SYS_HAS_CPU_MIPS32_R1
159 select SYS_HAS_CPU_MIPS32_R2
160 select SYS_HAS_CPU_MIPS32_R6
161 select SYS_HAS_CPU_MIPS64_R1
162 select SYS_HAS_CPU_MIPS64_R2
163 select SYS_HAS_CPU_MIPS64_R6
164 select SYS_SUPPORTS_32BIT_KERNEL
165 select SYS_SUPPORTS_64BIT_KERNEL
166 select SYS_SUPPORTS_BIG_ENDIAN
167 select SYS_SUPPORTS_HIGHMEM
168 select SYS_SUPPORTS_LITTLE_ENDIAN
169 select SYS_SUPPORTS_MICROMIPS
170 select SYS_SUPPORTS_MIPS16
171 select SYS_SUPPORTS_MIPS_CPS
172 select SYS_SUPPORTS_MULTITHREADING
173 select SYS_SUPPORTS_RELOCATABLE
174 select SYS_SUPPORTS_SMARTMIPS
175 select SYS_SUPPORTS_ZBOOT
177 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
178 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
179 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
180 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
181 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
182 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
185 Select this to build a kernel which aims to support multiple boards,
186 generally using a flattened device tree passed from the bootloader
187 using the boot protocol defined in the UHI (Unified Hosting
188 Interface) specification.
191 bool "Alchemy processor based machines"
192 select PHYS_ADDR_T_64BIT
196 select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is
197 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
198 select SYS_HAS_CPU_MIPS32_R1
199 select SYS_SUPPORTS_32BIT_KERNEL
200 select SYS_SUPPORTS_APM_EMULATION
202 select SYS_SUPPORTS_ZBOOT
206 bool "Texas Instruments AR7"
209 select DMA_NONCOHERENT
213 select NO_EXCEPT_FILL
215 select SYS_HAS_CPU_MIPS32_R1
216 select SYS_HAS_EARLY_PRINTK
217 select SYS_SUPPORTS_32BIT_KERNEL
218 select SYS_SUPPORTS_LITTLE_ENDIAN
219 select SYS_SUPPORTS_MIPS16
220 select SYS_SUPPORTS_ZBOOT_UART16550
224 Support for the Texas Instruments AR7 System-on-a-Chip
225 family: TNETD7100, 7200 and 7300.
228 bool "Atheros AR231x/AR531x SoC support"
231 select DMA_NONCOHERENT
234 select SYS_HAS_CPU_MIPS32_R1
235 select SYS_SUPPORTS_BIG_ENDIAN
236 select SYS_SUPPORTS_32BIT_KERNEL
237 select SYS_HAS_EARLY_PRINTK
239 Support for Atheros AR231x and Atheros AR531x based boards
242 bool "Atheros AR71XX/AR724X/AR913X based boards"
243 select ARCH_HAS_RESET_CONTROLLER
247 select DMA_NONCOHERENT
252 select SYS_HAS_CPU_MIPS32_R2
253 select SYS_HAS_EARLY_PRINTK
254 select SYS_SUPPORTS_32BIT_KERNEL
255 select SYS_SUPPORTS_BIG_ENDIAN
256 select SYS_SUPPORTS_MIPS16
257 select SYS_SUPPORTS_ZBOOT_UART_PROM
259 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
261 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
264 bool "Broadcom Generic BMIPS kernel"
265 select ARCH_HAS_RESET_CONTROLLER
266 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
268 select NO_EXCEPT_FILL
274 select BCM6345_L1_IRQ
275 select BCM7038_L1_IRQ
276 select BCM7120_L2_IRQ
277 select BRCMSTB_L2_IRQ
279 select DMA_NONCOHERENT
280 select SYS_SUPPORTS_32BIT_KERNEL
281 select SYS_SUPPORTS_LITTLE_ENDIAN
282 select SYS_SUPPORTS_BIG_ENDIAN
283 select SYS_SUPPORTS_HIGHMEM
284 select SYS_HAS_CPU_BMIPS32_3300
285 select SYS_HAS_CPU_BMIPS4350
286 select SYS_HAS_CPU_BMIPS4380
287 select SYS_HAS_CPU_BMIPS5000
289 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
290 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
291 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
292 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
293 select HARDIRQS_SW_RESEND
295 select PCI_DRIVERS_GENERIC
297 Build a generic DT-based kernel image that boots on select
298 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
299 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
300 must be set appropriately for your board.
303 bool "Broadcom BCM47XX based boards"
307 select DMA_NONCOHERENT
310 select SYS_HAS_CPU_MIPS32_R1
311 select NO_EXCEPT_FILL
312 select SYS_SUPPORTS_32BIT_KERNEL
313 select SYS_SUPPORTS_LITTLE_ENDIAN
314 select SYS_SUPPORTS_MIPS16
315 select SYS_SUPPORTS_ZBOOT
316 select SYS_HAS_EARLY_PRINTK
317 select USE_GENERIC_EARLY_PRINTK_8250
319 select LEDS_GPIO_REGISTER
322 select BCM47XX_SSB if !BCM47XX_BCMA
324 Support for BCM47XX based boards
327 bool "Broadcom BCM63XX based boards"
332 select DMA_NONCOHERENT
334 select SYS_SUPPORTS_32BIT_KERNEL
335 select SYS_SUPPORTS_BIG_ENDIAN
336 select SYS_HAS_EARLY_PRINTK
337 select SYS_HAS_CPU_BMIPS32_3300
338 select SYS_HAS_CPU_BMIPS4350
339 select SYS_HAS_CPU_BMIPS4380
342 select MIPS_L1_CACHE_SHIFT_4
343 select HAVE_LEGACY_CLK
345 Support for BCM63XX based boards
352 select DMA_NONCOHERENT
358 select PCI_GT64XXX_PCI0
359 select SYS_HAS_CPU_NEVADA
360 select SYS_HAS_EARLY_PRINTK
361 select SYS_SUPPORTS_32BIT_KERNEL
362 select SYS_SUPPORTS_64BIT_KERNEL
363 select SYS_SUPPORTS_LITTLE_ENDIAN
364 select USE_GENERIC_EARLY_PRINTK_8250
366 config MACH_DECSTATION
370 select CEVT_R4K if CPU_R4X00
372 select CSRC_R4K if CPU_R4X00
373 select CPU_DADDI_WORKAROUNDS if 64BIT
374 select CPU_R4000_WORKAROUNDS if 64BIT
375 select CPU_R4400_WORKAROUNDS if 64BIT
376 select DMA_NONCOHERENT
379 select SYS_HAS_CPU_R3000
380 select SYS_HAS_CPU_R4X00
381 select SYS_SUPPORTS_32BIT_KERNEL
382 select SYS_SUPPORTS_64BIT_KERNEL
383 select SYS_SUPPORTS_LITTLE_ENDIAN
384 select SYS_SUPPORTS_128HZ
385 select SYS_SUPPORTS_256HZ
386 select SYS_SUPPORTS_1024HZ
387 select MIPS_L1_CACHE_SHIFT_4
389 This enables support for DEC's MIPS based workstations. For details
390 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
391 DECstation porting pages on <http://decstation.unix-ag.org/>.
393 If you have one of the following DECstation Models you definitely
394 want to choose R4xx0 for the CPU Type:
401 otherwise choose R3000.
404 bool "Jazz family of machines"
407 select ARCH_MIGHT_HAVE_PC_PARPORT
408 select ARCH_MIGHT_HAVE_PC_SERIO
412 select ARCH_MAY_HAVE_PC_FDC
415 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
416 select GENERIC_ISA_DMA
417 select HAVE_PCSPKR_PLATFORM
422 select SYS_HAS_CPU_R4X00
423 select SYS_SUPPORTS_32BIT_KERNEL
424 select SYS_SUPPORTS_64BIT_KERNEL
425 select SYS_SUPPORTS_100HZ
426 select SYS_SUPPORTS_LITTLE_ENDIAN
428 This a family of machines based on the MIPS R4030 chipset which was
429 used by several vendors to build RISC/os and Windows NT workstations.
430 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
431 Olivetti M700-10 workstations.
433 config MACH_INGENIC_SOC
434 bool "Ingenic SoC based machines"
437 select SYS_SUPPORTS_ZBOOT_UART16550
438 select CPU_SUPPORTS_CPUFREQ
439 select MIPS_EXTERNAL_TIMER
442 bool "Lantiq based platforms"
443 select DMA_NONCOHERENT
447 select SYS_HAS_CPU_MIPS32_R1
448 select SYS_HAS_CPU_MIPS32_R2
449 select SYS_SUPPORTS_BIG_ENDIAN
450 select SYS_SUPPORTS_32BIT_KERNEL
451 select SYS_SUPPORTS_MIPS16
452 select SYS_SUPPORTS_MULTITHREADING
453 select SYS_SUPPORTS_VPE_LOADER
454 select SYS_HAS_EARLY_PRINTK
458 select HAVE_LEGACY_CLK
461 select PINCTRL_LANTIQ
462 select ARCH_HAS_RESET_CONTROLLER
463 select RESET_CONTROLLER
465 config MACH_LOONGSON32
466 bool "Loongson 32-bit family of machines"
467 select SYS_SUPPORTS_ZBOOT
469 This enables support for the Loongson-1 family of machines.
471 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
472 the Institute of Computing Technology (ICT), Chinese Academy of
475 config MACH_LOONGSON2EF
476 bool "Loongson-2E/F family of machines"
477 select SYS_SUPPORTS_ZBOOT
479 This enables the support of early Loongson-2E/F family of machines.
481 config MACH_LOONGSON64
482 bool "Loongson 64-bit family of machines"
483 select ARCH_SPARSEMEM_ENABLE
484 select ARCH_MIGHT_HAVE_PC_PARPORT
485 select ARCH_MIGHT_HAVE_PC_SERIO
486 select GENERIC_ISA_DMA_SUPPORT_BROKEN
496 select NO_EXCEPT_FILL
497 select NR_CPUS_DEFAULT_64
498 select USE_GENERIC_EARLY_PRINTK_8250
499 select PCI_DRIVERS_GENERIC
500 select SYS_HAS_CPU_LOONGSON64
501 select SYS_HAS_EARLY_PRINTK
502 select SYS_SUPPORTS_SMP
503 select SYS_SUPPORTS_HOTPLUG_CPU
504 select SYS_SUPPORTS_NUMA
505 select SYS_SUPPORTS_64BIT_KERNEL
506 select SYS_SUPPORTS_HIGHMEM
507 select SYS_SUPPORTS_LITTLE_ENDIAN
508 select SYS_SUPPORTS_ZBOOT
509 select SYS_SUPPORTS_RELOCATABLE
514 select PCI_HOST_GENERIC
515 select HAVE_ARCH_NODEDATA_EXTENSION if NUMA
517 This enables the support of Loongson-2/3 family of machines.
519 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
520 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
521 and Loongson-2F which will be removed), developed by the Institute
522 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
525 bool "MIPS Malta board"
526 select ARCH_MAY_HAVE_PC_FDC
527 select ARCH_MIGHT_HAVE_PC_PARPORT
528 select ARCH_MIGHT_HAVE_PC_SERIO
533 select CLKSRC_MIPS_GIC
536 select DMA_NONCOHERENT
537 select GENERIC_ISA_DMA
538 select HAVE_PCSPKR_PLATFORM
544 select MIPS_CPU_SCACHE
546 select MIPS_L1_CACHE_SHIFT_6
548 select PCI_GT64XXX_PCI0
551 select SYS_HAS_CPU_MIPS32_R1
552 select SYS_HAS_CPU_MIPS32_R2
553 select SYS_HAS_CPU_MIPS32_R3_5
554 select SYS_HAS_CPU_MIPS32_R5
555 select SYS_HAS_CPU_MIPS32_R6
556 select SYS_HAS_CPU_MIPS64_R1
557 select SYS_HAS_CPU_MIPS64_R2
558 select SYS_HAS_CPU_MIPS64_R6
559 select SYS_HAS_CPU_NEVADA
560 select SYS_HAS_CPU_RM7000
561 select SYS_SUPPORTS_32BIT_KERNEL
562 select SYS_SUPPORTS_64BIT_KERNEL
563 select SYS_SUPPORTS_BIG_ENDIAN
564 select SYS_SUPPORTS_HIGHMEM
565 select SYS_SUPPORTS_LITTLE_ENDIAN
566 select SYS_SUPPORTS_MICROMIPS
567 select SYS_SUPPORTS_MIPS16
568 select SYS_SUPPORTS_MIPS_CMP
569 select SYS_SUPPORTS_MIPS_CPS
570 select SYS_SUPPORTS_MULTITHREADING
571 select SYS_SUPPORTS_RELOCATABLE
572 select SYS_SUPPORTS_SMARTMIPS
573 select SYS_SUPPORTS_VPE_LOADER
574 select SYS_SUPPORTS_ZBOOT
576 select WAR_ICACHE_REFILLS
577 select ZONE_DMA32 if 64BIT
579 This enables support for the MIPS Technologies Malta evaluation
583 bool "Microchip PIC32 Family"
585 This enables support for the Microchip PIC32 family of platforms.
587 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
591 bool "NEC VR4100 series based machines"
594 select SYS_HAS_CPU_VR41XX
595 select SYS_SUPPORTS_MIPS16
598 config MACH_NINTENDO64
599 bool "Nintendo 64 console"
602 select SYS_HAS_CPU_R4300
603 select SYS_SUPPORTS_BIG_ENDIAN
604 select SYS_SUPPORTS_ZBOOT
605 select SYS_SUPPORTS_32BIT_KERNEL
606 select SYS_SUPPORTS_64BIT_KERNEL
607 select DMA_NONCOHERENT
611 bool "Ralink based machines"
616 select DMA_NONCOHERENT
619 select SYS_HAS_CPU_MIPS32_R1
620 select SYS_HAS_CPU_MIPS32_R2
621 select SYS_SUPPORTS_32BIT_KERNEL
622 select SYS_SUPPORTS_LITTLE_ENDIAN
623 select SYS_SUPPORTS_MIPS16
624 select SYS_SUPPORTS_ZBOOT
625 select SYS_HAS_EARLY_PRINTK
626 select ARCH_HAS_RESET_CONTROLLER
627 select RESET_CONTROLLER
629 config MACH_REALTEK_RTL
630 bool "Realtek RTL838x/RTL839x based machines"
632 select DMA_NONCOHERENT
636 select SYS_HAS_CPU_MIPS32_R1
637 select SYS_HAS_CPU_MIPS32_R2
638 select SYS_SUPPORTS_BIG_ENDIAN
639 select SYS_SUPPORTS_32BIT_KERNEL
640 select SYS_SUPPORTS_MIPS16
641 select SYS_SUPPORTS_MULTITHREADING
642 select SYS_SUPPORTS_VPE_LOADER
648 bool "SGI IP22 (Indy/Indigo2)"
653 select ARCH_MIGHT_HAVE_PC_SERIO
657 select DEFAULT_SGI_PARTITION
658 select DMA_NONCOHERENT
662 select IP22_CPU_SCACHE
664 select GENERIC_ISA_DMA_SUPPORT_BROKEN
666 select SGI_HAS_INDYDOG
672 select SYS_HAS_CPU_R4X00
673 select SYS_HAS_CPU_R5000
674 select SYS_HAS_EARLY_PRINTK
675 select SYS_SUPPORTS_32BIT_KERNEL
676 select SYS_SUPPORTS_64BIT_KERNEL
677 select SYS_SUPPORTS_BIG_ENDIAN
678 select WAR_R4600_V1_INDEX_ICACHEOP
679 select WAR_R4600_V1_HIT_CACHEOP
680 select WAR_R4600_V2_HIT_CACHEOP
681 select MIPS_L1_CACHE_SHIFT_7
683 This are the SGI Indy, Challenge S and Indigo2, as well as certain
684 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
685 that runs on these, say Y here.
688 bool "SGI IP27 (Origin200/2000)"
689 select ARCH_HAS_PHYS_TO_DMA
690 select ARCH_SPARSEMEM_ENABLE
693 select ARC_CMDLINE_ONLY
695 select DEFAULT_SGI_PARTITION
697 select SYS_HAS_EARLY_PRINTK
700 select IRQ_DOMAIN_HIERARCHY
701 select NR_CPUS_DEFAULT_64
702 select PCI_DRIVERS_GENERIC
703 select PCI_XTALK_BRIDGE
704 select SYS_HAS_CPU_R10000
705 select SYS_SUPPORTS_64BIT_KERNEL
706 select SYS_SUPPORTS_BIG_ENDIAN
707 select SYS_SUPPORTS_NUMA
708 select SYS_SUPPORTS_SMP
709 select WAR_R10000_LLSC
710 select MIPS_L1_CACHE_SHIFT_7
712 select HAVE_ARCH_NODEDATA_EXTENSION
714 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
715 workstations. To compile a Linux kernel that runs on these, say Y
719 bool "SGI IP28 (Indigo2 R10k)"
724 select ARCH_MIGHT_HAVE_PC_SERIO
728 select DEFAULT_SGI_PARTITION
729 select DMA_NONCOHERENT
730 select GENERIC_ISA_DMA_SUPPORT_BROKEN
736 select SGI_HAS_INDYDOG
742 select SYS_HAS_CPU_R10000
743 select SYS_HAS_EARLY_PRINTK
744 select SYS_SUPPORTS_64BIT_KERNEL
745 select SYS_SUPPORTS_BIG_ENDIAN
746 select WAR_R10000_LLSC
747 select MIPS_L1_CACHE_SHIFT_7
749 This is the SGI Indigo2 with R10000 processor. To compile a Linux
750 kernel that runs on these, say Y here.
753 bool "SGI IP30 (Octane/Octane2)"
754 select ARCH_HAS_PHYS_TO_DMA
761 select SYNC_R4K if SMP
765 select IRQ_DOMAIN_HIERARCHY
766 select PCI_DRIVERS_GENERIC
767 select PCI_XTALK_BRIDGE
768 select SYS_HAS_EARLY_PRINTK
769 select SYS_HAS_CPU_R10000
770 select SYS_SUPPORTS_64BIT_KERNEL
771 select SYS_SUPPORTS_BIG_ENDIAN
772 select SYS_SUPPORTS_SMP
773 select WAR_R10000_LLSC
774 select MIPS_L1_CACHE_SHIFT_7
777 These are the SGI Octane and Octane2 graphics workstations. To
778 compile a Linux kernel that runs on these, say Y here.
784 select ARCH_HAS_PHYS_TO_DMA
790 select DMA_NONCOHERENT
793 select R5000_CPU_SCACHE
794 select RM7000_CPU_SCACHE
795 select SYS_HAS_CPU_R5000
796 select SYS_HAS_CPU_R10000 if BROKEN
797 select SYS_HAS_CPU_RM7000
798 select SYS_HAS_CPU_NEVADA
799 select SYS_SUPPORTS_64BIT_KERNEL
800 select SYS_SUPPORTS_BIG_ENDIAN
801 select WAR_ICACHE_REFILLS
803 If you want this kernel to run on SGI O2 workstation, say Y here.
806 bool "Sibyte BCM91120C-CRhine"
808 select SIBYTE_BCM1120
810 select SYS_HAS_CPU_SB1
811 select SYS_SUPPORTS_BIG_ENDIAN
812 select SYS_SUPPORTS_LITTLE_ENDIAN
815 bool "Sibyte BCM91120x-Carmel"
817 select SIBYTE_BCM1120
819 select SYS_HAS_CPU_SB1
820 select SYS_SUPPORTS_BIG_ENDIAN
821 select SYS_SUPPORTS_LITTLE_ENDIAN
824 bool "Sibyte BCM91125C-CRhone"
826 select SIBYTE_BCM1125
828 select SYS_HAS_CPU_SB1
829 select SYS_SUPPORTS_BIG_ENDIAN
830 select SYS_SUPPORTS_HIGHMEM
831 select SYS_SUPPORTS_LITTLE_ENDIAN
834 bool "Sibyte BCM91125E-Rhone"
836 select SIBYTE_BCM1125H
838 select SYS_HAS_CPU_SB1
839 select SYS_SUPPORTS_BIG_ENDIAN
840 select SYS_SUPPORTS_LITTLE_ENDIAN
843 bool "Sibyte BCM91250A-SWARM"
845 select HAVE_PATA_PLATFORM
848 select SYS_HAS_CPU_SB1
849 select SYS_SUPPORTS_BIG_ENDIAN
850 select SYS_SUPPORTS_HIGHMEM
851 select SYS_SUPPORTS_LITTLE_ENDIAN
852 select ZONE_DMA32 if 64BIT
853 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
855 config SIBYTE_LITTLESUR
856 bool "Sibyte BCM91250C2-LittleSur"
858 select HAVE_PATA_PLATFORM
861 select SYS_HAS_CPU_SB1
862 select SYS_SUPPORTS_BIG_ENDIAN
863 select SYS_SUPPORTS_HIGHMEM
864 select SYS_SUPPORTS_LITTLE_ENDIAN
865 select ZONE_DMA32 if 64BIT
867 config SIBYTE_SENTOSA
868 bool "Sibyte BCM91250E-Sentosa"
872 select SYS_HAS_CPU_SB1
873 select SYS_SUPPORTS_BIG_ENDIAN
874 select SYS_SUPPORTS_LITTLE_ENDIAN
875 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
878 bool "Sibyte BCM91480B-BigSur"
880 select NR_CPUS_DEFAULT_4
881 select SIBYTE_BCM1x80
883 select SYS_HAS_CPU_SB1
884 select SYS_SUPPORTS_BIG_ENDIAN
885 select SYS_SUPPORTS_HIGHMEM
886 select SYS_SUPPORTS_LITTLE_ENDIAN
887 select ZONE_DMA32 if 64BIT
888 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
891 bool "SNI RM200/300/400"
894 select FW_ARC if CPU_LITTLE_ENDIAN
895 select FW_ARC32 if CPU_LITTLE_ENDIAN
896 select FW_SNIPROM if CPU_BIG_ENDIAN
897 select ARCH_MAY_HAVE_PC_FDC
898 select ARCH_MIGHT_HAVE_PC_PARPORT
899 select ARCH_MIGHT_HAVE_PC_SERIO
903 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
904 select DMA_NONCOHERENT
905 select GENERIC_ISA_DMA
907 select HAVE_PCSPKR_PLATFORM
913 select MIPS_L1_CACHE_SHIFT_6
914 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
915 select SYS_HAS_CPU_R4X00
916 select SYS_HAS_CPU_R5000
917 select SYS_HAS_CPU_R10000
918 select R5000_CPU_SCACHE
919 select SYS_HAS_EARLY_PRINTK
920 select SYS_SUPPORTS_32BIT_KERNEL
921 select SYS_SUPPORTS_64BIT_KERNEL
922 select SYS_SUPPORTS_BIG_ENDIAN
923 select SYS_SUPPORTS_HIGHMEM
924 select SYS_SUPPORTS_LITTLE_ENDIAN
925 select WAR_R4600_V2_HIT_CACHEOP
927 The SNI RM200/300/400 are MIPS-based machines manufactured by
928 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
929 Technology and now in turn merged with Fujitsu. Say Y here to
930 support this machine type.
933 bool "Toshiba TX49 series based machines"
934 select WAR_TX49XX_ICACHE_INDEX_INV
936 config MIKROTIK_RB532
937 bool "Mikrotik RB532 boards"
940 select DMA_NONCOHERENT
943 select SYS_HAS_CPU_MIPS32_R1
944 select SYS_SUPPORTS_32BIT_KERNEL
945 select SYS_SUPPORTS_LITTLE_ENDIAN
949 select MIPS_L1_CACHE_SHIFT_4
951 Support the Mikrotik(tm) RouterBoard 532 series,
952 based on the IDT RC32434 SoC.
954 config CAVIUM_OCTEON_SOC
955 bool "Cavium Networks Octeon SoC based boards"
957 select ARCH_HAS_PHYS_TO_DMA
959 select PHYS_ADDR_T_64BIT
960 select SYS_SUPPORTS_64BIT_KERNEL
961 select SYS_SUPPORTS_BIG_ENDIAN
963 select EDAC_ATOMIC_SCRUB
964 select SYS_SUPPORTS_LITTLE_ENDIAN
965 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
966 select SYS_HAS_EARLY_PRINTK
967 select SYS_HAS_CPU_CAVIUM_OCTEON
969 select HAVE_PLAT_DELAY
970 select HAVE_PLAT_FW_INIT_CMDLINE
971 select HAVE_PLAT_MEMCPY
975 select ARCH_SPARSEMEM_ENABLE
976 select SYS_SUPPORTS_SMP
977 select NR_CPUS_DEFAULT_64
978 select MIPS_NR_CPU_NR_MAP_1024
981 select MTD_COMPLEX_MAPPINGS
983 select SYS_SUPPORTS_RELOCATABLE
985 This option supports all of the Octeon reference boards from Cavium
986 Networks. It builds a kernel that dynamically determines the Octeon
987 CPU type and supports all known board reference implementations.
988 Some of the supported boards are:
995 Say Y here for most Octeon reference boards.
999 source "arch/mips/alchemy/Kconfig"
1000 source "arch/mips/ath25/Kconfig"
1001 source "arch/mips/ath79/Kconfig"
1002 source "arch/mips/bcm47xx/Kconfig"
1003 source "arch/mips/bcm63xx/Kconfig"
1004 source "arch/mips/bmips/Kconfig"
1005 source "arch/mips/generic/Kconfig"
1006 source "arch/mips/ingenic/Kconfig"
1007 source "arch/mips/jazz/Kconfig"
1008 source "arch/mips/lantiq/Kconfig"
1009 source "arch/mips/pic32/Kconfig"
1010 source "arch/mips/ralink/Kconfig"
1011 source "arch/mips/sgi-ip27/Kconfig"
1012 source "arch/mips/sibyte/Kconfig"
1013 source "arch/mips/txx9/Kconfig"
1014 source "arch/mips/vr41xx/Kconfig"
1015 source "arch/mips/cavium-octeon/Kconfig"
1016 source "arch/mips/loongson2ef/Kconfig"
1017 source "arch/mips/loongson32/Kconfig"
1018 source "arch/mips/loongson64/Kconfig"
1022 config GENERIC_HWEIGHT
1026 config GENERIC_CALIBRATE_DELAY
1030 config SCHED_OMIT_FRAME_POINTER
1035 # Select some configuration options automatically based on user selections.
1040 config ARCH_MAY_HAVE_PC_FDC
1071 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1077 config MIPS_CLOCK_VSYSCALL
1078 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1087 config ARCH_SUPPORTS_UPROBES
1090 config DMA_PERDEV_COHERENT
1092 select ARCH_HAS_SETUP_DMA_OPS
1093 select DMA_NONCOHERENT
1095 config DMA_NONCOHERENT
1098 # MIPS allows mixing "slightly different" Cacheability and Coherency
1099 # Attribute bits. It is believed that the uncached access through
1100 # KSEG1 and the implementation specific "uncached accelerated" used
1101 # by pgprot_writcombine can be mixed, and the latter sometimes provides
1102 # significant advantages.
1104 select ARCH_HAS_DMA_WRITE_COMBINE
1105 select ARCH_HAS_DMA_PREP_COHERENT
1106 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1107 select ARCH_HAS_DMA_SET_UNCACHED
1108 select DMA_NONCOHERENT_MMAP
1109 select NEED_DMA_MAP_STATE
1111 config SYS_HAS_EARLY_PRINTK
1114 config SYS_SUPPORTS_HOTPLUG_CPU
1117 config MIPS_BONITO64
1126 config NO_IOPORT_MAP
1130 def_bool CPU_NO_LOAD_STORE_LR
1132 config GENERIC_ISA_DMA
1134 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1137 config GENERIC_ISA_DMA_SUPPORT_BROKEN
1139 select GENERIC_ISA_DMA
1141 config HAVE_PLAT_DELAY
1144 config HAVE_PLAT_FW_INIT_CMDLINE
1147 config HAVE_PLAT_MEMCPY
1153 config SYS_SUPPORTS_RELOCATABLE
1156 Selected if the platform supports relocating the kernel.
1157 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1158 to allow access to command line and entropy sources.
1161 # Endianness selection. Sufficiently obscure so many users don't know what to
1162 # answer,so we try hard to limit the available choices. Also the use of a
1163 # choice statement should be more obvious to the user.
1166 prompt "Endianness selection"
1168 Some MIPS machines can be configured for either little or big endian
1169 byte order. These modes require different kernels and a different
1170 Linux distribution. In general there is one preferred byteorder for a
1171 particular system but some systems are just as commonly used in the
1172 one or the other endianness.
1174 config CPU_BIG_ENDIAN
1176 depends on SYS_SUPPORTS_BIG_ENDIAN
1178 config CPU_LITTLE_ENDIAN
1179 bool "Little endian"
1180 depends on SYS_SUPPORTS_LITTLE_ENDIAN
1187 config SYS_SUPPORTS_APM_EMULATION
1190 config SYS_SUPPORTS_BIG_ENDIAN
1193 config SYS_SUPPORTS_LITTLE_ENDIAN
1196 config MIPS_HUGE_TLB_SUPPORT
1197 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1211 config PCI_GT64XXX_PCI0
1214 config PCI_XTALK_BRIDGE
1217 config NO_EXCEPT_FILL
1223 config SWAP_IO_SPACE
1226 config SGI_HAS_INDYDOG
1238 config SGI_HAS_ZILOG
1241 config SGI_HAS_I8042
1244 config DEFAULT_SGI_PARTITION
1256 config MIPS_L1_CACHE_SHIFT_4
1259 config MIPS_L1_CACHE_SHIFT_5
1262 config MIPS_L1_CACHE_SHIFT_6
1265 config MIPS_L1_CACHE_SHIFT_7
1268 config MIPS_L1_CACHE_SHIFT
1270 default "7" if MIPS_L1_CACHE_SHIFT_7
1271 default "6" if MIPS_L1_CACHE_SHIFT_6
1272 default "5" if MIPS_L1_CACHE_SHIFT_5
1273 default "4" if MIPS_L1_CACHE_SHIFT_4
1276 config ARC_CMDLINE_ONLY
1280 bool "ARC console support"
1281 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1295 menu "CPU selection"
1301 config CPU_LOONGSON64
1302 bool "Loongson 64-bit CPU"
1303 depends on SYS_HAS_CPU_LOONGSON64
1304 select ARCH_HAS_PHYS_TO_DMA
1306 select CPU_HAS_PREFETCH
1307 select CPU_SUPPORTS_64BIT_KERNEL
1308 select CPU_SUPPORTS_HIGHMEM
1309 select CPU_SUPPORTS_HUGEPAGES
1310 select CPU_SUPPORTS_MSA
1311 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1312 select CPU_MIPSR2_IRQ_VI
1313 select WEAK_ORDERING
1314 select WEAK_REORDERING_BEYOND_LLSC
1315 select MIPS_ASID_BITS_VARIABLE
1316 select MIPS_PGD_C0_CONTEXT
1317 select MIPS_L1_CACHE_SHIFT_6
1318 select MIPS_FP_SUPPORT
1323 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1324 cores implements the MIPS64R2 instruction set with many extensions,
1325 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1326 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1327 Loongson-2E/2F is not covered here and will be removed in future.
1329 config LOONGSON3_ENHANCEMENT
1330 bool "New Loongson-3 CPU Enhancements"
1332 depends on CPU_LOONGSON64
1334 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1335 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1336 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1337 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1338 Fast TLB refill support, etc.
1340 This option enable those enhancements which are not probed at run
1341 time. If you want a generic kernel to run on all Loongson 3 machines,
1342 please say 'N' here. If you want a high-performance kernel to run on
1343 new Loongson-3 machines only, please say 'Y' here.
1345 config CPU_LOONGSON3_WORKAROUNDS
1346 bool "Loongson-3 LLSC Workarounds"
1348 depends on CPU_LOONGSON64
1350 Loongson-3 processors have the llsc issues which require workarounds.
1351 Without workarounds the system may hang unexpectedly.
1353 Say Y, unless you know what you are doing.
1355 config CPU_LOONGSON3_CPUCFG_EMULATION
1356 bool "Emulate the CPUCFG instruction on older Loongson cores"
1358 depends on CPU_LOONGSON64
1360 Loongson-3A R4 and newer have the CPUCFG instruction available for
1361 userland to query CPU capabilities, much like CPUID on x86. This
1362 option provides emulation of the instruction on older Loongson
1363 cores, back to Loongson-3A1000.
1365 If unsure, please say Y.
1367 config CPU_LOONGSON2E
1369 depends on SYS_HAS_CPU_LOONGSON2E
1370 select CPU_LOONGSON2EF
1372 The Loongson 2E processor implements the MIPS III instruction set
1373 with many extensions.
1375 It has an internal FPGA northbridge, which is compatible to
1378 config CPU_LOONGSON2F
1380 depends on SYS_HAS_CPU_LOONGSON2F
1381 select CPU_LOONGSON2EF
1384 The Loongson 2F processor implements the MIPS III instruction set
1385 with many extensions.
1387 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1388 have a similar programming interface with FPGA northbridge used in
1391 config CPU_LOONGSON1B
1393 depends on SYS_HAS_CPU_LOONGSON1B
1394 select CPU_LOONGSON32
1395 select LEDS_GPIO_REGISTER
1397 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1398 Release 1 instruction set and part of the MIPS32 Release 2
1401 config CPU_LOONGSON1C
1403 depends on SYS_HAS_CPU_LOONGSON1C
1404 select CPU_LOONGSON32
1405 select LEDS_GPIO_REGISTER
1407 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1408 Release 1 instruction set and part of the MIPS32 Release 2
1411 config CPU_MIPS32_R1
1412 bool "MIPS32 Release 1"
1413 depends on SYS_HAS_CPU_MIPS32_R1
1414 select CPU_HAS_PREFETCH
1415 select CPU_SUPPORTS_32BIT_KERNEL
1416 select CPU_SUPPORTS_HIGHMEM
1418 Choose this option to build a kernel for release 1 or later of the
1419 MIPS32 architecture. Most modern embedded systems with a 32-bit
1420 MIPS processor are based on a MIPS32 processor. If you know the
1421 specific type of processor in your system, choose those that one
1422 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1423 Release 2 of the MIPS32 architecture is available since several
1424 years so chances are you even have a MIPS32 Release 2 processor
1425 in which case you should choose CPU_MIPS32_R2 instead for better
1428 config CPU_MIPS32_R2
1429 bool "MIPS32 Release 2"
1430 depends on SYS_HAS_CPU_MIPS32_R2
1431 select CPU_HAS_PREFETCH
1432 select CPU_SUPPORTS_32BIT_KERNEL
1433 select CPU_SUPPORTS_HIGHMEM
1434 select CPU_SUPPORTS_MSA
1437 Choose this option to build a kernel for release 2 or later of the
1438 MIPS32 architecture. Most modern embedded systems with a 32-bit
1439 MIPS processor are based on a MIPS32 processor. If you know the
1440 specific type of processor in your system, choose those that one
1441 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1443 config CPU_MIPS32_R5
1444 bool "MIPS32 Release 5"
1445 depends on SYS_HAS_CPU_MIPS32_R5
1446 select CPU_HAS_PREFETCH
1447 select CPU_SUPPORTS_32BIT_KERNEL
1448 select CPU_SUPPORTS_HIGHMEM
1449 select CPU_SUPPORTS_MSA
1451 select MIPS_O32_FP64_SUPPORT
1453 Choose this option to build a kernel for release 5 or later of the
1454 MIPS32 architecture. New MIPS processors, starting with the Warrior
1455 family, are based on a MIPS32r5 processor. If you own an older
1456 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1458 config CPU_MIPS32_R6
1459 bool "MIPS32 Release 6"
1460 depends on SYS_HAS_CPU_MIPS32_R6
1461 select CPU_HAS_PREFETCH
1462 select CPU_NO_LOAD_STORE_LR
1463 select CPU_SUPPORTS_32BIT_KERNEL
1464 select CPU_SUPPORTS_HIGHMEM
1465 select CPU_SUPPORTS_MSA
1467 select MIPS_O32_FP64_SUPPORT
1469 Choose this option to build a kernel for release 6 or later of the
1470 MIPS32 architecture. New MIPS processors, starting with the Warrior
1471 family, are based on a MIPS32r6 processor. If you own an older
1472 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1474 config CPU_MIPS64_R1
1475 bool "MIPS64 Release 1"
1476 depends on SYS_HAS_CPU_MIPS64_R1
1477 select CPU_HAS_PREFETCH
1478 select CPU_SUPPORTS_32BIT_KERNEL
1479 select CPU_SUPPORTS_64BIT_KERNEL
1480 select CPU_SUPPORTS_HIGHMEM
1481 select CPU_SUPPORTS_HUGEPAGES
1483 Choose this option to build a kernel for release 1 or later of the
1484 MIPS64 architecture. Many modern embedded systems with a 64-bit
1485 MIPS processor are based on a MIPS64 processor. If you know the
1486 specific type of processor in your system, choose those that one
1487 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1488 Release 2 of the MIPS64 architecture is available since several
1489 years so chances are you even have a MIPS64 Release 2 processor
1490 in which case you should choose CPU_MIPS64_R2 instead for better
1493 config CPU_MIPS64_R2
1494 bool "MIPS64 Release 2"
1495 depends on SYS_HAS_CPU_MIPS64_R2
1496 select CPU_HAS_PREFETCH
1497 select CPU_SUPPORTS_32BIT_KERNEL
1498 select CPU_SUPPORTS_64BIT_KERNEL
1499 select CPU_SUPPORTS_HIGHMEM
1500 select CPU_SUPPORTS_HUGEPAGES
1501 select CPU_SUPPORTS_MSA
1504 Choose this option to build a kernel for release 2 or later of the
1505 MIPS64 architecture. Many modern embedded systems with a 64-bit
1506 MIPS processor are based on a MIPS64 processor. If you know the
1507 specific type of processor in your system, choose those that one
1508 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1510 config CPU_MIPS64_R5
1511 bool "MIPS64 Release 5"
1512 depends on SYS_HAS_CPU_MIPS64_R5
1513 select CPU_HAS_PREFETCH
1514 select CPU_SUPPORTS_32BIT_KERNEL
1515 select CPU_SUPPORTS_64BIT_KERNEL
1516 select CPU_SUPPORTS_HIGHMEM
1517 select CPU_SUPPORTS_HUGEPAGES
1518 select CPU_SUPPORTS_MSA
1519 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1522 Choose this option to build a kernel for release 5 or later of the
1523 MIPS64 architecture. This is a intermediate MIPS architecture
1524 release partly implementing release 6 features. Though there is no
1525 any hardware known to be based on this release.
1527 config CPU_MIPS64_R6
1528 bool "MIPS64 Release 6"
1529 depends on SYS_HAS_CPU_MIPS64_R6
1530 select CPU_HAS_PREFETCH
1531 select CPU_NO_LOAD_STORE_LR
1532 select CPU_SUPPORTS_32BIT_KERNEL
1533 select CPU_SUPPORTS_64BIT_KERNEL
1534 select CPU_SUPPORTS_HIGHMEM
1535 select CPU_SUPPORTS_HUGEPAGES
1536 select CPU_SUPPORTS_MSA
1537 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1540 Choose this option to build a kernel for release 6 or later of the
1541 MIPS64 architecture. New MIPS processors, starting with the Warrior
1542 family, are based on a MIPS64r6 processor. If you own an older
1543 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1546 bool "MIPS Warrior P5600"
1547 depends on SYS_HAS_CPU_P5600
1548 select CPU_HAS_PREFETCH
1549 select CPU_SUPPORTS_32BIT_KERNEL
1550 select CPU_SUPPORTS_HIGHMEM
1551 select CPU_SUPPORTS_MSA
1552 select CPU_SUPPORTS_CPUFREQ
1553 select CPU_MIPSR2_IRQ_VI
1554 select CPU_MIPSR2_IRQ_EI
1556 select MIPS_O32_FP64_SUPPORT
1558 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1559 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1560 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1561 level features like up to six P5600 calculation cores, CM2 with L2
1562 cache, IOCU/IOMMU (though might be unused depending on the system-
1563 specific IP core configuration), GIC, CPC, virtualisation module,
1568 depends on SYS_HAS_CPU_R3000
1571 select CPU_SUPPORTS_32BIT_KERNEL
1572 select CPU_SUPPORTS_HIGHMEM
1574 Please make sure to pick the right CPU type. Linux/MIPS is not
1575 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1576 *not* work on R4000 machines and vice versa. However, since most
1577 of the supported machines have an R4000 (or similar) CPU, R4x00
1578 might be a safe bet. If the resulting kernel does not work,
1579 try to recompile with R3000.
1583 depends on SYS_HAS_CPU_VR41XX
1584 select CPU_SUPPORTS_32BIT_KERNEL
1585 select CPU_SUPPORTS_64BIT_KERNEL
1587 The options selects support for the NEC VR4100 series of processors.
1588 Only choose this option if you have one of these processors as a
1589 kernel built with this option will not run on any other type of
1590 processor or vice versa.
1594 depends on SYS_HAS_CPU_R4300
1595 select CPU_SUPPORTS_32BIT_KERNEL
1596 select CPU_SUPPORTS_64BIT_KERNEL
1598 MIPS Technologies R4300-series processors.
1602 depends on SYS_HAS_CPU_R4X00
1603 select CPU_SUPPORTS_32BIT_KERNEL
1604 select CPU_SUPPORTS_64BIT_KERNEL
1605 select CPU_SUPPORTS_HUGEPAGES
1607 MIPS Technologies R4000-series processors other than 4300, including
1608 the R4000, R4400, R4600, and 4700.
1612 depends on SYS_HAS_CPU_TX49XX
1613 select CPU_HAS_PREFETCH
1614 select CPU_SUPPORTS_32BIT_KERNEL
1615 select CPU_SUPPORTS_64BIT_KERNEL
1616 select CPU_SUPPORTS_HUGEPAGES
1620 depends on SYS_HAS_CPU_R5000
1621 select CPU_SUPPORTS_32BIT_KERNEL
1622 select CPU_SUPPORTS_64BIT_KERNEL
1623 select CPU_SUPPORTS_HUGEPAGES
1625 MIPS Technologies R5000-series processors other than the Nevada.
1629 depends on SYS_HAS_CPU_R5500
1630 select CPU_SUPPORTS_32BIT_KERNEL
1631 select CPU_SUPPORTS_64BIT_KERNEL
1632 select CPU_SUPPORTS_HUGEPAGES
1634 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1639 depends on SYS_HAS_CPU_NEVADA
1640 select CPU_SUPPORTS_32BIT_KERNEL
1641 select CPU_SUPPORTS_64BIT_KERNEL
1642 select CPU_SUPPORTS_HUGEPAGES
1644 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1648 depends on SYS_HAS_CPU_R10000
1649 select CPU_HAS_PREFETCH
1650 select CPU_SUPPORTS_32BIT_KERNEL
1651 select CPU_SUPPORTS_64BIT_KERNEL
1652 select CPU_SUPPORTS_HIGHMEM
1653 select CPU_SUPPORTS_HUGEPAGES
1655 MIPS Technologies R10000-series processors.
1659 depends on SYS_HAS_CPU_RM7000
1660 select CPU_HAS_PREFETCH
1661 select CPU_SUPPORTS_32BIT_KERNEL
1662 select CPU_SUPPORTS_64BIT_KERNEL
1663 select CPU_SUPPORTS_HIGHMEM
1664 select CPU_SUPPORTS_HUGEPAGES
1668 depends on SYS_HAS_CPU_SB1
1669 select CPU_SUPPORTS_32BIT_KERNEL
1670 select CPU_SUPPORTS_64BIT_KERNEL
1671 select CPU_SUPPORTS_HIGHMEM
1672 select CPU_SUPPORTS_HUGEPAGES
1673 select WEAK_ORDERING
1675 config CPU_CAVIUM_OCTEON
1676 bool "Cavium Octeon processor"
1677 depends on SYS_HAS_CPU_CAVIUM_OCTEON
1678 select CPU_HAS_PREFETCH
1679 select CPU_SUPPORTS_64BIT_KERNEL
1680 select WEAK_ORDERING
1681 select CPU_SUPPORTS_HIGHMEM
1682 select CPU_SUPPORTS_HUGEPAGES
1683 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1684 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1685 select MIPS_L1_CACHE_SHIFT_7
1688 The Cavium Octeon processor is a highly integrated chip containing
1689 many ethernet hardware widgets for networking tasks. The processor
1690 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1691 Full details can be found at http://www.caviumnetworks.com.
1694 bool "Broadcom BMIPS"
1695 depends on SYS_HAS_CPU_BMIPS
1697 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1698 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1699 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1700 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1701 select CPU_SUPPORTS_32BIT_KERNEL
1702 select DMA_NONCOHERENT
1704 select SWAP_IO_SPACE
1705 select WEAK_ORDERING
1706 select CPU_SUPPORTS_HIGHMEM
1707 select CPU_HAS_PREFETCH
1708 select CPU_SUPPORTS_CPUFREQ
1709 select MIPS_EXTERNAL_TIMER
1710 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
1712 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1716 config CPU_MIPS32_3_5_FEATURES
1717 bool "MIPS32 Release 3.5 Features"
1718 depends on SYS_HAS_CPU_MIPS32_R3_5
1719 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1722 Choose this option to build a kernel for release 2 or later of the
1723 MIPS32 architecture including features from the 3.5 release such as
1724 support for Enhanced Virtual Addressing (EVA).
1726 config CPU_MIPS32_3_5_EVA
1727 bool "Enhanced Virtual Addressing (EVA)"
1728 depends on CPU_MIPS32_3_5_FEATURES
1732 Choose this option if you want to enable the Enhanced Virtual
1733 Addressing (EVA) on your MIPS32 core (such as proAptiv).
1734 One of its primary benefits is an increase in the maximum size
1735 of lowmem (up to 3GB). If unsure, say 'N' here.
1737 config CPU_MIPS32_R5_FEATURES
1738 bool "MIPS32 Release 5 Features"
1739 depends on SYS_HAS_CPU_MIPS32_R5
1740 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1742 Choose this option to build a kernel for release 2 or later of the
1743 MIPS32 architecture including features from release 5 such as
1744 support for Extended Physical Addressing (XPA).
1746 config CPU_MIPS32_R5_XPA
1747 bool "Extended Physical Addressing (XPA)"
1748 depends on CPU_MIPS32_R5_FEATURES
1750 depends on !PAGE_SIZE_4KB
1751 depends on SYS_SUPPORTS_HIGHMEM
1754 select PHYS_ADDR_T_64BIT
1757 Choose this option if you want to enable the Extended Physical
1758 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1759 benefit is to increase physical addressing equal to or greater
1760 than 40 bits. Note that this has the side effect of turning on
1761 64-bit addressing which in turn makes the PTEs 64-bit in size.
1762 If unsure, say 'N' here.
1765 config CPU_NOP_WORKAROUNDS
1768 config CPU_JUMP_WORKAROUNDS
1771 config CPU_LOONGSON2F_WORKAROUNDS
1772 bool "Loongson 2F Workarounds"
1774 select CPU_NOP_WORKAROUNDS
1775 select CPU_JUMP_WORKAROUNDS
1777 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1778 require workarounds. Without workarounds the system may hang
1779 unexpectedly. For more information please refer to the gas
1780 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1782 Loongson 2F03 and later have fixed these issues and no workarounds
1783 are needed. The workarounds have no significant side effect on them
1784 but may decrease the performance of the system so this option should
1785 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1788 If unsure, please say Y.
1789 endif # CPU_LOONGSON2F
1791 config SYS_SUPPORTS_ZBOOT
1793 select HAVE_KERNEL_GZIP
1794 select HAVE_KERNEL_BZIP2
1795 select HAVE_KERNEL_LZ4
1796 select HAVE_KERNEL_LZMA
1797 select HAVE_KERNEL_LZO
1798 select HAVE_KERNEL_XZ
1799 select HAVE_KERNEL_ZSTD
1801 config SYS_SUPPORTS_ZBOOT_UART16550
1803 select SYS_SUPPORTS_ZBOOT
1805 config SYS_SUPPORTS_ZBOOT_UART_PROM
1807 select SYS_SUPPORTS_ZBOOT
1809 config CPU_LOONGSON2EF
1811 select CPU_SUPPORTS_32BIT_KERNEL
1812 select CPU_SUPPORTS_64BIT_KERNEL
1813 select CPU_SUPPORTS_HIGHMEM
1814 select CPU_SUPPORTS_HUGEPAGES
1815 select ARCH_HAS_PHYS_TO_DMA
1817 config CPU_LOONGSON32
1821 select CPU_HAS_PREFETCH
1822 select CPU_SUPPORTS_32BIT_KERNEL
1823 select CPU_SUPPORTS_HIGHMEM
1824 select CPU_SUPPORTS_CPUFREQ
1826 config CPU_BMIPS32_3300
1827 select SMP_UP if SMP
1830 config CPU_BMIPS4350
1832 select SYS_SUPPORTS_SMP
1833 select SYS_SUPPORTS_HOTPLUG_CPU
1835 config CPU_BMIPS4380
1837 select MIPS_L1_CACHE_SHIFT_6
1838 select SYS_SUPPORTS_SMP
1839 select SYS_SUPPORTS_HOTPLUG_CPU
1842 config CPU_BMIPS5000
1844 select MIPS_CPU_SCACHE
1845 select MIPS_L1_CACHE_SHIFT_7
1846 select SYS_SUPPORTS_SMP
1847 select SYS_SUPPORTS_HOTPLUG_CPU
1850 config SYS_HAS_CPU_LOONGSON64
1852 select CPU_SUPPORTS_CPUFREQ
1855 config SYS_HAS_CPU_LOONGSON2E
1858 config SYS_HAS_CPU_LOONGSON2F
1860 select CPU_SUPPORTS_CPUFREQ
1861 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1863 config SYS_HAS_CPU_LOONGSON1B
1866 config SYS_HAS_CPU_LOONGSON1C
1869 config SYS_HAS_CPU_MIPS32_R1
1872 config SYS_HAS_CPU_MIPS32_R2
1875 config SYS_HAS_CPU_MIPS32_R3_5
1878 config SYS_HAS_CPU_MIPS32_R5
1880 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1882 config SYS_HAS_CPU_MIPS32_R6
1884 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1886 config SYS_HAS_CPU_MIPS64_R1
1889 config SYS_HAS_CPU_MIPS64_R2
1892 config SYS_HAS_CPU_MIPS64_R5
1894 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1896 config SYS_HAS_CPU_MIPS64_R6
1898 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1900 config SYS_HAS_CPU_P5600
1902 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1904 config SYS_HAS_CPU_R3000
1907 config SYS_HAS_CPU_VR41XX
1910 config SYS_HAS_CPU_R4300
1913 config SYS_HAS_CPU_R4X00
1916 config SYS_HAS_CPU_TX49XX
1919 config SYS_HAS_CPU_R5000
1922 config SYS_HAS_CPU_R5500
1925 config SYS_HAS_CPU_NEVADA
1928 config SYS_HAS_CPU_R10000
1930 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1932 config SYS_HAS_CPU_RM7000
1935 config SYS_HAS_CPU_SB1
1938 config SYS_HAS_CPU_CAVIUM_OCTEON
1941 config SYS_HAS_CPU_BMIPS
1944 config SYS_HAS_CPU_BMIPS32_3300
1946 select SYS_HAS_CPU_BMIPS
1948 config SYS_HAS_CPU_BMIPS4350
1950 select SYS_HAS_CPU_BMIPS
1952 config SYS_HAS_CPU_BMIPS4380
1954 select SYS_HAS_CPU_BMIPS
1956 config SYS_HAS_CPU_BMIPS5000
1958 select SYS_HAS_CPU_BMIPS
1959 select ARCH_HAS_SYNC_DMA_FOR_CPU
1962 # CPU may reorder R->R, R->W, W->R, W->W
1963 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
1965 config WEAK_ORDERING
1969 # CPU may reorder reads and writes beyond LL/SC
1970 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
1972 config WEAK_REORDERING_BEYOND_LLSC
1977 # These two indicate any level of the MIPS32 and MIPS64 architecture
1981 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
1982 CPU_MIPS32_R6 || CPU_P5600
1986 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
1987 CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
1990 # These indicate the revision of the architecture
1994 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
1998 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
2000 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2005 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
2007 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2012 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
2014 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2015 select HAVE_ARCH_BITREVERSE
2016 select MIPS_ASID_BITS_VARIABLE
2017 select MIPS_CRC_SUPPORT
2020 config TARGET_ISA_REV
2022 default 1 if CPU_MIPSR1
2023 default 2 if CPU_MIPSR2
2024 default 5 if CPU_MIPSR5
2025 default 6 if CPU_MIPSR6
2028 Reflects the ISA revision being targeted by the kernel build. This
2029 is effectively the Kconfig equivalent of MIPS_ISA_REV.
2037 config SYS_SUPPORTS_32BIT_KERNEL
2039 config SYS_SUPPORTS_64BIT_KERNEL
2041 config CPU_SUPPORTS_32BIT_KERNEL
2043 config CPU_SUPPORTS_64BIT_KERNEL
2045 config CPU_SUPPORTS_CPUFREQ
2047 config CPU_SUPPORTS_ADDRWINCFG
2049 config CPU_SUPPORTS_HUGEPAGES
2051 depends on !(32BIT && (PHYS_ADDR_T_64BIT || EVA))
2052 config MIPS_PGD_C0_CONTEXT
2055 default y if (CPU_MIPSR2 || CPU_MIPSR6)
2058 # Set to y for ptrace access to watch registers.
2060 config HARDWARE_WATCHPOINTS
2062 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
2067 prompt "Kernel code model"
2069 You should only select this option if you have a workload that
2070 actually benefits from 64-bit processing or if your machine has
2071 large memory. You will only be presented a single option in this
2072 menu if your system does not support both 32-bit and 64-bit kernels.
2075 bool "32-bit kernel"
2076 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2079 Select this option if you want to build a 32-bit kernel.
2082 bool "64-bit kernel"
2083 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2085 Select this option if you want to build a 64-bit kernel.
2089 config MIPS_VA_BITS_48
2090 bool "48 bits virtual memory"
2093 Support a maximum at least 48 bits of application virtual
2094 memory. Default is 40 bits or less, depending on the CPU.
2095 For page sizes 16k and above, this option results in a small
2096 memory overhead for page tables. For 4k page size, a fourth
2097 level of page tables is added which imposes both a memory
2098 overhead as well as slower TLB fault handling.
2102 config ZBOOT_LOAD_ADDRESS
2103 hex "Compressed kernel load address"
2104 default 0xffffffff80400000 if BCM47XX
2106 depends on SYS_SUPPORTS_ZBOOT
2108 The address to load compressed kernel, aka vmlinuz.
2110 This is only used if non-zero.
2113 prompt "Kernel page size"
2114 default PAGE_SIZE_4KB
2116 config PAGE_SIZE_4KB
2118 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
2120 This option select the standard 4kB Linux page size. On some
2121 R3000-family processors this is the only available page size. Using
2122 4kB page size will minimize memory consumption and is therefore
2123 recommended for low memory systems.
2125 config PAGE_SIZE_8KB
2127 depends on CPU_CAVIUM_OCTEON
2128 depends on !MIPS_VA_BITS_48
2130 Using 8kB page size will result in higher performance kernel at
2131 the price of higher memory consumption. This option is available
2132 only on cnMIPS processors. Note that you will need a suitable Linux
2133 distribution to support this.
2135 config PAGE_SIZE_16KB
2137 depends on !CPU_R3000
2139 Using 16kB page size will result in higher performance kernel at
2140 the price of higher memory consumption. This option is available on
2141 all non-R3000 family processors. Note that you will need a suitable
2142 Linux distribution to support this.
2144 config PAGE_SIZE_32KB
2146 depends on CPU_CAVIUM_OCTEON
2147 depends on !MIPS_VA_BITS_48
2149 Using 32kB page size will result in higher performance kernel at
2150 the price of higher memory consumption. This option is available
2151 only on cnMIPS cores. Note that you will need a suitable Linux
2152 distribution to support this.
2154 config PAGE_SIZE_64KB
2156 depends on !CPU_R3000
2158 Using 64kB page size will result in higher performance kernel at
2159 the price of higher memory consumption. This option is available on
2160 all non-R3000 family processor. Not that at the time of this
2161 writing this option is still high experimental.
2165 config FORCE_MAX_ZONEORDER
2166 int "Maximum zone order"
2167 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2168 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2169 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2170 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2171 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2172 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2176 The kernel memory allocator divides physically contiguous memory
2177 blocks into "zones", where each zone is a power of two number of
2178 pages. This option selects the largest power of two that the kernel
2179 keeps in the memory allocator. If you need to allocate very large
2180 blocks of physically contiguous memory, then you may need to
2181 increase this value.
2183 This config option is actually maximum order plus one. For example,
2184 a value of 11 means that the largest free memory block is 2^10 pages.
2186 The page size is not necessarily 4KB. Keep this in mind
2187 when choosing a value for this option.
2192 config IP22_CPU_SCACHE
2197 # Support for a MIPS32 / MIPS64 style S-caches
2199 config MIPS_CPU_SCACHE
2203 config R5000_CPU_SCACHE
2207 config RM7000_CPU_SCACHE
2211 config SIBYTE_DMA_PAGEOPS
2212 bool "Use DMA to clear/copy pages"
2215 Instead of using the CPU to zero and copy pages, use a Data Mover
2216 channel. These DMA channels are otherwise unused by the standard
2217 SiByte Linux port. Seems to give a small performance benefit.
2219 config CPU_HAS_PREFETCH
2222 config CPU_GENERIC_DUMP_TLB
2224 default y if !CPU_R3000
2226 config MIPS_FP_SUPPORT
2227 bool "Floating Point support" if EXPERT
2230 Select y to include support for floating point in the kernel
2231 including initialization of FPU hardware, FP context save & restore
2232 and emulation of an FPU where necessary. Without this support any
2233 userland program attempting to use floating point instructions will
2236 If you know that your userland will not attempt to use floating point
2237 instructions then you can say n here to shrink the kernel a little.
2241 config CPU_R2300_FPU
2243 depends on MIPS_FP_SUPPORT
2244 default y if CPU_R3000
2251 depends on MIPS_FP_SUPPORT
2252 default y if !CPU_R2300_FPU
2254 config CPU_R4K_CACHE_TLB
2256 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2259 bool "MIPS MT SMP support (1 TC on each available VPE)"
2261 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
2262 select CPU_MIPSR2_IRQ_VI
2263 select CPU_MIPSR2_IRQ_EI
2268 select SYS_SUPPORTS_SMP
2269 select SYS_SUPPORTS_SCHED_SMT
2270 select MIPS_PERF_SHARED_TC_COUNTERS
2272 This is a kernel model which is known as SMVP. This is supported
2273 on cores with the MT ASE and uses the available VPEs to implement
2274 virtual processors which supports SMP. This is equivalent to the
2275 Intel Hyperthreading feature. For further information go to
2276 <http://www.imgtec.com/mips/mips-multithreading.asp>.
2282 bool "SMT (multithreading) scheduler support"
2283 depends on SYS_SUPPORTS_SCHED_SMT
2286 SMT scheduler support improves the CPU scheduler's decision making
2287 when dealing with MIPS MT enabled cores at a cost of slightly
2288 increased overhead in some places. If unsure say N here.
2290 config SYS_SUPPORTS_SCHED_SMT
2293 config SYS_SUPPORTS_MULTITHREADING
2296 config MIPS_MT_FPAFF
2297 bool "Dynamic FPU affinity for FP-intensive threads"
2299 depends on MIPS_MT_SMP
2301 config MIPSR2_TO_R6_EMULATOR
2302 bool "MIPS R2-to-R6 emulator"
2303 depends on CPU_MIPSR6
2304 depends on MIPS_FP_SUPPORT
2307 Choose this option if you want to run non-R6 MIPS userland code.
2308 Even if you say 'Y' here, the emulator will still be disabled by
2309 default. You can enable it using the 'mipsr2emu' kernel option.
2310 The only reason this is a build-time option is to save ~14K from the
2313 config SYS_SUPPORTS_VPE_LOADER
2315 depends on SYS_SUPPORTS_MULTITHREADING
2317 Indicates that the platform supports the VPE loader, and provides
2320 config MIPS_VPE_LOADER
2321 bool "VPE loader support."
2322 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2323 select CPU_MIPSR2_IRQ_VI
2324 select CPU_MIPSR2_IRQ_EI
2327 Includes a loader for loading an elf relocatable object
2328 onto another VPE and running it.
2330 config MIPS_VPE_LOADER_CMP
2333 depends on MIPS_VPE_LOADER && MIPS_CMP
2335 config MIPS_VPE_LOADER_MT
2338 depends on MIPS_VPE_LOADER && !MIPS_CMP
2340 config MIPS_VPE_LOADER_TOM
2341 bool "Load VPE program into memory hidden from linux"
2342 depends on MIPS_VPE_LOADER
2345 The loader can use memory that is present but has been hidden from
2346 Linux using the kernel command line option "mem=xxMB". It's up to
2347 you to ensure the amount you put in the option and the space your
2348 program requires is less or equal to the amount physically present.
2350 config MIPS_VPE_APSP_API
2351 bool "Enable support for AP/SP API (RTLX)"
2352 depends on MIPS_VPE_LOADER
2354 config MIPS_VPE_APSP_API_CMP
2357 depends on MIPS_VPE_APSP_API && MIPS_CMP
2359 config MIPS_VPE_APSP_API_MT
2362 depends on MIPS_VPE_APSP_API && !MIPS_CMP
2365 bool "MIPS CMP framework support (DEPRECATED)"
2366 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2369 select SYS_SUPPORTS_SMP
2370 select WEAK_ORDERING
2373 Select this if you are using a bootloader which implements the "CMP
2374 framework" protocol (ie. YAMON) and want your kernel to make use of
2375 its ability to start secondary CPUs.
2377 Unless you have a specific need, you should use CONFIG_MIPS_CPS
2381 bool "MIPS Coherent Processing System support"
2382 depends on SYS_SUPPORTS_MIPS_CPS
2384 select MIPS_CPS_PM if HOTPLUG_CPU
2386 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2387 select SYS_SUPPORTS_HOTPLUG_CPU
2388 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2389 select SYS_SUPPORTS_SMP
2390 select WEAK_ORDERING
2391 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
2393 Select this if you wish to run an SMP kernel across multiple cores
2394 within a MIPS Coherent Processing System. When this option is
2395 enabled the kernel will probe for other cores and boot them with
2396 no external assistance. It is safe to enable this when hardware
2397 support is unavailable.
2410 config SB1_PASS_2_WORKAROUNDS
2412 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2415 config SB1_PASS_2_1_WORKAROUNDS
2417 depends on CPU_SB1 && CPU_SB1_PASS_2
2421 prompt "SmartMIPS or microMIPS ASE support"
2423 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2426 Select this if you want neither microMIPS nor SmartMIPS support
2428 config CPU_HAS_SMARTMIPS
2429 depends on SYS_SUPPORTS_SMARTMIPS
2432 SmartMIPS is a extension of the MIPS32 architecture aimed at
2433 increased security at both hardware and software level for
2434 smartcards. Enabling this option will allow proper use of the
2435 SmartMIPS instructions by Linux applications. However a kernel with
2436 this option will not work on a MIPS core without SmartMIPS core. If
2437 you don't know you probably don't have SmartMIPS and should say N
2440 config CPU_MICROMIPS
2441 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2444 When this option is enabled the kernel will be built using the
2450 bool "Support for the MIPS SIMD Architecture"
2451 depends on CPU_SUPPORTS_MSA
2452 depends on MIPS_FP_SUPPORT
2453 depends on 64BIT || MIPS_O32_FP64_SUPPORT
2455 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2456 and a set of SIMD instructions to operate on them. When this option
2457 is enabled the kernel will support allocating & switching MSA
2458 vector register contexts. If you know that your kernel will only be
2459 running on CPUs which do not support MSA or that your userland will
2460 not be making use of it then you may wish to say N here to reduce
2461 the size & complexity of your kernel.
2472 depends on !CPU_DIEI_BROKEN
2475 config CPU_DIEI_BROKEN
2481 config CPU_NO_LOAD_STORE_LR
2484 CPU lacks support for unaligned load and store instructions:
2485 LWL, LWR, SWL, SWR (Load/store word left/right).
2486 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2490 # Vectored interrupt mode is an R2 feature
2492 config CPU_MIPSR2_IRQ_VI
2496 # Extended interrupt mode is an R2 feature
2498 config CPU_MIPSR2_IRQ_EI
2503 depends on !CPU_R3000
2510 # Work around the "daddi" and "daddiu" CPU errata:
2512 # - The `daddi' instruction fails to trap on overflow.
2513 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2516 # - The `daddiu' instruction can produce an incorrect result.
2517 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2519 # "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
2521 # "MIPS R4400PC/SC Errata, Processor Revision 1.0", erratum #7
2522 # "MIPS R4400MC Errata, Processor Revision 1.0", erratum #5
2523 config CPU_DADDI_WORKAROUNDS
2526 # Work around certain R4000 CPU errata (as implemented by GCC):
2528 # - A double-word or a variable shift may give an incorrect result
2529 # if executed immediately after starting an integer division:
2530 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2532 # "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
2535 # - A double-word or a variable shift may give an incorrect result
2536 # if executed while an integer multiplication is in progress:
2537 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2540 # - An integer division may give an incorrect result if started in
2541 # a delay slot of a taken branch or a jump:
2542 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2544 config CPU_R4000_WORKAROUNDS
2546 select CPU_R4400_WORKAROUNDS
2548 # Work around certain R4400 CPU errata (as implemented by GCC):
2550 # - A double-word or a variable shift may give an incorrect result
2551 # if executed immediately after starting an integer division:
2552 # "MIPS R4400MC Errata, Processor Revision 1.0", erratum #10
2553 # "MIPS R4400MC Errata, Processor Revision 2.0 & 3.0", erratum #4
2554 config CPU_R4400_WORKAROUNDS
2557 config CPU_R4X00_BUGS64
2559 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2561 config MIPS_ASID_SHIFT
2563 default 6 if CPU_R3000
2566 config MIPS_ASID_BITS
2568 default 0 if MIPS_ASID_BITS_VARIABLE
2569 default 6 if CPU_R3000
2572 config MIPS_ASID_BITS_VARIABLE
2575 config MIPS_CRC_SUPPORT
2578 # R4600 erratum. Due to the lack of errata information the exact
2579 # technical details aren't known. I've experimentally found that disabling
2580 # interrupts during indexed I-cache flushes seems to be sufficient to deal
2582 config WAR_R4600_V1_INDEX_ICACHEOP
2585 # Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
2587 # 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2588 # Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2589 # executed if there is no other dcache activity. If the dcache is
2590 # accessed for another instruction immediately preceding when these
2591 # cache instructions are executing, it is possible that the dcache
2592 # tag match outputs used by these cache instructions will be
2593 # incorrect. These cache instructions should be preceded by at least
2594 # four instructions that are not any kind of load or store
2597 # This is not allowed: lw
2601 # cache Hit_Writeback_Invalidate_D
2603 # This is allowed: lw
2608 # cache Hit_Writeback_Invalidate_D
2609 config WAR_R4600_V1_HIT_CACHEOP
2612 # Writeback and invalidate the primary cache dcache before DMA.
2614 # R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2615 # Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2616 # operate correctly if the internal data cache refill buffer is empty. These
2617 # CACHE instructions should be separated from any potential data cache miss
2618 # by a load instruction to an uncached address to empty the response buffer."
2619 # (Revision 2.0 device errata from IDT available on https://www.idt.com/
2621 config WAR_R4600_V2_HIT_CACHEOP
2624 # From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2625 # the line which this instruction itself exists, the following
2626 # operation is not guaranteed."
2628 # Workaround: do two phase flushing for Index_Invalidate_I
2629 config WAR_TX49XX_ICACHE_INDEX_INV
2632 # The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2633 # opposes it being called that) where invalid instructions in the same
2634 # I-cache line worth of instructions being fetched may case spurious
2636 config WAR_ICACHE_REFILLS
2639 # On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2640 # may cause ll / sc and lld / scd sequences to execute non-atomically.
2641 config WAR_R10000_LLSC
2644 # 34K core erratum: "Problems Executing the TLBR Instruction"
2645 config WAR_MIPS34K_MISSED_ITLB
2649 # - Highmem only makes sense for the 32-bit kernel.
2650 # - The current highmem code will only work properly on physically indexed
2651 # caches such as R3000, SB1, R7000 or those that look like they're virtually
2652 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2653 # moment we protect the user and offer the highmem option only on machines
2654 # where it's known to be safe. This will not offer highmem on a few systems
2655 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2656 # indexed CPUs but we're playing safe.
2657 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2658 # know they might have memory configurations that could make use of highmem
2662 bool "High Memory Support"
2663 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2666 config CPU_SUPPORTS_HIGHMEM
2669 config SYS_SUPPORTS_HIGHMEM
2672 config SYS_SUPPORTS_SMARTMIPS
2675 config SYS_SUPPORTS_MICROMIPS
2678 config SYS_SUPPORTS_MIPS16
2681 This option must be set if a kernel might be executed on a MIPS16-
2682 enabled CPU even if MIPS16 is not actually being used. In other
2683 words, it makes the kernel MIPS16-tolerant.
2685 config CPU_SUPPORTS_MSA
2688 config ARCH_FLATMEM_ENABLE
2690 depends on !NUMA && !CPU_LOONGSON2EF
2692 config ARCH_SPARSEMEM_ENABLE
2694 select SPARSEMEM_STATIC if !SGI_IP27
2698 depends on SYS_SUPPORTS_NUMA
2700 select HAVE_SETUP_PER_CPU_AREA
2701 select NEED_PER_CPU_EMBED_FIRST_CHUNK
2703 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2704 Access). This option improves performance on systems with more
2705 than two nodes; on two node systems it is generally better to
2706 leave it disabled; on single node systems leave this option
2709 config SYS_SUPPORTS_NUMA
2712 config HAVE_ARCH_NODEDATA_EXTENSION
2716 bool "Relocatable kernel"
2717 depends on SYS_SUPPORTS_RELOCATABLE
2718 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2719 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2720 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
2721 CPU_P5600 || CAVIUM_OCTEON_SOC || \
2724 This builds a kernel image that retains relocation information
2725 so it can be loaded someplace besides the default 1MB.
2726 The relocations make the kernel binary about 15% larger,
2727 but are discarded at runtime
2729 config RELOCATION_TABLE_SIZE
2730 hex "Relocation table size"
2731 depends on RELOCATABLE
2732 range 0x0 0x01000000
2733 default "0x00200000" if CPU_LOONGSON64
2734 default "0x00100000"
2736 A table of relocation data will be appended to the kernel binary
2737 and parsed at boot to fix up the relocated kernel.
2739 This option allows the amount of space reserved for the table to be
2740 adjusted, although the default of 1Mb should be ok in most cases.
2742 The build will fail and a valid size suggested if this is too small.
2744 If unsure, leave at the default value.
2746 config RANDOMIZE_BASE
2747 bool "Randomize the address of the kernel image"
2748 depends on RELOCATABLE
2750 Randomizes the physical and virtual address at which the
2751 kernel image is loaded, as a security feature that
2752 deters exploit attempts relying on knowledge of the location
2753 of kernel internals.
2755 Entropy is generated using any coprocessor 0 registers available.
2757 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2761 config RANDOMIZE_BASE_MAX_OFFSET
2762 hex "Maximum kASLR offset" if EXPERT
2763 depends on RANDOMIZE_BASE
2764 range 0x0 0x40000000 if EVA || 64BIT
2765 range 0x0 0x08000000
2766 default "0x01000000"
2768 When kASLR is active, this provides the maximum offset that will
2769 be applied to the kernel image. It should be set according to the
2770 amount of physical RAM available in the target system minus
2771 PHYSICAL_START and must be a power of 2.
2773 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2774 EVA or 64-bit. The default is 16Mb.
2781 config HW_PERF_EVENTS
2782 bool "Enable hardware performance counter support for perf events"
2783 depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_LOONGSON64)
2786 Enable hardware performance counter support for perf events. If
2787 disabled, perf events will use software events only.
2790 bool "Enable DMI scanning"
2791 depends on MACH_LOONGSON64
2792 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2795 Enabled scanning of DMI to identify machine quirks. Say Y
2796 here unless you have verified that your setup is not
2797 affected by entries in the DMI blacklist. Required by PNP
2801 bool "Multi-Processing support"
2802 depends on SYS_SUPPORTS_SMP
2804 This enables support for systems with more than one CPU. If you have
2805 a system with only one CPU, say N. If you have a system with more
2806 than one CPU, say Y.
2808 If you say N here, the kernel will run on uni- and multiprocessor
2809 machines, but will use only one CPU of a multiprocessor machine. If
2810 you say Y here, the kernel will run on many, but not all,
2811 uniprocessor machines. On a uniprocessor machine, the kernel
2812 will run faster if you say N here.
2814 People using multiprocessor machines who say Y here should also say
2815 Y to "Enhanced Real Time Clock Support", below.
2817 See also the SMP-HOWTO available at
2818 <https://www.tldp.org/docs.html#howto>.
2820 If you don't know what to do here, say N.
2823 bool "Support for hot-pluggable CPUs"
2824 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2826 Say Y here to allow turning CPUs off and on. CPUs can be
2827 controlled through /sys/devices/system/cpu.
2828 (Note: power management support will enable this option
2829 automatically on SMP systems. )
2830 Say N if you want to disable CPU hotplug.
2835 config SYS_SUPPORTS_MIPS_CMP
2838 config SYS_SUPPORTS_MIPS_CPS
2841 config SYS_SUPPORTS_SMP
2844 config NR_CPUS_DEFAULT_4
2847 config NR_CPUS_DEFAULT_8
2850 config NR_CPUS_DEFAULT_16
2853 config NR_CPUS_DEFAULT_32
2856 config NR_CPUS_DEFAULT_64
2860 int "Maximum number of CPUs (2-256)"
2863 default "4" if NR_CPUS_DEFAULT_4
2864 default "8" if NR_CPUS_DEFAULT_8
2865 default "16" if NR_CPUS_DEFAULT_16
2866 default "32" if NR_CPUS_DEFAULT_32
2867 default "64" if NR_CPUS_DEFAULT_64
2869 This allows you to specify the maximum number of CPUs which this
2870 kernel will support. The maximum supported value is 32 for 32-bit
2871 kernel and 64 for 64-bit kernels; the minimum value which makes
2872 sense is 1 for Qemu (useful only for kernel debugging purposes)
2873 and 2 for all others.
2875 This is purely to save memory - each supported CPU adds
2876 approximately eight kilobytes to the kernel image. For best
2877 performance should round up your number of processors to the next
2880 config MIPS_PERF_SHARED_TC_COUNTERS
2883 config MIPS_NR_CPU_NR_MAP_1024
2886 config MIPS_NR_CPU_NR_MAP
2889 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2890 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2893 # Timer Interrupt Frequency Configuration
2897 prompt "Timer frequency"
2900 Allows the configuration of the timer frequency.
2903 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2906 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2909 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2912 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2915 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2918 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2921 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2924 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2928 config SYS_SUPPORTS_24HZ
2931 config SYS_SUPPORTS_48HZ
2934 config SYS_SUPPORTS_100HZ
2937 config SYS_SUPPORTS_128HZ
2940 config SYS_SUPPORTS_250HZ
2943 config SYS_SUPPORTS_256HZ
2946 config SYS_SUPPORTS_1000HZ
2949 config SYS_SUPPORTS_1024HZ
2952 config SYS_SUPPORTS_ARBIT_HZ
2954 default y if !SYS_SUPPORTS_24HZ && \
2955 !SYS_SUPPORTS_48HZ && \
2956 !SYS_SUPPORTS_100HZ && \
2957 !SYS_SUPPORTS_128HZ && \
2958 !SYS_SUPPORTS_250HZ && \
2959 !SYS_SUPPORTS_256HZ && \
2960 !SYS_SUPPORTS_1000HZ && \
2961 !SYS_SUPPORTS_1024HZ
2967 default 100 if HZ_100
2968 default 128 if HZ_128
2969 default 250 if HZ_250
2970 default 256 if HZ_256
2971 default 1000 if HZ_1000
2972 default 1024 if HZ_1024
2975 def_bool HIGH_RES_TIMERS
2978 bool "Kexec system call"
2981 kexec is a system call that implements the ability to shutdown your
2982 current kernel, and to start another kernel. It is like a reboot
2983 but it is independent of the system firmware. And like a reboot
2984 you can start any kernel with it, not just Linux.
2986 The name comes from the similarity to the exec system call.
2988 It is an ongoing process to be certain the hardware in a machine
2989 is properly shutdown, so do not be surprised if this code does not
2990 initially work for you. As of this writing the exact hardware
2991 interface is strongly in flux, so no good recommendation can be
2995 bool "Kernel crash dumps"
2997 Generate crash dump after being started by kexec.
2998 This should be normally only set in special crash dump kernels
2999 which are loaded in the main kernel with kexec-tools into
3000 a specially reserved region and then later executed after
3001 a crash by kdump/kexec. The crash dump kernel must be compiled
3002 to a memory address not used by the main kernel or firmware using
3005 config PHYSICAL_START
3006 hex "Physical address where the kernel is loaded"
3007 default "0xffffffff84000000"
3008 depends on CRASH_DUMP
3010 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
3011 If you plan to use kernel for capturing the crash dump change
3012 this value to start of the reserved region (the "X" value as
3013 specified in the "crashkernel=YM@XM" command line boot parameter
3014 passed to the panic-ed kernel).
3016 config MIPS_O32_FP64_SUPPORT
3017 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
3018 depends on 32BIT || MIPS32_O32
3020 When this is enabled, the kernel will support use of 64-bit floating
3021 point registers with binaries using the O32 ABI along with the
3022 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
3023 32-bit MIPS systems this support is at the cost of increasing the
3024 size and complexity of the compiled FPU emulator. Thus if you are
3025 running a MIPS32 system and know that none of your userland binaries
3026 will require 64-bit floating point, you may wish to reduce the size
3027 of your kernel & potentially improve FP emulation performance by
3030 Although binutils currently supports use of this flag the details
3031 concerning its effect upon the O32 ABI in userland are still being
3032 worked on. In order to avoid userland becoming dependent upon current
3033 behaviour before the details have been finalised, this option should
3034 be considered experimental and only enabled by those working upon
3042 select OF_EARLY_FLATTREE
3052 prompt "Kernel appended dtb support" if USE_OF
3053 default MIPS_NO_APPENDED_DTB
3055 config MIPS_NO_APPENDED_DTB
3058 Do not enable appended dtb support.
3060 config MIPS_ELF_APPENDED_DTB
3063 With this option, the boot code will look for a device tree binary
3064 DTB) included in the vmlinux ELF section .appended_dtb. By default
3065 it is empty and the DTB can be appended using binutils command
3068 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
3070 This is meant as a backward compatibility convenience for those
3071 systems with a bootloader that can't be upgraded to accommodate
3072 the documented boot protocol using a device tree.
3074 config MIPS_RAW_APPENDED_DTB
3075 bool "vmlinux.bin or vmlinuz.bin"
3077 With this option, the boot code will look for a device tree binary
3078 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
3079 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
3081 This is meant as a backward compatibility convenience for those
3082 systems with a bootloader that can't be upgraded to accommodate
3083 the documented boot protocol using a device tree.
3085 Beware that there is very little in terms of protection against
3086 this option being confused by leftover garbage in memory that might
3087 look like a DTB header after a reboot if no actual DTB is appended
3088 to vmlinux.bin. Do not leave this option active in a production kernel
3089 if you don't intend to always append a DTB.
3093 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
3094 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
3095 !MACH_LOONGSON64 && !MIPS_MALTA && \
3097 default MIPS_CMDLINE_FROM_BOOTLOADER
3099 config MIPS_CMDLINE_FROM_DTB
3101 bool "Dtb kernel arguments if available"
3103 config MIPS_CMDLINE_DTB_EXTEND
3105 bool "Extend dtb kernel arguments with bootloader arguments"
3107 config MIPS_CMDLINE_FROM_BOOTLOADER
3108 bool "Bootloader kernel arguments if available"
3110 config MIPS_CMDLINE_BUILTIN_EXTEND
3111 depends on CMDLINE_BOOL
3112 bool "Extend builtin kernel arguments with bootloader arguments"
3117 config LOCKDEP_SUPPORT
3121 config STACKTRACE_SUPPORT
3125 config PGTABLE_LEVELS
3127 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3128 default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48)
3131 config MIPS_AUTO_PFN_OFFSET
3134 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3136 config PCI_DRIVERS_GENERIC
3137 select PCI_DOMAINS_GENERIC if PCI
3140 config PCI_DRIVERS_LEGACY
3141 def_bool !PCI_DRIVERS_GENERIC
3142 select NO_GENERIC_PCI_IOPORT_MAP
3143 select PCI_DOMAINS if PCI
3146 # ISA support is now enabled via select. Too many systems still have the one
3147 # or other ISA chip on the board that users don't know about so don't expect
3148 # users to choose the right thing ...
3154 bool "TURBOchannel support"
3155 depends on MACH_DECSTATION
3157 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3158 processors. TURBOchannel programming specifications are available
3160 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3162 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3163 Linux driver support status is documented at:
3164 <http://www.linux-mips.org/wiki/DECstation>
3170 config ARCH_MMAP_RND_BITS_MIN
3174 config ARCH_MMAP_RND_BITS_MAX
3178 config ARCH_MMAP_RND_COMPAT_BITS_MIN
3181 config ARCH_MMAP_RND_COMPAT_BITS_MAX
3188 select MIPS_EXTERNAL_TIMER
3194 config MIPS32_COMPAT
3201 bool "Kernel support for o32 binaries"
3203 select ARCH_WANT_OLD_COMPAT_IPC
3205 select MIPS32_COMPAT
3207 Select this option if you want to run o32 binaries. These are pure
3208 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3209 existing binaries are in this format.
3214 bool "Kernel support for n32 binaries"
3216 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3218 select MIPS32_COMPAT
3220 Select this option if you want to run n32 binaries. These are
3221 64-bit binaries using 32-bit quantities for addressing and certain
3222 data that would normally be 64-bit. They are used in special
3227 config CC_HAS_MNO_BRANCH_LIKELY
3229 depends on $(cc-option,-mno-branch-likely)
3231 menu "Power management options"
3233 config ARCH_HIBERNATION_POSSIBLE
3235 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3237 config ARCH_SUSPEND_POSSIBLE
3239 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3241 source "kernel/power/Kconfig"
3245 config MIPS_EXTERNAL_TIMER
3248 menu "CPU Power Management"
3250 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3251 source "drivers/cpufreq/Kconfig"
3252 endif # CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3254 source "drivers/cpuidle/Kconfig"
3258 source "arch/mips/kvm/Kconfig"
3260 source "arch/mips/vdso/Kconfig"