1 # SPDX-License-Identifier: GPL-2.0
5 select ARCH_32BIT_OFF_T if !64BIT
6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7 select ARCH_HAS_CURRENT_STACK_POINTER if !CC_IS_CLANG || CLANG_VERSION >= 140000
8 select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
9 select ARCH_HAS_FORTIFY_SOURCE
11 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
12 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
13 select ARCH_HAS_STRNCPY_FROM_USER
14 select ARCH_HAS_STRNLEN_USER
15 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
16 select ARCH_HAS_UBSAN_SANITIZE_ALL
17 select ARCH_HAS_GCOV_PROFILE_ALL
18 select ARCH_KEEP_MEMBLOCK
19 select ARCH_SUPPORTS_UPROBES
20 select ARCH_USE_BUILTIN_BSWAP
21 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
22 select ARCH_USE_MEMTEST
23 select ARCH_USE_QUEUED_RWLOCKS
24 select ARCH_USE_QUEUED_SPINLOCKS
25 select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES
26 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
27 select ARCH_WANT_IPC_PARSE_VERSION
28 select ARCH_WANT_LD_ORPHAN_WARN
29 select BUILDTIME_TABLE_SORT
30 select CLONE_BACKWARDS
31 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
32 select CPU_PM if CPU_IDLE
33 select GENERIC_ATOMIC64 if !64BIT
34 select GENERIC_CMOS_UPDATE
35 select GENERIC_CPU_AUTOPROBE
36 select GENERIC_GETTIMEOFDAY
38 select GENERIC_IRQ_PROBE
39 select GENERIC_IRQ_SHOW
40 select GENERIC_ISA_DMA if EISA
41 select GENERIC_LIB_ASHLDI3
42 select GENERIC_LIB_ASHRDI3
43 select GENERIC_LIB_CMPDI2
44 select GENERIC_LIB_LSHRDI3
45 select GENERIC_LIB_UCMPDI2
46 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
47 select GENERIC_SMP_IDLE_THREAD
48 select GENERIC_TIME_VSYSCALL
49 select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
50 select HAVE_ARCH_COMPILER_H
51 select HAVE_ARCH_JUMP_LABEL
52 select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
53 select HAVE_ARCH_MMAP_RND_BITS if MMU
54 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
55 select HAVE_ARCH_SECCOMP_FILTER
56 select HAVE_ARCH_TRACEHOOK
57 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
58 select HAVE_ASM_MODVERSIONS
59 select HAVE_CONTEXT_TRACKING
61 select HAVE_C_RECORDMCOUNT
62 select HAVE_DEBUG_KMEMLEAK
63 select HAVE_DEBUG_STACKOVERFLOW
64 select HAVE_DMA_CONTIGUOUS
65 select HAVE_DYNAMIC_FTRACE
66 select HAVE_EBPF_JIT if !CPU_MICROMIPS && \
67 !CPU_DADDI_WORKAROUNDS && \
68 !CPU_R4000_WORKAROUNDS && \
69 !CPU_R4400_WORKAROUNDS
70 select HAVE_EXIT_THREAD
72 select HAVE_FTRACE_MCOUNT_RECORD
73 select HAVE_FUNCTION_GRAPH_TRACER
74 select HAVE_FUNCTION_TRACER
75 select HAVE_GCC_PLUGINS
76 select HAVE_GENERIC_VDSO
77 select HAVE_IOREMAP_PROT
78 select HAVE_IRQ_EXIT_ON_IRQ_STACK
79 select HAVE_IRQ_TIME_ACCOUNTING
81 select HAVE_KRETPROBES
82 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
83 select HAVE_MOD_ARCH_SPECIFIC
85 select HAVE_PERF_EVENTS
87 select HAVE_PERF_USER_STACK_DUMP
88 select HAVE_REGS_AND_STACK_ACCESS_API
90 select HAVE_SPARSE_SYSCALL_NR
91 select HAVE_STACKPROTECTOR
92 select HAVE_SYSCALL_TRACEPOINTS
93 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
94 select IRQ_FORCED_THREADING
96 select MODULES_USE_ELF_REL if MODULES
97 select MODULES_USE_ELF_RELA if MODULES && 64BIT
98 select PERF_USE_VMALLOC
99 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
101 select SYSCTL_EXCEPTION_TRACE
102 select TRACE_IRQFLAGS_SUPPORT
104 select ARCH_HAS_ELFCORE_COMPAT
105 select HAVE_ARCH_KCSAN if 64BIT
107 config MIPS_FIXUP_BIGPHYS_ADDR
115 select SYS_SUPPORTS_32BIT_KERNEL
116 select SYS_SUPPORTS_LITTLE_ENDIAN
117 select SYS_SUPPORTS_ZBOOT
118 select DMA_NONCOHERENT
119 select ARCH_HAS_SYNC_DMA_FOR_CPU
124 select GENERIC_IRQ_CHIP
125 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
127 select CPU_SUPPORTS_CPUFREQ
128 select MIPS_EXTERNAL_TIMER
130 menu "Machine selection"
134 default MIPS_GENERIC_KERNEL
136 config MIPS_GENERIC_KERNEL
137 bool "Generic board-agnostic MIPS kernel"
138 select ARCH_HAS_SETUP_DMA_OPS
143 select CLKSRC_MIPS_GIC
145 select CPU_MIPSR2_IRQ_EI
146 select CPU_MIPSR2_IRQ_VI
148 select DMA_NONCOHERENT
151 select MIPS_AUTO_PFN_OFFSET
152 select MIPS_CPU_SCACHE
154 select MIPS_L1_CACHE_SHIFT_7
155 select NO_EXCEPT_FILL
156 select PCI_DRIVERS_GENERIC
159 select SYS_HAS_CPU_MIPS32_R1
160 select SYS_HAS_CPU_MIPS32_R2
161 select SYS_HAS_CPU_MIPS32_R6
162 select SYS_HAS_CPU_MIPS64_R1
163 select SYS_HAS_CPU_MIPS64_R2
164 select SYS_HAS_CPU_MIPS64_R6
165 select SYS_SUPPORTS_32BIT_KERNEL
166 select SYS_SUPPORTS_64BIT_KERNEL
167 select SYS_SUPPORTS_BIG_ENDIAN
168 select SYS_SUPPORTS_HIGHMEM
169 select SYS_SUPPORTS_LITTLE_ENDIAN
170 select SYS_SUPPORTS_MICROMIPS
171 select SYS_SUPPORTS_MIPS16
172 select SYS_SUPPORTS_MIPS_CPS
173 select SYS_SUPPORTS_MULTITHREADING
174 select SYS_SUPPORTS_RELOCATABLE
175 select SYS_SUPPORTS_SMARTMIPS
176 select SYS_SUPPORTS_ZBOOT
178 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
179 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
180 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
181 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
182 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
183 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
186 Select this to build a kernel which aims to support multiple boards,
187 generally using a flattened device tree passed from the bootloader
188 using the boot protocol defined in the UHI (Unified Hosting
189 Interface) specification.
192 bool "Alchemy processor based machines"
193 select PHYS_ADDR_T_64BIT
197 select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is
198 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
199 select SYS_HAS_CPU_MIPS32_R1
200 select SYS_SUPPORTS_32BIT_KERNEL
201 select SYS_SUPPORTS_APM_EMULATION
203 select SYS_SUPPORTS_ZBOOT
207 bool "Texas Instruments AR7"
210 select DMA_NONCOHERENT
214 select NO_EXCEPT_FILL
216 select SYS_HAS_CPU_MIPS32_R1
217 select SYS_HAS_EARLY_PRINTK
218 select SYS_SUPPORTS_32BIT_KERNEL
219 select SYS_SUPPORTS_LITTLE_ENDIAN
220 select SYS_SUPPORTS_MIPS16
221 select SYS_SUPPORTS_ZBOOT_UART16550
225 Support for the Texas Instruments AR7 System-on-a-Chip
226 family: TNETD7100, 7200 and 7300.
229 bool "Atheros AR231x/AR531x SoC support"
232 select DMA_NONCOHERENT
235 select SYS_HAS_CPU_MIPS32_R1
236 select SYS_SUPPORTS_BIG_ENDIAN
237 select SYS_SUPPORTS_32BIT_KERNEL
238 select SYS_HAS_EARLY_PRINTK
240 Support for Atheros AR231x and Atheros AR531x based boards
243 bool "Atheros AR71XX/AR724X/AR913X based boards"
244 select ARCH_HAS_RESET_CONTROLLER
248 select DMA_NONCOHERENT
253 select SYS_HAS_CPU_MIPS32_R2
254 select SYS_HAS_EARLY_PRINTK
255 select SYS_SUPPORTS_32BIT_KERNEL
256 select SYS_SUPPORTS_BIG_ENDIAN
257 select SYS_SUPPORTS_MIPS16
258 select SYS_SUPPORTS_ZBOOT_UART_PROM
260 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
262 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
265 bool "Broadcom Generic BMIPS kernel"
266 select ARCH_HAS_RESET_CONTROLLER
267 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
269 select NO_EXCEPT_FILL
275 select BCM6345_L1_IRQ
276 select BCM7038_L1_IRQ
277 select BCM7120_L2_IRQ
278 select BRCMSTB_L2_IRQ
280 select DMA_NONCOHERENT
281 select SYS_SUPPORTS_32BIT_KERNEL
282 select SYS_SUPPORTS_LITTLE_ENDIAN
283 select SYS_SUPPORTS_BIG_ENDIAN
284 select SYS_SUPPORTS_HIGHMEM
285 select SYS_HAS_CPU_BMIPS32_3300
286 select SYS_HAS_CPU_BMIPS4350
287 select SYS_HAS_CPU_BMIPS4380
288 select SYS_HAS_CPU_BMIPS5000
290 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
291 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
292 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
293 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
294 select HARDIRQS_SW_RESEND
296 select PCI_DRIVERS_GENERIC
298 Build a generic DT-based kernel image that boots on select
299 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
300 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
301 must be set appropriately for your board.
304 bool "Broadcom BCM47XX based boards"
308 select DMA_NONCOHERENT
311 select SYS_HAS_CPU_MIPS32_R1
312 select NO_EXCEPT_FILL
313 select SYS_SUPPORTS_32BIT_KERNEL
314 select SYS_SUPPORTS_LITTLE_ENDIAN
315 select SYS_SUPPORTS_MIPS16
316 select SYS_SUPPORTS_ZBOOT
317 select SYS_HAS_EARLY_PRINTK
318 select USE_GENERIC_EARLY_PRINTK_8250
320 select LEDS_GPIO_REGISTER
323 select BCM47XX_SSB if !BCM47XX_BCMA
325 Support for BCM47XX based boards
328 bool "Broadcom BCM63XX based boards"
333 select DMA_NONCOHERENT
335 select SYS_SUPPORTS_32BIT_KERNEL
336 select SYS_SUPPORTS_BIG_ENDIAN
337 select SYS_HAS_EARLY_PRINTK
338 select SYS_HAS_CPU_BMIPS32_3300
339 select SYS_HAS_CPU_BMIPS4350
340 select SYS_HAS_CPU_BMIPS4380
343 select MIPS_L1_CACHE_SHIFT_4
344 select HAVE_LEGACY_CLK
346 Support for BCM63XX based boards
353 select DMA_NONCOHERENT
359 select PCI_GT64XXX_PCI0
360 select SYS_HAS_CPU_NEVADA
361 select SYS_HAS_EARLY_PRINTK
362 select SYS_SUPPORTS_32BIT_KERNEL
363 select SYS_SUPPORTS_64BIT_KERNEL
364 select SYS_SUPPORTS_LITTLE_ENDIAN
365 select USE_GENERIC_EARLY_PRINTK_8250
367 config MACH_DECSTATION
371 select CEVT_R4K if CPU_R4X00
373 select CSRC_R4K if CPU_R4X00
374 select CPU_DADDI_WORKAROUNDS if 64BIT
375 select CPU_R4000_WORKAROUNDS if 64BIT
376 select CPU_R4400_WORKAROUNDS if 64BIT
377 select DMA_NONCOHERENT
380 select SYS_HAS_CPU_R3000
381 select SYS_HAS_CPU_R4X00
382 select SYS_SUPPORTS_32BIT_KERNEL
383 select SYS_SUPPORTS_64BIT_KERNEL
384 select SYS_SUPPORTS_LITTLE_ENDIAN
385 select SYS_SUPPORTS_128HZ
386 select SYS_SUPPORTS_256HZ
387 select SYS_SUPPORTS_1024HZ
388 select MIPS_L1_CACHE_SHIFT_4
390 This enables support for DEC's MIPS based workstations. For details
391 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
392 DECstation porting pages on <http://decstation.unix-ag.org/>.
394 If you have one of the following DECstation Models you definitely
395 want to choose R4xx0 for the CPU Type:
402 otherwise choose R3000.
405 bool "Jazz family of machines"
408 select ARCH_MIGHT_HAVE_PC_PARPORT
409 select ARCH_MIGHT_HAVE_PC_SERIO
413 select ARCH_MAY_HAVE_PC_FDC
416 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
417 select GENERIC_ISA_DMA
418 select HAVE_PCSPKR_PLATFORM
423 select SYS_HAS_CPU_R4X00
424 select SYS_SUPPORTS_32BIT_KERNEL
425 select SYS_SUPPORTS_64BIT_KERNEL
426 select SYS_SUPPORTS_100HZ
427 select SYS_SUPPORTS_LITTLE_ENDIAN
429 This a family of machines based on the MIPS R4030 chipset which was
430 used by several vendors to build RISC/os and Windows NT workstations.
431 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
432 Olivetti M700-10 workstations.
434 config MACH_INGENIC_SOC
435 bool "Ingenic SoC based machines"
438 select SYS_SUPPORTS_ZBOOT_UART16550
439 select CPU_SUPPORTS_CPUFREQ
440 select MIPS_EXTERNAL_TIMER
443 bool "Lantiq based platforms"
444 select DMA_NONCOHERENT
448 select SYS_HAS_CPU_MIPS32_R1
449 select SYS_HAS_CPU_MIPS32_R2
450 select SYS_SUPPORTS_BIG_ENDIAN
451 select SYS_SUPPORTS_32BIT_KERNEL
452 select SYS_SUPPORTS_MIPS16
453 select SYS_SUPPORTS_MULTITHREADING
454 select SYS_SUPPORTS_VPE_LOADER
455 select SYS_HAS_EARLY_PRINTK
459 select HAVE_LEGACY_CLK
462 select PINCTRL_LANTIQ
463 select ARCH_HAS_RESET_CONTROLLER
464 select RESET_CONTROLLER
466 config MACH_LOONGSON32
467 bool "Loongson 32-bit family of machines"
468 select SYS_SUPPORTS_ZBOOT
470 This enables support for the Loongson-1 family of machines.
472 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
473 the Institute of Computing Technology (ICT), Chinese Academy of
476 config MACH_LOONGSON2EF
477 bool "Loongson-2E/F family of machines"
478 select SYS_SUPPORTS_ZBOOT
480 This enables the support of early Loongson-2E/F family of machines.
482 config MACH_LOONGSON64
483 bool "Loongson 64-bit family of machines"
484 select ARCH_SPARSEMEM_ENABLE
485 select ARCH_MIGHT_HAVE_PC_PARPORT
486 select ARCH_MIGHT_HAVE_PC_SERIO
487 select GENERIC_ISA_DMA_SUPPORT_BROKEN
497 select NO_EXCEPT_FILL
498 select NR_CPUS_DEFAULT_64
499 select USE_GENERIC_EARLY_PRINTK_8250
500 select PCI_DRIVERS_GENERIC
501 select SYS_HAS_CPU_LOONGSON64
502 select SYS_HAS_EARLY_PRINTK
503 select SYS_SUPPORTS_SMP
504 select SYS_SUPPORTS_HOTPLUG_CPU
505 select SYS_SUPPORTS_NUMA
506 select SYS_SUPPORTS_64BIT_KERNEL
507 select SYS_SUPPORTS_HIGHMEM
508 select SYS_SUPPORTS_LITTLE_ENDIAN
509 select SYS_SUPPORTS_ZBOOT
510 select SYS_SUPPORTS_RELOCATABLE
515 select PCI_HOST_GENERIC
517 This enables the support of Loongson-2/3 family of machines.
519 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
520 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
521 and Loongson-2F which will be removed), developed by the Institute
522 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
525 bool "MIPS Malta board"
526 select ARCH_MAY_HAVE_PC_FDC
527 select ARCH_MIGHT_HAVE_PC_PARPORT
528 select ARCH_MIGHT_HAVE_PC_SERIO
533 select CLKSRC_MIPS_GIC
536 select DMA_NONCOHERENT
537 select GENERIC_ISA_DMA
538 select HAVE_PCSPKR_PLATFORM
544 select MIPS_CPU_SCACHE
546 select MIPS_L1_CACHE_SHIFT_6
548 select PCI_GT64XXX_PCI0
551 select SYS_HAS_CPU_MIPS32_R1
552 select SYS_HAS_CPU_MIPS32_R2
553 select SYS_HAS_CPU_MIPS32_R3_5
554 select SYS_HAS_CPU_MIPS32_R5
555 select SYS_HAS_CPU_MIPS32_R6
556 select SYS_HAS_CPU_MIPS64_R1
557 select SYS_HAS_CPU_MIPS64_R2
558 select SYS_HAS_CPU_MIPS64_R6
559 select SYS_HAS_CPU_NEVADA
560 select SYS_HAS_CPU_RM7000
561 select SYS_SUPPORTS_32BIT_KERNEL
562 select SYS_SUPPORTS_64BIT_KERNEL
563 select SYS_SUPPORTS_BIG_ENDIAN
564 select SYS_SUPPORTS_HIGHMEM
565 select SYS_SUPPORTS_LITTLE_ENDIAN
566 select SYS_SUPPORTS_MICROMIPS
567 select SYS_SUPPORTS_MIPS16
568 select SYS_SUPPORTS_MIPS_CMP
569 select SYS_SUPPORTS_MIPS_CPS
570 select SYS_SUPPORTS_MULTITHREADING
571 select SYS_SUPPORTS_RELOCATABLE
572 select SYS_SUPPORTS_SMARTMIPS
573 select SYS_SUPPORTS_VPE_LOADER
574 select SYS_SUPPORTS_ZBOOT
576 select WAR_ICACHE_REFILLS
577 select ZONE_DMA32 if 64BIT
579 This enables support for the MIPS Technologies Malta evaluation
583 bool "Microchip PIC32 Family"
585 This enables support for the Microchip PIC32 family of platforms.
587 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
591 bool "NEC VR4100 series based machines"
594 select SYS_HAS_CPU_VR41XX
595 select SYS_SUPPORTS_MIPS16
598 config MACH_NINTENDO64
599 bool "Nintendo 64 console"
602 select SYS_HAS_CPU_R4300
603 select SYS_SUPPORTS_BIG_ENDIAN
604 select SYS_SUPPORTS_ZBOOT
605 select SYS_SUPPORTS_32BIT_KERNEL
606 select SYS_SUPPORTS_64BIT_KERNEL
607 select DMA_NONCOHERENT
611 bool "Ralink based machines"
616 select DMA_NONCOHERENT
619 select SYS_HAS_CPU_MIPS32_R1
620 select SYS_HAS_CPU_MIPS32_R2
621 select SYS_SUPPORTS_32BIT_KERNEL
622 select SYS_SUPPORTS_LITTLE_ENDIAN
623 select SYS_SUPPORTS_MIPS16
624 select SYS_SUPPORTS_ZBOOT
625 select SYS_HAS_EARLY_PRINTK
626 select ARCH_HAS_RESET_CONTROLLER
627 select RESET_CONTROLLER
629 config MACH_REALTEK_RTL
630 bool "Realtek RTL838x/RTL839x based machines"
632 select DMA_NONCOHERENT
636 select SYS_HAS_CPU_MIPS32_R1
637 select SYS_HAS_CPU_MIPS32_R2
638 select SYS_SUPPORTS_BIG_ENDIAN
639 select SYS_SUPPORTS_32BIT_KERNEL
640 select SYS_SUPPORTS_MIPS16
641 select SYS_SUPPORTS_MULTITHREADING
642 select SYS_SUPPORTS_VPE_LOADER
648 bool "SGI IP22 (Indy/Indigo2)"
653 select ARCH_MIGHT_HAVE_PC_SERIO
657 select DEFAULT_SGI_PARTITION
658 select DMA_NONCOHERENT
662 select IP22_CPU_SCACHE
664 select GENERIC_ISA_DMA_SUPPORT_BROKEN
666 select SGI_HAS_INDYDOG
672 select SYS_HAS_CPU_R4X00
673 select SYS_HAS_CPU_R5000
674 select SYS_HAS_EARLY_PRINTK
675 select SYS_SUPPORTS_32BIT_KERNEL
676 select SYS_SUPPORTS_64BIT_KERNEL
677 select SYS_SUPPORTS_BIG_ENDIAN
678 select WAR_R4600_V1_INDEX_ICACHEOP
679 select WAR_R4600_V1_HIT_CACHEOP
680 select WAR_R4600_V2_HIT_CACHEOP
681 select MIPS_L1_CACHE_SHIFT_7
683 This are the SGI Indy, Challenge S and Indigo2, as well as certain
684 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
685 that runs on these, say Y here.
688 bool "SGI IP27 (Origin200/2000)"
689 select ARCH_HAS_PHYS_TO_DMA
690 select ARCH_SPARSEMEM_ENABLE
693 select ARC_CMDLINE_ONLY
695 select DEFAULT_SGI_PARTITION
697 select SYS_HAS_EARLY_PRINTK
700 select IRQ_DOMAIN_HIERARCHY
701 select NR_CPUS_DEFAULT_64
702 select PCI_DRIVERS_GENERIC
703 select PCI_XTALK_BRIDGE
704 select SYS_HAS_CPU_R10000
705 select SYS_SUPPORTS_64BIT_KERNEL
706 select SYS_SUPPORTS_BIG_ENDIAN
707 select SYS_SUPPORTS_NUMA
708 select SYS_SUPPORTS_SMP
709 select WAR_R10000_LLSC
710 select MIPS_L1_CACHE_SHIFT_7
713 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
714 workstations. To compile a Linux kernel that runs on these, say Y
718 bool "SGI IP28 (Indigo2 R10k)"
723 select ARCH_MIGHT_HAVE_PC_SERIO
727 select DEFAULT_SGI_PARTITION
728 select DMA_NONCOHERENT
729 select GENERIC_ISA_DMA_SUPPORT_BROKEN
735 select SGI_HAS_INDYDOG
741 select SYS_HAS_CPU_R10000
742 select SYS_HAS_EARLY_PRINTK
743 select SYS_SUPPORTS_64BIT_KERNEL
744 select SYS_SUPPORTS_BIG_ENDIAN
745 select WAR_R10000_LLSC
746 select MIPS_L1_CACHE_SHIFT_7
748 This is the SGI Indigo2 with R10000 processor. To compile a Linux
749 kernel that runs on these, say Y here.
752 bool "SGI IP30 (Octane/Octane2)"
753 select ARCH_HAS_PHYS_TO_DMA
760 select SYNC_R4K if SMP
764 select IRQ_DOMAIN_HIERARCHY
765 select PCI_DRIVERS_GENERIC
766 select PCI_XTALK_BRIDGE
767 select SYS_HAS_EARLY_PRINTK
768 select SYS_HAS_CPU_R10000
769 select SYS_SUPPORTS_64BIT_KERNEL
770 select SYS_SUPPORTS_BIG_ENDIAN
771 select SYS_SUPPORTS_SMP
772 select WAR_R10000_LLSC
773 select MIPS_L1_CACHE_SHIFT_7
776 These are the SGI Octane and Octane2 graphics workstations. To
777 compile a Linux kernel that runs on these, say Y here.
783 select ARCH_HAS_PHYS_TO_DMA
789 select DMA_NONCOHERENT
792 select R5000_CPU_SCACHE
793 select RM7000_CPU_SCACHE
794 select SYS_HAS_CPU_R5000
795 select SYS_HAS_CPU_R10000 if BROKEN
796 select SYS_HAS_CPU_RM7000
797 select SYS_HAS_CPU_NEVADA
798 select SYS_SUPPORTS_64BIT_KERNEL
799 select SYS_SUPPORTS_BIG_ENDIAN
800 select WAR_ICACHE_REFILLS
802 If you want this kernel to run on SGI O2 workstation, say Y here.
805 bool "Sibyte BCM91120C-CRhine"
807 select SIBYTE_BCM1120
809 select SYS_HAS_CPU_SB1
810 select SYS_SUPPORTS_BIG_ENDIAN
811 select SYS_SUPPORTS_LITTLE_ENDIAN
814 bool "Sibyte BCM91120x-Carmel"
816 select SIBYTE_BCM1120
818 select SYS_HAS_CPU_SB1
819 select SYS_SUPPORTS_BIG_ENDIAN
820 select SYS_SUPPORTS_LITTLE_ENDIAN
823 bool "Sibyte BCM91125C-CRhone"
825 select SIBYTE_BCM1125
827 select SYS_HAS_CPU_SB1
828 select SYS_SUPPORTS_BIG_ENDIAN
829 select SYS_SUPPORTS_HIGHMEM
830 select SYS_SUPPORTS_LITTLE_ENDIAN
833 bool "Sibyte BCM91125E-Rhone"
835 select SIBYTE_BCM1125H
837 select SYS_HAS_CPU_SB1
838 select SYS_SUPPORTS_BIG_ENDIAN
839 select SYS_SUPPORTS_LITTLE_ENDIAN
842 bool "Sibyte BCM91250A-SWARM"
844 select HAVE_PATA_PLATFORM
847 select SYS_HAS_CPU_SB1
848 select SYS_SUPPORTS_BIG_ENDIAN
849 select SYS_SUPPORTS_HIGHMEM
850 select SYS_SUPPORTS_LITTLE_ENDIAN
851 select ZONE_DMA32 if 64BIT
852 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
854 config SIBYTE_LITTLESUR
855 bool "Sibyte BCM91250C2-LittleSur"
857 select HAVE_PATA_PLATFORM
860 select SYS_HAS_CPU_SB1
861 select SYS_SUPPORTS_BIG_ENDIAN
862 select SYS_SUPPORTS_HIGHMEM
863 select SYS_SUPPORTS_LITTLE_ENDIAN
864 select ZONE_DMA32 if 64BIT
866 config SIBYTE_SENTOSA
867 bool "Sibyte BCM91250E-Sentosa"
871 select SYS_HAS_CPU_SB1
872 select SYS_SUPPORTS_BIG_ENDIAN
873 select SYS_SUPPORTS_LITTLE_ENDIAN
874 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
877 bool "Sibyte BCM91480B-BigSur"
879 select NR_CPUS_DEFAULT_4
880 select SIBYTE_BCM1x80
882 select SYS_HAS_CPU_SB1
883 select SYS_SUPPORTS_BIG_ENDIAN
884 select SYS_SUPPORTS_HIGHMEM
885 select SYS_SUPPORTS_LITTLE_ENDIAN
886 select ZONE_DMA32 if 64BIT
887 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
890 bool "SNI RM200/300/400"
893 select FW_ARC if CPU_LITTLE_ENDIAN
894 select FW_ARC32 if CPU_LITTLE_ENDIAN
895 select FW_SNIPROM if CPU_BIG_ENDIAN
896 select ARCH_MAY_HAVE_PC_FDC
897 select ARCH_MIGHT_HAVE_PC_PARPORT
898 select ARCH_MIGHT_HAVE_PC_SERIO
902 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
903 select DMA_NONCOHERENT
904 select GENERIC_ISA_DMA
906 select HAVE_PCSPKR_PLATFORM
912 select MIPS_L1_CACHE_SHIFT_6
913 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
914 select SYS_HAS_CPU_R4X00
915 select SYS_HAS_CPU_R5000
916 select SYS_HAS_CPU_R10000
917 select R5000_CPU_SCACHE
918 select SYS_HAS_EARLY_PRINTK
919 select SYS_SUPPORTS_32BIT_KERNEL
920 select SYS_SUPPORTS_64BIT_KERNEL
921 select SYS_SUPPORTS_BIG_ENDIAN
922 select SYS_SUPPORTS_HIGHMEM
923 select SYS_SUPPORTS_LITTLE_ENDIAN
924 select WAR_R4600_V2_HIT_CACHEOP
926 The SNI RM200/300/400 are MIPS-based machines manufactured by
927 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
928 Technology and now in turn merged with Fujitsu. Say Y here to
929 support this machine type.
932 bool "Toshiba TX49 series based machines"
933 select WAR_TX49XX_ICACHE_INDEX_INV
935 config MIKROTIK_RB532
936 bool "Mikrotik RB532 boards"
939 select DMA_NONCOHERENT
942 select SYS_HAS_CPU_MIPS32_R1
943 select SYS_SUPPORTS_32BIT_KERNEL
944 select SYS_SUPPORTS_LITTLE_ENDIAN
948 select MIPS_L1_CACHE_SHIFT_4
950 Support the Mikrotik(tm) RouterBoard 532 series,
951 based on the IDT RC32434 SoC.
953 config CAVIUM_OCTEON_SOC
954 bool "Cavium Networks Octeon SoC based boards"
956 select ARCH_HAS_PHYS_TO_DMA
958 select PHYS_ADDR_T_64BIT
959 select SYS_SUPPORTS_64BIT_KERNEL
960 select SYS_SUPPORTS_BIG_ENDIAN
962 select EDAC_ATOMIC_SCRUB
963 select SYS_SUPPORTS_LITTLE_ENDIAN
964 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
965 select SYS_HAS_EARLY_PRINTK
966 select SYS_HAS_CPU_CAVIUM_OCTEON
968 select HAVE_PLAT_DELAY
969 select HAVE_PLAT_FW_INIT_CMDLINE
970 select HAVE_PLAT_MEMCPY
974 select ARCH_SPARSEMEM_ENABLE
975 select SYS_SUPPORTS_SMP
976 select NR_CPUS_DEFAULT_64
977 select MIPS_NR_CPU_NR_MAP_1024
980 select MTD_COMPLEX_MAPPINGS
982 select SYS_SUPPORTS_RELOCATABLE
984 This option supports all of the Octeon reference boards from Cavium
985 Networks. It builds a kernel that dynamically determines the Octeon
986 CPU type and supports all known board reference implementations.
987 Some of the supported boards are:
994 Say Y here for most Octeon reference boards.
998 source "arch/mips/alchemy/Kconfig"
999 source "arch/mips/ath25/Kconfig"
1000 source "arch/mips/ath79/Kconfig"
1001 source "arch/mips/bcm47xx/Kconfig"
1002 source "arch/mips/bcm63xx/Kconfig"
1003 source "arch/mips/bmips/Kconfig"
1004 source "arch/mips/generic/Kconfig"
1005 source "arch/mips/ingenic/Kconfig"
1006 source "arch/mips/jazz/Kconfig"
1007 source "arch/mips/lantiq/Kconfig"
1008 source "arch/mips/pic32/Kconfig"
1009 source "arch/mips/ralink/Kconfig"
1010 source "arch/mips/sgi-ip27/Kconfig"
1011 source "arch/mips/sibyte/Kconfig"
1012 source "arch/mips/txx9/Kconfig"
1013 source "arch/mips/vr41xx/Kconfig"
1014 source "arch/mips/cavium-octeon/Kconfig"
1015 source "arch/mips/loongson2ef/Kconfig"
1016 source "arch/mips/loongson32/Kconfig"
1017 source "arch/mips/loongson64/Kconfig"
1021 config GENERIC_HWEIGHT
1025 config GENERIC_CALIBRATE_DELAY
1029 config SCHED_OMIT_FRAME_POINTER
1034 # Select some configuration options automatically based on user selections.
1039 config ARCH_MAY_HAVE_PC_FDC
1070 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1076 config MIPS_CLOCK_VSYSCALL
1077 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1086 config ARCH_SUPPORTS_UPROBES
1089 config DMA_PERDEV_COHERENT
1091 select ARCH_HAS_SETUP_DMA_OPS
1092 select DMA_NONCOHERENT
1094 config DMA_NONCOHERENT
1097 # MIPS allows mixing "slightly different" Cacheability and Coherency
1098 # Attribute bits. It is believed that the uncached access through
1099 # KSEG1 and the implementation specific "uncached accelerated" used
1100 # by pgprot_writcombine can be mixed, and the latter sometimes provides
1101 # significant advantages.
1103 select ARCH_HAS_DMA_WRITE_COMBINE
1104 select ARCH_HAS_DMA_PREP_COHERENT
1105 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1106 select ARCH_HAS_DMA_SET_UNCACHED
1107 select DMA_NONCOHERENT_MMAP
1108 select NEED_DMA_MAP_STATE
1110 config SYS_HAS_EARLY_PRINTK
1113 config SYS_SUPPORTS_HOTPLUG_CPU
1116 config MIPS_BONITO64
1125 config NO_IOPORT_MAP
1129 def_bool CPU_NO_LOAD_STORE_LR
1131 config GENERIC_ISA_DMA
1133 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1136 config GENERIC_ISA_DMA_SUPPORT_BROKEN
1138 select GENERIC_ISA_DMA
1140 config HAVE_PLAT_DELAY
1143 config HAVE_PLAT_FW_INIT_CMDLINE
1146 config HAVE_PLAT_MEMCPY
1152 config SYS_SUPPORTS_RELOCATABLE
1155 Selected if the platform supports relocating the kernel.
1156 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1157 to allow access to command line and entropy sources.
1160 # Endianness selection. Sufficiently obscure so many users don't know what to
1161 # answer,so we try hard to limit the available choices. Also the use of a
1162 # choice statement should be more obvious to the user.
1165 prompt "Endianness selection"
1167 Some MIPS machines can be configured for either little or big endian
1168 byte order. These modes require different kernels and a different
1169 Linux distribution. In general there is one preferred byteorder for a
1170 particular system but some systems are just as commonly used in the
1171 one or the other endianness.
1173 config CPU_BIG_ENDIAN
1175 depends on SYS_SUPPORTS_BIG_ENDIAN
1177 config CPU_LITTLE_ENDIAN
1178 bool "Little endian"
1179 depends on SYS_SUPPORTS_LITTLE_ENDIAN
1186 config SYS_SUPPORTS_APM_EMULATION
1189 config SYS_SUPPORTS_BIG_ENDIAN
1192 config SYS_SUPPORTS_LITTLE_ENDIAN
1195 config MIPS_HUGE_TLB_SUPPORT
1196 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1210 config PCI_GT64XXX_PCI0
1213 config PCI_XTALK_BRIDGE
1216 config NO_EXCEPT_FILL
1222 config SWAP_IO_SPACE
1225 config SGI_HAS_INDYDOG
1237 config SGI_HAS_ZILOG
1240 config SGI_HAS_I8042
1243 config DEFAULT_SGI_PARTITION
1255 config MIPS_L1_CACHE_SHIFT_4
1258 config MIPS_L1_CACHE_SHIFT_5
1261 config MIPS_L1_CACHE_SHIFT_6
1264 config MIPS_L1_CACHE_SHIFT_7
1267 config MIPS_L1_CACHE_SHIFT
1269 default "7" if MIPS_L1_CACHE_SHIFT_7
1270 default "6" if MIPS_L1_CACHE_SHIFT_6
1271 default "5" if MIPS_L1_CACHE_SHIFT_5
1272 default "4" if MIPS_L1_CACHE_SHIFT_4
1275 config ARC_CMDLINE_ONLY
1279 bool "ARC console support"
1280 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1294 menu "CPU selection"
1300 config CPU_LOONGSON64
1301 bool "Loongson 64-bit CPU"
1302 depends on SYS_HAS_CPU_LOONGSON64
1303 select ARCH_HAS_PHYS_TO_DMA
1305 select CPU_HAS_PREFETCH
1306 select CPU_SUPPORTS_64BIT_KERNEL
1307 select CPU_SUPPORTS_HIGHMEM
1308 select CPU_SUPPORTS_HUGEPAGES
1309 select CPU_SUPPORTS_MSA
1310 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1311 select CPU_MIPSR2_IRQ_VI
1312 select WEAK_ORDERING
1313 select WEAK_REORDERING_BEYOND_LLSC
1314 select MIPS_ASID_BITS_VARIABLE
1315 select MIPS_PGD_C0_CONTEXT
1316 select MIPS_L1_CACHE_SHIFT_6
1317 select MIPS_FP_SUPPORT
1322 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1323 cores implements the MIPS64R2 instruction set with many extensions,
1324 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1325 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1326 Loongson-2E/2F is not covered here and will be removed in future.
1328 config LOONGSON3_ENHANCEMENT
1329 bool "New Loongson-3 CPU Enhancements"
1331 depends on CPU_LOONGSON64
1333 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1334 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1335 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1336 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1337 Fast TLB refill support, etc.
1339 This option enable those enhancements which are not probed at run
1340 time. If you want a generic kernel to run on all Loongson 3 machines,
1341 please say 'N' here. If you want a high-performance kernel to run on
1342 new Loongson-3 machines only, please say 'Y' here.
1344 config CPU_LOONGSON3_WORKAROUNDS
1345 bool "Loongson-3 LLSC Workarounds"
1347 depends on CPU_LOONGSON64
1349 Loongson-3 processors have the llsc issues which require workarounds.
1350 Without workarounds the system may hang unexpectedly.
1352 Say Y, unless you know what you are doing.
1354 config CPU_LOONGSON3_CPUCFG_EMULATION
1355 bool "Emulate the CPUCFG instruction on older Loongson cores"
1357 depends on CPU_LOONGSON64
1359 Loongson-3A R4 and newer have the CPUCFG instruction available for
1360 userland to query CPU capabilities, much like CPUID on x86. This
1361 option provides emulation of the instruction on older Loongson
1362 cores, back to Loongson-3A1000.
1364 If unsure, please say Y.
1366 config CPU_LOONGSON2E
1368 depends on SYS_HAS_CPU_LOONGSON2E
1369 select CPU_LOONGSON2EF
1371 The Loongson 2E processor implements the MIPS III instruction set
1372 with many extensions.
1374 It has an internal FPGA northbridge, which is compatible to
1377 config CPU_LOONGSON2F
1379 depends on SYS_HAS_CPU_LOONGSON2F
1380 select CPU_LOONGSON2EF
1383 The Loongson 2F processor implements the MIPS III instruction set
1384 with many extensions.
1386 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1387 have a similar programming interface with FPGA northbridge used in
1390 config CPU_LOONGSON1B
1392 depends on SYS_HAS_CPU_LOONGSON1B
1393 select CPU_LOONGSON32
1394 select LEDS_GPIO_REGISTER
1396 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1397 Release 1 instruction set and part of the MIPS32 Release 2
1400 config CPU_LOONGSON1C
1402 depends on SYS_HAS_CPU_LOONGSON1C
1403 select CPU_LOONGSON32
1404 select LEDS_GPIO_REGISTER
1406 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1407 Release 1 instruction set and part of the MIPS32 Release 2
1410 config CPU_MIPS32_R1
1411 bool "MIPS32 Release 1"
1412 depends on SYS_HAS_CPU_MIPS32_R1
1413 select CPU_HAS_PREFETCH
1414 select CPU_SUPPORTS_32BIT_KERNEL
1415 select CPU_SUPPORTS_HIGHMEM
1417 Choose this option to build a kernel for release 1 or later of the
1418 MIPS32 architecture. Most modern embedded systems with a 32-bit
1419 MIPS processor are based on a MIPS32 processor. If you know the
1420 specific type of processor in your system, choose those that one
1421 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1422 Release 2 of the MIPS32 architecture is available since several
1423 years so chances are you even have a MIPS32 Release 2 processor
1424 in which case you should choose CPU_MIPS32_R2 instead for better
1427 config CPU_MIPS32_R2
1428 bool "MIPS32 Release 2"
1429 depends on SYS_HAS_CPU_MIPS32_R2
1430 select CPU_HAS_PREFETCH
1431 select CPU_SUPPORTS_32BIT_KERNEL
1432 select CPU_SUPPORTS_HIGHMEM
1433 select CPU_SUPPORTS_MSA
1436 Choose this option to build a kernel for release 2 or later of the
1437 MIPS32 architecture. Most modern embedded systems with a 32-bit
1438 MIPS processor are based on a MIPS32 processor. If you know the
1439 specific type of processor in your system, choose those that one
1440 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1442 config CPU_MIPS32_R5
1443 bool "MIPS32 Release 5"
1444 depends on SYS_HAS_CPU_MIPS32_R5
1445 select CPU_HAS_PREFETCH
1446 select CPU_SUPPORTS_32BIT_KERNEL
1447 select CPU_SUPPORTS_HIGHMEM
1448 select CPU_SUPPORTS_MSA
1450 select MIPS_O32_FP64_SUPPORT
1452 Choose this option to build a kernel for release 5 or later of the
1453 MIPS32 architecture. New MIPS processors, starting with the Warrior
1454 family, are based on a MIPS32r5 processor. If you own an older
1455 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1457 config CPU_MIPS32_R6
1458 bool "MIPS32 Release 6"
1459 depends on SYS_HAS_CPU_MIPS32_R6
1460 select CPU_HAS_PREFETCH
1461 select CPU_NO_LOAD_STORE_LR
1462 select CPU_SUPPORTS_32BIT_KERNEL
1463 select CPU_SUPPORTS_HIGHMEM
1464 select CPU_SUPPORTS_MSA
1466 select MIPS_O32_FP64_SUPPORT
1468 Choose this option to build a kernel for release 6 or later of the
1469 MIPS32 architecture. New MIPS processors, starting with the Warrior
1470 family, are based on a MIPS32r6 processor. If you own an older
1471 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1473 config CPU_MIPS64_R1
1474 bool "MIPS64 Release 1"
1475 depends on SYS_HAS_CPU_MIPS64_R1
1476 select CPU_HAS_PREFETCH
1477 select CPU_SUPPORTS_32BIT_KERNEL
1478 select CPU_SUPPORTS_64BIT_KERNEL
1479 select CPU_SUPPORTS_HIGHMEM
1480 select CPU_SUPPORTS_HUGEPAGES
1482 Choose this option to build a kernel for release 1 or later of the
1483 MIPS64 architecture. Many modern embedded systems with a 64-bit
1484 MIPS processor are based on a MIPS64 processor. If you know the
1485 specific type of processor in your system, choose those that one
1486 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1487 Release 2 of the MIPS64 architecture is available since several
1488 years so chances are you even have a MIPS64 Release 2 processor
1489 in which case you should choose CPU_MIPS64_R2 instead for better
1492 config CPU_MIPS64_R2
1493 bool "MIPS64 Release 2"
1494 depends on SYS_HAS_CPU_MIPS64_R2
1495 select CPU_HAS_PREFETCH
1496 select CPU_SUPPORTS_32BIT_KERNEL
1497 select CPU_SUPPORTS_64BIT_KERNEL
1498 select CPU_SUPPORTS_HIGHMEM
1499 select CPU_SUPPORTS_HUGEPAGES
1500 select CPU_SUPPORTS_MSA
1503 Choose this option to build a kernel for release 2 or later of the
1504 MIPS64 architecture. Many modern embedded systems with a 64-bit
1505 MIPS processor are based on a MIPS64 processor. If you know the
1506 specific type of processor in your system, choose those that one
1507 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1509 config CPU_MIPS64_R5
1510 bool "MIPS64 Release 5"
1511 depends on SYS_HAS_CPU_MIPS64_R5
1512 select CPU_HAS_PREFETCH
1513 select CPU_SUPPORTS_32BIT_KERNEL
1514 select CPU_SUPPORTS_64BIT_KERNEL
1515 select CPU_SUPPORTS_HIGHMEM
1516 select CPU_SUPPORTS_HUGEPAGES
1517 select CPU_SUPPORTS_MSA
1518 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1521 Choose this option to build a kernel for release 5 or later of the
1522 MIPS64 architecture. This is a intermediate MIPS architecture
1523 release partly implementing release 6 features. Though there is no
1524 any hardware known to be based on this release.
1526 config CPU_MIPS64_R6
1527 bool "MIPS64 Release 6"
1528 depends on SYS_HAS_CPU_MIPS64_R6
1529 select CPU_HAS_PREFETCH
1530 select CPU_NO_LOAD_STORE_LR
1531 select CPU_SUPPORTS_32BIT_KERNEL
1532 select CPU_SUPPORTS_64BIT_KERNEL
1533 select CPU_SUPPORTS_HIGHMEM
1534 select CPU_SUPPORTS_HUGEPAGES
1535 select CPU_SUPPORTS_MSA
1536 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1539 Choose this option to build a kernel for release 6 or later of the
1540 MIPS64 architecture. New MIPS processors, starting with the Warrior
1541 family, are based on a MIPS64r6 processor. If you own an older
1542 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1545 bool "MIPS Warrior P5600"
1546 depends on SYS_HAS_CPU_P5600
1547 select CPU_HAS_PREFETCH
1548 select CPU_SUPPORTS_32BIT_KERNEL
1549 select CPU_SUPPORTS_HIGHMEM
1550 select CPU_SUPPORTS_MSA
1551 select CPU_SUPPORTS_CPUFREQ
1552 select CPU_MIPSR2_IRQ_VI
1553 select CPU_MIPSR2_IRQ_EI
1555 select MIPS_O32_FP64_SUPPORT
1557 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1558 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1559 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1560 level features like up to six P5600 calculation cores, CM2 with L2
1561 cache, IOCU/IOMMU (though might be unused depending on the system-
1562 specific IP core configuration), GIC, CPC, virtualisation module,
1567 depends on SYS_HAS_CPU_R3000
1570 select CPU_SUPPORTS_32BIT_KERNEL
1571 select CPU_SUPPORTS_HIGHMEM
1573 Please make sure to pick the right CPU type. Linux/MIPS is not
1574 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1575 *not* work on R4000 machines and vice versa. However, since most
1576 of the supported machines have an R4000 (or similar) CPU, R4x00
1577 might be a safe bet. If the resulting kernel does not work,
1578 try to recompile with R3000.
1582 depends on SYS_HAS_CPU_VR41XX
1583 select CPU_SUPPORTS_32BIT_KERNEL
1584 select CPU_SUPPORTS_64BIT_KERNEL
1586 The options selects support for the NEC VR4100 series of processors.
1587 Only choose this option if you have one of these processors as a
1588 kernel built with this option will not run on any other type of
1589 processor or vice versa.
1593 depends on SYS_HAS_CPU_R4300
1594 select CPU_SUPPORTS_32BIT_KERNEL
1595 select CPU_SUPPORTS_64BIT_KERNEL
1597 MIPS Technologies R4300-series processors.
1601 depends on SYS_HAS_CPU_R4X00
1602 select CPU_SUPPORTS_32BIT_KERNEL
1603 select CPU_SUPPORTS_64BIT_KERNEL
1604 select CPU_SUPPORTS_HUGEPAGES
1606 MIPS Technologies R4000-series processors other than 4300, including
1607 the R4000, R4400, R4600, and 4700.
1611 depends on SYS_HAS_CPU_TX49XX
1612 select CPU_HAS_PREFETCH
1613 select CPU_SUPPORTS_32BIT_KERNEL
1614 select CPU_SUPPORTS_64BIT_KERNEL
1615 select CPU_SUPPORTS_HUGEPAGES
1619 depends on SYS_HAS_CPU_R5000
1620 select CPU_SUPPORTS_32BIT_KERNEL
1621 select CPU_SUPPORTS_64BIT_KERNEL
1622 select CPU_SUPPORTS_HUGEPAGES
1624 MIPS Technologies R5000-series processors other than the Nevada.
1628 depends on SYS_HAS_CPU_R5500
1629 select CPU_SUPPORTS_32BIT_KERNEL
1630 select CPU_SUPPORTS_64BIT_KERNEL
1631 select CPU_SUPPORTS_HUGEPAGES
1633 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1638 depends on SYS_HAS_CPU_NEVADA
1639 select CPU_SUPPORTS_32BIT_KERNEL
1640 select CPU_SUPPORTS_64BIT_KERNEL
1641 select CPU_SUPPORTS_HUGEPAGES
1643 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1647 depends on SYS_HAS_CPU_R10000
1648 select CPU_HAS_PREFETCH
1649 select CPU_SUPPORTS_32BIT_KERNEL
1650 select CPU_SUPPORTS_64BIT_KERNEL
1651 select CPU_SUPPORTS_HIGHMEM
1652 select CPU_SUPPORTS_HUGEPAGES
1654 MIPS Technologies R10000-series processors.
1658 depends on SYS_HAS_CPU_RM7000
1659 select CPU_HAS_PREFETCH
1660 select CPU_SUPPORTS_32BIT_KERNEL
1661 select CPU_SUPPORTS_64BIT_KERNEL
1662 select CPU_SUPPORTS_HIGHMEM
1663 select CPU_SUPPORTS_HUGEPAGES
1667 depends on SYS_HAS_CPU_SB1
1668 select CPU_SUPPORTS_32BIT_KERNEL
1669 select CPU_SUPPORTS_64BIT_KERNEL
1670 select CPU_SUPPORTS_HIGHMEM
1671 select CPU_SUPPORTS_HUGEPAGES
1672 select WEAK_ORDERING
1674 config CPU_CAVIUM_OCTEON
1675 bool "Cavium Octeon processor"
1676 depends on SYS_HAS_CPU_CAVIUM_OCTEON
1677 select CPU_HAS_PREFETCH
1678 select CPU_SUPPORTS_64BIT_KERNEL
1679 select WEAK_ORDERING
1680 select CPU_SUPPORTS_HIGHMEM
1681 select CPU_SUPPORTS_HUGEPAGES
1682 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1683 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1684 select MIPS_L1_CACHE_SHIFT_7
1687 The Cavium Octeon processor is a highly integrated chip containing
1688 many ethernet hardware widgets for networking tasks. The processor
1689 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1690 Full details can be found at http://www.caviumnetworks.com.
1693 bool "Broadcom BMIPS"
1694 depends on SYS_HAS_CPU_BMIPS
1696 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1697 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1698 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1699 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1700 select CPU_SUPPORTS_32BIT_KERNEL
1701 select DMA_NONCOHERENT
1703 select SWAP_IO_SPACE
1704 select WEAK_ORDERING
1705 select CPU_SUPPORTS_HIGHMEM
1706 select CPU_HAS_PREFETCH
1707 select CPU_SUPPORTS_CPUFREQ
1708 select MIPS_EXTERNAL_TIMER
1709 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
1711 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1715 config CPU_MIPS32_3_5_FEATURES
1716 bool "MIPS32 Release 3.5 Features"
1717 depends on SYS_HAS_CPU_MIPS32_R3_5
1718 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1721 Choose this option to build a kernel for release 2 or later of the
1722 MIPS32 architecture including features from the 3.5 release such as
1723 support for Enhanced Virtual Addressing (EVA).
1725 config CPU_MIPS32_3_5_EVA
1726 bool "Enhanced Virtual Addressing (EVA)"
1727 depends on CPU_MIPS32_3_5_FEATURES
1731 Choose this option if you want to enable the Enhanced Virtual
1732 Addressing (EVA) on your MIPS32 core (such as proAptiv).
1733 One of its primary benefits is an increase in the maximum size
1734 of lowmem (up to 3GB). If unsure, say 'N' here.
1736 config CPU_MIPS32_R5_FEATURES
1737 bool "MIPS32 Release 5 Features"
1738 depends on SYS_HAS_CPU_MIPS32_R5
1739 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1741 Choose this option to build a kernel for release 2 or later of the
1742 MIPS32 architecture including features from release 5 such as
1743 support for Extended Physical Addressing (XPA).
1745 config CPU_MIPS32_R5_XPA
1746 bool "Extended Physical Addressing (XPA)"
1747 depends on CPU_MIPS32_R5_FEATURES
1749 depends on !PAGE_SIZE_4KB
1750 depends on SYS_SUPPORTS_HIGHMEM
1753 select PHYS_ADDR_T_64BIT
1756 Choose this option if you want to enable the Extended Physical
1757 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1758 benefit is to increase physical addressing equal to or greater
1759 than 40 bits. Note that this has the side effect of turning on
1760 64-bit addressing which in turn makes the PTEs 64-bit in size.
1761 If unsure, say 'N' here.
1764 config CPU_NOP_WORKAROUNDS
1767 config CPU_JUMP_WORKAROUNDS
1770 config CPU_LOONGSON2F_WORKAROUNDS
1771 bool "Loongson 2F Workarounds"
1773 select CPU_NOP_WORKAROUNDS
1774 select CPU_JUMP_WORKAROUNDS
1776 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1777 require workarounds. Without workarounds the system may hang
1778 unexpectedly. For more information please refer to the gas
1779 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1781 Loongson 2F03 and later have fixed these issues and no workarounds
1782 are needed. The workarounds have no significant side effect on them
1783 but may decrease the performance of the system so this option should
1784 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1787 If unsure, please say Y.
1788 endif # CPU_LOONGSON2F
1790 config SYS_SUPPORTS_ZBOOT
1792 select HAVE_KERNEL_GZIP
1793 select HAVE_KERNEL_BZIP2
1794 select HAVE_KERNEL_LZ4
1795 select HAVE_KERNEL_LZMA
1796 select HAVE_KERNEL_LZO
1797 select HAVE_KERNEL_XZ
1798 select HAVE_KERNEL_ZSTD
1800 config SYS_SUPPORTS_ZBOOT_UART16550
1802 select SYS_SUPPORTS_ZBOOT
1804 config SYS_SUPPORTS_ZBOOT_UART_PROM
1806 select SYS_SUPPORTS_ZBOOT
1808 config CPU_LOONGSON2EF
1810 select CPU_SUPPORTS_32BIT_KERNEL
1811 select CPU_SUPPORTS_64BIT_KERNEL
1812 select CPU_SUPPORTS_HIGHMEM
1813 select CPU_SUPPORTS_HUGEPAGES
1814 select ARCH_HAS_PHYS_TO_DMA
1816 config CPU_LOONGSON32
1820 select CPU_HAS_PREFETCH
1821 select CPU_SUPPORTS_32BIT_KERNEL
1822 select CPU_SUPPORTS_HIGHMEM
1823 select CPU_SUPPORTS_CPUFREQ
1825 config CPU_BMIPS32_3300
1826 select SMP_UP if SMP
1829 config CPU_BMIPS4350
1831 select SYS_SUPPORTS_SMP
1832 select SYS_SUPPORTS_HOTPLUG_CPU
1834 config CPU_BMIPS4380
1836 select MIPS_L1_CACHE_SHIFT_6
1837 select SYS_SUPPORTS_SMP
1838 select SYS_SUPPORTS_HOTPLUG_CPU
1841 config CPU_BMIPS5000
1843 select MIPS_CPU_SCACHE
1844 select MIPS_L1_CACHE_SHIFT_7
1845 select SYS_SUPPORTS_SMP
1846 select SYS_SUPPORTS_HOTPLUG_CPU
1849 config SYS_HAS_CPU_LOONGSON64
1851 select CPU_SUPPORTS_CPUFREQ
1854 config SYS_HAS_CPU_LOONGSON2E
1857 config SYS_HAS_CPU_LOONGSON2F
1859 select CPU_SUPPORTS_CPUFREQ
1860 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1862 config SYS_HAS_CPU_LOONGSON1B
1865 config SYS_HAS_CPU_LOONGSON1C
1868 config SYS_HAS_CPU_MIPS32_R1
1871 config SYS_HAS_CPU_MIPS32_R2
1874 config SYS_HAS_CPU_MIPS32_R3_5
1877 config SYS_HAS_CPU_MIPS32_R5
1879 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1881 config SYS_HAS_CPU_MIPS32_R6
1883 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1885 config SYS_HAS_CPU_MIPS64_R1
1888 config SYS_HAS_CPU_MIPS64_R2
1891 config SYS_HAS_CPU_MIPS64_R5
1893 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1895 config SYS_HAS_CPU_MIPS64_R6
1897 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1899 config SYS_HAS_CPU_P5600
1901 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1903 config SYS_HAS_CPU_R3000
1906 config SYS_HAS_CPU_VR41XX
1909 config SYS_HAS_CPU_R4300
1912 config SYS_HAS_CPU_R4X00
1915 config SYS_HAS_CPU_TX49XX
1918 config SYS_HAS_CPU_R5000
1921 config SYS_HAS_CPU_R5500
1924 config SYS_HAS_CPU_NEVADA
1927 config SYS_HAS_CPU_R10000
1929 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1931 config SYS_HAS_CPU_RM7000
1934 config SYS_HAS_CPU_SB1
1937 config SYS_HAS_CPU_CAVIUM_OCTEON
1940 config SYS_HAS_CPU_BMIPS
1943 config SYS_HAS_CPU_BMIPS32_3300
1945 select SYS_HAS_CPU_BMIPS
1947 config SYS_HAS_CPU_BMIPS4350
1949 select SYS_HAS_CPU_BMIPS
1951 config SYS_HAS_CPU_BMIPS4380
1953 select SYS_HAS_CPU_BMIPS
1955 config SYS_HAS_CPU_BMIPS5000
1957 select SYS_HAS_CPU_BMIPS
1958 select ARCH_HAS_SYNC_DMA_FOR_CPU
1961 # CPU may reorder R->R, R->W, W->R, W->W
1962 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
1964 config WEAK_ORDERING
1968 # CPU may reorder reads and writes beyond LL/SC
1969 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
1971 config WEAK_REORDERING_BEYOND_LLSC
1976 # These two indicate any level of the MIPS32 and MIPS64 architecture
1980 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
1981 CPU_MIPS32_R6 || CPU_P5600
1985 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
1986 CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
1989 # These indicate the revision of the architecture
1993 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
1997 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
1999 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2004 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
2006 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2011 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
2013 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2014 select HAVE_ARCH_BITREVERSE
2015 select MIPS_ASID_BITS_VARIABLE
2016 select MIPS_CRC_SUPPORT
2019 config TARGET_ISA_REV
2021 default 1 if CPU_MIPSR1
2022 default 2 if CPU_MIPSR2
2023 default 5 if CPU_MIPSR5
2024 default 6 if CPU_MIPSR6
2027 Reflects the ISA revision being targeted by the kernel build. This
2028 is effectively the Kconfig equivalent of MIPS_ISA_REV.
2036 config SYS_SUPPORTS_32BIT_KERNEL
2038 config SYS_SUPPORTS_64BIT_KERNEL
2040 config CPU_SUPPORTS_32BIT_KERNEL
2042 config CPU_SUPPORTS_64BIT_KERNEL
2044 config CPU_SUPPORTS_CPUFREQ
2046 config CPU_SUPPORTS_ADDRWINCFG
2048 config CPU_SUPPORTS_HUGEPAGES
2050 depends on !(32BIT && (PHYS_ADDR_T_64BIT || EVA))
2051 config MIPS_PGD_C0_CONTEXT
2054 default y if (CPU_MIPSR2 || CPU_MIPSR6)
2057 # Set to y for ptrace access to watch registers.
2059 config HARDWARE_WATCHPOINTS
2061 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
2066 prompt "Kernel code model"
2068 You should only select this option if you have a workload that
2069 actually benefits from 64-bit processing or if your machine has
2070 large memory. You will only be presented a single option in this
2071 menu if your system does not support both 32-bit and 64-bit kernels.
2074 bool "32-bit kernel"
2075 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2078 Select this option if you want to build a 32-bit kernel.
2081 bool "64-bit kernel"
2082 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2084 Select this option if you want to build a 64-bit kernel.
2088 config MIPS_VA_BITS_48
2089 bool "48 bits virtual memory"
2092 Support a maximum at least 48 bits of application virtual
2093 memory. Default is 40 bits or less, depending on the CPU.
2094 For page sizes 16k and above, this option results in a small
2095 memory overhead for page tables. For 4k page size, a fourth
2096 level of page tables is added which imposes both a memory
2097 overhead as well as slower TLB fault handling.
2101 config ZBOOT_LOAD_ADDRESS
2102 hex "Compressed kernel load address"
2103 default 0xffffffff80400000 if BCM47XX
2105 depends on SYS_SUPPORTS_ZBOOT
2107 The address to load compressed kernel, aka vmlinuz.
2109 This is only used if non-zero.
2112 prompt "Kernel page size"
2113 default PAGE_SIZE_4KB
2115 config PAGE_SIZE_4KB
2117 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
2119 This option select the standard 4kB Linux page size. On some
2120 R3000-family processors this is the only available page size. Using
2121 4kB page size will minimize memory consumption and is therefore
2122 recommended for low memory systems.
2124 config PAGE_SIZE_8KB
2126 depends on CPU_CAVIUM_OCTEON
2127 depends on !MIPS_VA_BITS_48
2129 Using 8kB page size will result in higher performance kernel at
2130 the price of higher memory consumption. This option is available
2131 only on cnMIPS processors. Note that you will need a suitable Linux
2132 distribution to support this.
2134 config PAGE_SIZE_16KB
2136 depends on !CPU_R3000
2138 Using 16kB page size will result in higher performance kernel at
2139 the price of higher memory consumption. This option is available on
2140 all non-R3000 family processors. Note that you will need a suitable
2141 Linux distribution to support this.
2143 config PAGE_SIZE_32KB
2145 depends on CPU_CAVIUM_OCTEON
2146 depends on !MIPS_VA_BITS_48
2148 Using 32kB page size will result in higher performance kernel at
2149 the price of higher memory consumption. This option is available
2150 only on cnMIPS cores. Note that you will need a suitable Linux
2151 distribution to support this.
2153 config PAGE_SIZE_64KB
2155 depends on !CPU_R3000
2157 Using 64kB page size will result in higher performance kernel at
2158 the price of higher memory consumption. This option is available on
2159 all non-R3000 family processor. Not that at the time of this
2160 writing this option is still high experimental.
2164 config FORCE_MAX_ZONEORDER
2165 int "Maximum zone order"
2166 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2167 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2168 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2169 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2170 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2171 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2175 The kernel memory allocator divides physically contiguous memory
2176 blocks into "zones", where each zone is a power of two number of
2177 pages. This option selects the largest power of two that the kernel
2178 keeps in the memory allocator. If you need to allocate very large
2179 blocks of physically contiguous memory, then you may need to
2180 increase this value.
2182 This config option is actually maximum order plus one. For example,
2183 a value of 11 means that the largest free memory block is 2^10 pages.
2185 The page size is not necessarily 4KB. Keep this in mind
2186 when choosing a value for this option.
2191 config IP22_CPU_SCACHE
2196 # Support for a MIPS32 / MIPS64 style S-caches
2198 config MIPS_CPU_SCACHE
2202 config R5000_CPU_SCACHE
2206 config RM7000_CPU_SCACHE
2210 config SIBYTE_DMA_PAGEOPS
2211 bool "Use DMA to clear/copy pages"
2214 Instead of using the CPU to zero and copy pages, use a Data Mover
2215 channel. These DMA channels are otherwise unused by the standard
2216 SiByte Linux port. Seems to give a small performance benefit.
2218 config CPU_HAS_PREFETCH
2221 config CPU_GENERIC_DUMP_TLB
2223 default y if !CPU_R3000
2225 config MIPS_FP_SUPPORT
2226 bool "Floating Point support" if EXPERT
2229 Select y to include support for floating point in the kernel
2230 including initialization of FPU hardware, FP context save & restore
2231 and emulation of an FPU where necessary. Without this support any
2232 userland program attempting to use floating point instructions will
2235 If you know that your userland will not attempt to use floating point
2236 instructions then you can say n here to shrink the kernel a little.
2240 config CPU_R2300_FPU
2242 depends on MIPS_FP_SUPPORT
2243 default y if CPU_R3000
2250 depends on MIPS_FP_SUPPORT
2251 default y if !CPU_R2300_FPU
2253 config CPU_R4K_CACHE_TLB
2255 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2258 bool "MIPS MT SMP support (1 TC on each available VPE)"
2260 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
2261 select CPU_MIPSR2_IRQ_VI
2262 select CPU_MIPSR2_IRQ_EI
2267 select SYS_SUPPORTS_SMP
2268 select SYS_SUPPORTS_SCHED_SMT
2269 select MIPS_PERF_SHARED_TC_COUNTERS
2271 This is a kernel model which is known as SMVP. This is supported
2272 on cores with the MT ASE and uses the available VPEs to implement
2273 virtual processors which supports SMP. This is equivalent to the
2274 Intel Hyperthreading feature. For further information go to
2275 <http://www.imgtec.com/mips/mips-multithreading.asp>.
2281 bool "SMT (multithreading) scheduler support"
2282 depends on SYS_SUPPORTS_SCHED_SMT
2285 SMT scheduler support improves the CPU scheduler's decision making
2286 when dealing with MIPS MT enabled cores at a cost of slightly
2287 increased overhead in some places. If unsure say N here.
2289 config SYS_SUPPORTS_SCHED_SMT
2292 config SYS_SUPPORTS_MULTITHREADING
2295 config MIPS_MT_FPAFF
2296 bool "Dynamic FPU affinity for FP-intensive threads"
2298 depends on MIPS_MT_SMP
2300 config MIPSR2_TO_R6_EMULATOR
2301 bool "MIPS R2-to-R6 emulator"
2302 depends on CPU_MIPSR6
2303 depends on MIPS_FP_SUPPORT
2306 Choose this option if you want to run non-R6 MIPS userland code.
2307 Even if you say 'Y' here, the emulator will still be disabled by
2308 default. You can enable it using the 'mipsr2emu' kernel option.
2309 The only reason this is a build-time option is to save ~14K from the
2312 config SYS_SUPPORTS_VPE_LOADER
2314 depends on SYS_SUPPORTS_MULTITHREADING
2316 Indicates that the platform supports the VPE loader, and provides
2319 config MIPS_VPE_LOADER
2320 bool "VPE loader support."
2321 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2322 select CPU_MIPSR2_IRQ_VI
2323 select CPU_MIPSR2_IRQ_EI
2326 Includes a loader for loading an elf relocatable object
2327 onto another VPE and running it.
2329 config MIPS_VPE_LOADER_CMP
2332 depends on MIPS_VPE_LOADER && MIPS_CMP
2334 config MIPS_VPE_LOADER_MT
2337 depends on MIPS_VPE_LOADER && !MIPS_CMP
2339 config MIPS_VPE_LOADER_TOM
2340 bool "Load VPE program into memory hidden from linux"
2341 depends on MIPS_VPE_LOADER
2344 The loader can use memory that is present but has been hidden from
2345 Linux using the kernel command line option "mem=xxMB". It's up to
2346 you to ensure the amount you put in the option and the space your
2347 program requires is less or equal to the amount physically present.
2349 config MIPS_VPE_APSP_API
2350 bool "Enable support for AP/SP API (RTLX)"
2351 depends on MIPS_VPE_LOADER
2353 config MIPS_VPE_APSP_API_CMP
2356 depends on MIPS_VPE_APSP_API && MIPS_CMP
2358 config MIPS_VPE_APSP_API_MT
2361 depends on MIPS_VPE_APSP_API && !MIPS_CMP
2364 bool "MIPS CMP framework support (DEPRECATED)"
2365 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2368 select SYS_SUPPORTS_SMP
2369 select WEAK_ORDERING
2372 Select this if you are using a bootloader which implements the "CMP
2373 framework" protocol (ie. YAMON) and want your kernel to make use of
2374 its ability to start secondary CPUs.
2376 Unless you have a specific need, you should use CONFIG_MIPS_CPS
2380 bool "MIPS Coherent Processing System support"
2381 depends on SYS_SUPPORTS_MIPS_CPS
2383 select MIPS_CPS_PM if HOTPLUG_CPU
2385 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2386 select SYS_SUPPORTS_HOTPLUG_CPU
2387 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2388 select SYS_SUPPORTS_SMP
2389 select WEAK_ORDERING
2390 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
2392 Select this if you wish to run an SMP kernel across multiple cores
2393 within a MIPS Coherent Processing System. When this option is
2394 enabled the kernel will probe for other cores and boot them with
2395 no external assistance. It is safe to enable this when hardware
2396 support is unavailable.
2409 config SB1_PASS_2_WORKAROUNDS
2411 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2414 config SB1_PASS_2_1_WORKAROUNDS
2416 depends on CPU_SB1 && CPU_SB1_PASS_2
2420 prompt "SmartMIPS or microMIPS ASE support"
2422 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2425 Select this if you want neither microMIPS nor SmartMIPS support
2427 config CPU_HAS_SMARTMIPS
2428 depends on SYS_SUPPORTS_SMARTMIPS
2431 SmartMIPS is a extension of the MIPS32 architecture aimed at
2432 increased security at both hardware and software level for
2433 smartcards. Enabling this option will allow proper use of the
2434 SmartMIPS instructions by Linux applications. However a kernel with
2435 this option will not work on a MIPS core without SmartMIPS core. If
2436 you don't know you probably don't have SmartMIPS and should say N
2439 config CPU_MICROMIPS
2440 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2443 When this option is enabled the kernel will be built using the
2449 bool "Support for the MIPS SIMD Architecture"
2450 depends on CPU_SUPPORTS_MSA
2451 depends on MIPS_FP_SUPPORT
2452 depends on 64BIT || MIPS_O32_FP64_SUPPORT
2454 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2455 and a set of SIMD instructions to operate on them. When this option
2456 is enabled the kernel will support allocating & switching MSA
2457 vector register contexts. If you know that your kernel will only be
2458 running on CPUs which do not support MSA or that your userland will
2459 not be making use of it then you may wish to say N here to reduce
2460 the size & complexity of your kernel.
2471 depends on !CPU_DIEI_BROKEN
2474 config CPU_DIEI_BROKEN
2480 config CPU_NO_LOAD_STORE_LR
2483 CPU lacks support for unaligned load and store instructions:
2484 LWL, LWR, SWL, SWR (Load/store word left/right).
2485 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2489 # Vectored interrupt mode is an R2 feature
2491 config CPU_MIPSR2_IRQ_VI
2495 # Extended interrupt mode is an R2 feature
2497 config CPU_MIPSR2_IRQ_EI
2502 depends on !CPU_R3000
2509 # Work around the "daddi" and "daddiu" CPU errata:
2511 # - The `daddi' instruction fails to trap on overflow.
2512 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2515 # - The `daddiu' instruction can produce an incorrect result.
2516 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2518 # "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
2520 # "MIPS R4400PC/SC Errata, Processor Revision 1.0", erratum #7
2521 # "MIPS R4400MC Errata, Processor Revision 1.0", erratum #5
2522 config CPU_DADDI_WORKAROUNDS
2525 # Work around certain R4000 CPU errata (as implemented by GCC):
2527 # - A double-word or a variable shift may give an incorrect result
2528 # if executed immediately after starting an integer division:
2529 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2531 # "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
2534 # - A double-word or a variable shift may give an incorrect result
2535 # if executed while an integer multiplication is in progress:
2536 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2539 # - An integer division may give an incorrect result if started in
2540 # a delay slot of a taken branch or a jump:
2541 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2543 config CPU_R4000_WORKAROUNDS
2545 select CPU_R4400_WORKAROUNDS
2547 # Work around certain R4400 CPU errata (as implemented by GCC):
2549 # - A double-word or a variable shift may give an incorrect result
2550 # if executed immediately after starting an integer division:
2551 # "MIPS R4400MC Errata, Processor Revision 1.0", erratum #10
2552 # "MIPS R4400MC Errata, Processor Revision 2.0 & 3.0", erratum #4
2553 config CPU_R4400_WORKAROUNDS
2556 config CPU_R4X00_BUGS64
2558 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2560 config MIPS_ASID_SHIFT
2562 default 6 if CPU_R3000
2565 config MIPS_ASID_BITS
2567 default 0 if MIPS_ASID_BITS_VARIABLE
2568 default 6 if CPU_R3000
2571 config MIPS_ASID_BITS_VARIABLE
2574 config MIPS_CRC_SUPPORT
2577 # R4600 erratum. Due to the lack of errata information the exact
2578 # technical details aren't known. I've experimentally found that disabling
2579 # interrupts during indexed I-cache flushes seems to be sufficient to deal
2581 config WAR_R4600_V1_INDEX_ICACHEOP
2584 # Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
2586 # 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2587 # Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2588 # executed if there is no other dcache activity. If the dcache is
2589 # accessed for another instruction immediately preceding when these
2590 # cache instructions are executing, it is possible that the dcache
2591 # tag match outputs used by these cache instructions will be
2592 # incorrect. These cache instructions should be preceded by at least
2593 # four instructions that are not any kind of load or store
2596 # This is not allowed: lw
2600 # cache Hit_Writeback_Invalidate_D
2602 # This is allowed: lw
2607 # cache Hit_Writeback_Invalidate_D
2608 config WAR_R4600_V1_HIT_CACHEOP
2611 # Writeback and invalidate the primary cache dcache before DMA.
2613 # R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2614 # Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2615 # operate correctly if the internal data cache refill buffer is empty. These
2616 # CACHE instructions should be separated from any potential data cache miss
2617 # by a load instruction to an uncached address to empty the response buffer."
2618 # (Revision 2.0 device errata from IDT available on https://www.idt.com/
2620 config WAR_R4600_V2_HIT_CACHEOP
2623 # From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2624 # the line which this instruction itself exists, the following
2625 # operation is not guaranteed."
2627 # Workaround: do two phase flushing for Index_Invalidate_I
2628 config WAR_TX49XX_ICACHE_INDEX_INV
2631 # The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2632 # opposes it being called that) where invalid instructions in the same
2633 # I-cache line worth of instructions being fetched may case spurious
2635 config WAR_ICACHE_REFILLS
2638 # On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2639 # may cause ll / sc and lld / scd sequences to execute non-atomically.
2640 config WAR_R10000_LLSC
2643 # 34K core erratum: "Problems Executing the TLBR Instruction"
2644 config WAR_MIPS34K_MISSED_ITLB
2648 # - Highmem only makes sense for the 32-bit kernel.
2649 # - The current highmem code will only work properly on physically indexed
2650 # caches such as R3000, SB1, R7000 or those that look like they're virtually
2651 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2652 # moment we protect the user and offer the highmem option only on machines
2653 # where it's known to be safe. This will not offer highmem on a few systems
2654 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2655 # indexed CPUs but we're playing safe.
2656 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2657 # know they might have memory configurations that could make use of highmem
2661 bool "High Memory Support"
2662 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2665 config CPU_SUPPORTS_HIGHMEM
2668 config SYS_SUPPORTS_HIGHMEM
2671 config SYS_SUPPORTS_SMARTMIPS
2674 config SYS_SUPPORTS_MICROMIPS
2677 config SYS_SUPPORTS_MIPS16
2680 This option must be set if a kernel might be executed on a MIPS16-
2681 enabled CPU even if MIPS16 is not actually being used. In other
2682 words, it makes the kernel MIPS16-tolerant.
2684 config CPU_SUPPORTS_MSA
2687 config ARCH_FLATMEM_ENABLE
2689 depends on !NUMA && !CPU_LOONGSON2EF
2691 config ARCH_SPARSEMEM_ENABLE
2693 select SPARSEMEM_STATIC if !SGI_IP27
2697 depends on SYS_SUPPORTS_NUMA
2699 select HAVE_SETUP_PER_CPU_AREA
2700 select NEED_PER_CPU_EMBED_FIRST_CHUNK
2702 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2703 Access). This option improves performance on systems with more
2704 than two nodes; on two node systems it is generally better to
2705 leave it disabled; on single node systems leave this option
2708 config SYS_SUPPORTS_NUMA
2712 bool "Relocatable kernel"
2713 depends on SYS_SUPPORTS_RELOCATABLE
2714 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2715 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2716 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
2717 CPU_P5600 || CAVIUM_OCTEON_SOC || \
2720 This builds a kernel image that retains relocation information
2721 so it can be loaded someplace besides the default 1MB.
2722 The relocations make the kernel binary about 15% larger,
2723 but are discarded at runtime
2725 config RELOCATION_TABLE_SIZE
2726 hex "Relocation table size"
2727 depends on RELOCATABLE
2728 range 0x0 0x01000000
2729 default "0x00200000" if CPU_LOONGSON64
2730 default "0x00100000"
2732 A table of relocation data will be appended to the kernel binary
2733 and parsed at boot to fix up the relocated kernel.
2735 This option allows the amount of space reserved for the table to be
2736 adjusted, although the default of 1Mb should be ok in most cases.
2738 The build will fail and a valid size suggested if this is too small.
2740 If unsure, leave at the default value.
2742 config RANDOMIZE_BASE
2743 bool "Randomize the address of the kernel image"
2744 depends on RELOCATABLE
2746 Randomizes the physical and virtual address at which the
2747 kernel image is loaded, as a security feature that
2748 deters exploit attempts relying on knowledge of the location
2749 of kernel internals.
2751 Entropy is generated using any coprocessor 0 registers available.
2753 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2757 config RANDOMIZE_BASE_MAX_OFFSET
2758 hex "Maximum kASLR offset" if EXPERT
2759 depends on RANDOMIZE_BASE
2760 range 0x0 0x40000000 if EVA || 64BIT
2761 range 0x0 0x08000000
2762 default "0x01000000"
2764 When kASLR is active, this provides the maximum offset that will
2765 be applied to the kernel image. It should be set according to the
2766 amount of physical RAM available in the target system minus
2767 PHYSICAL_START and must be a power of 2.
2769 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2770 EVA or 64-bit. The default is 16Mb.
2777 config HW_PERF_EVENTS
2778 bool "Enable hardware performance counter support for perf events"
2779 depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_LOONGSON64)
2782 Enable hardware performance counter support for perf events. If
2783 disabled, perf events will use software events only.
2786 bool "Enable DMI scanning"
2787 depends on MACH_LOONGSON64
2788 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2791 Enabled scanning of DMI to identify machine quirks. Say Y
2792 here unless you have verified that your setup is not
2793 affected by entries in the DMI blacklist. Required by PNP
2797 bool "Multi-Processing support"
2798 depends on SYS_SUPPORTS_SMP
2800 This enables support for systems with more than one CPU. If you have
2801 a system with only one CPU, say N. If you have a system with more
2802 than one CPU, say Y.
2804 If you say N here, the kernel will run on uni- and multiprocessor
2805 machines, but will use only one CPU of a multiprocessor machine. If
2806 you say Y here, the kernel will run on many, but not all,
2807 uniprocessor machines. On a uniprocessor machine, the kernel
2808 will run faster if you say N here.
2810 People using multiprocessor machines who say Y here should also say
2811 Y to "Enhanced Real Time Clock Support", below.
2813 See also the SMP-HOWTO available at
2814 <https://www.tldp.org/docs.html#howto>.
2816 If you don't know what to do here, say N.
2819 bool "Support for hot-pluggable CPUs"
2820 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2822 Say Y here to allow turning CPUs off and on. CPUs can be
2823 controlled through /sys/devices/system/cpu.
2824 (Note: power management support will enable this option
2825 automatically on SMP systems. )
2826 Say N if you want to disable CPU hotplug.
2831 config SYS_SUPPORTS_MIPS_CMP
2834 config SYS_SUPPORTS_MIPS_CPS
2837 config SYS_SUPPORTS_SMP
2840 config NR_CPUS_DEFAULT_4
2843 config NR_CPUS_DEFAULT_8
2846 config NR_CPUS_DEFAULT_16
2849 config NR_CPUS_DEFAULT_32
2852 config NR_CPUS_DEFAULT_64
2856 int "Maximum number of CPUs (2-256)"
2859 default "4" if NR_CPUS_DEFAULT_4
2860 default "8" if NR_CPUS_DEFAULT_8
2861 default "16" if NR_CPUS_DEFAULT_16
2862 default "32" if NR_CPUS_DEFAULT_32
2863 default "64" if NR_CPUS_DEFAULT_64
2865 This allows you to specify the maximum number of CPUs which this
2866 kernel will support. The maximum supported value is 32 for 32-bit
2867 kernel and 64 for 64-bit kernels; the minimum value which makes
2868 sense is 1 for Qemu (useful only for kernel debugging purposes)
2869 and 2 for all others.
2871 This is purely to save memory - each supported CPU adds
2872 approximately eight kilobytes to the kernel image. For best
2873 performance should round up your number of processors to the next
2876 config MIPS_PERF_SHARED_TC_COUNTERS
2879 config MIPS_NR_CPU_NR_MAP_1024
2882 config MIPS_NR_CPU_NR_MAP
2885 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2886 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2889 # Timer Interrupt Frequency Configuration
2893 prompt "Timer frequency"
2896 Allows the configuration of the timer frequency.
2899 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2902 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2905 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2908 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2911 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2914 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2917 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2920 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2924 config SYS_SUPPORTS_24HZ
2927 config SYS_SUPPORTS_48HZ
2930 config SYS_SUPPORTS_100HZ
2933 config SYS_SUPPORTS_128HZ
2936 config SYS_SUPPORTS_250HZ
2939 config SYS_SUPPORTS_256HZ
2942 config SYS_SUPPORTS_1000HZ
2945 config SYS_SUPPORTS_1024HZ
2948 config SYS_SUPPORTS_ARBIT_HZ
2950 default y if !SYS_SUPPORTS_24HZ && \
2951 !SYS_SUPPORTS_48HZ && \
2952 !SYS_SUPPORTS_100HZ && \
2953 !SYS_SUPPORTS_128HZ && \
2954 !SYS_SUPPORTS_250HZ && \
2955 !SYS_SUPPORTS_256HZ && \
2956 !SYS_SUPPORTS_1000HZ && \
2957 !SYS_SUPPORTS_1024HZ
2963 default 100 if HZ_100
2964 default 128 if HZ_128
2965 default 250 if HZ_250
2966 default 256 if HZ_256
2967 default 1000 if HZ_1000
2968 default 1024 if HZ_1024
2971 def_bool HIGH_RES_TIMERS
2974 bool "Kexec system call"
2977 kexec is a system call that implements the ability to shutdown your
2978 current kernel, and to start another kernel. It is like a reboot
2979 but it is independent of the system firmware. And like a reboot
2980 you can start any kernel with it, not just Linux.
2982 The name comes from the similarity to the exec system call.
2984 It is an ongoing process to be certain the hardware in a machine
2985 is properly shutdown, so do not be surprised if this code does not
2986 initially work for you. As of this writing the exact hardware
2987 interface is strongly in flux, so no good recommendation can be
2991 bool "Kernel crash dumps"
2993 Generate crash dump after being started by kexec.
2994 This should be normally only set in special crash dump kernels
2995 which are loaded in the main kernel with kexec-tools into
2996 a specially reserved region and then later executed after
2997 a crash by kdump/kexec. The crash dump kernel must be compiled
2998 to a memory address not used by the main kernel or firmware using
3001 config PHYSICAL_START
3002 hex "Physical address where the kernel is loaded"
3003 default "0xffffffff84000000"
3004 depends on CRASH_DUMP
3006 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
3007 If you plan to use kernel for capturing the crash dump change
3008 this value to start of the reserved region (the "X" value as
3009 specified in the "crashkernel=YM@XM" command line boot parameter
3010 passed to the panic-ed kernel).
3012 config MIPS_O32_FP64_SUPPORT
3013 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
3014 depends on 32BIT || MIPS32_O32
3016 When this is enabled, the kernel will support use of 64-bit floating
3017 point registers with binaries using the O32 ABI along with the
3018 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
3019 32-bit MIPS systems this support is at the cost of increasing the
3020 size and complexity of the compiled FPU emulator. Thus if you are
3021 running a MIPS32 system and know that none of your userland binaries
3022 will require 64-bit floating point, you may wish to reduce the size
3023 of your kernel & potentially improve FP emulation performance by
3026 Although binutils currently supports use of this flag the details
3027 concerning its effect upon the O32 ABI in userland are still being
3028 worked on. In order to avoid userland becoming dependent upon current
3029 behaviour before the details have been finalised, this option should
3030 be considered experimental and only enabled by those working upon
3038 select OF_EARLY_FLATTREE
3048 prompt "Kernel appended dtb support" if USE_OF
3049 default MIPS_NO_APPENDED_DTB
3051 config MIPS_NO_APPENDED_DTB
3054 Do not enable appended dtb support.
3056 config MIPS_ELF_APPENDED_DTB
3059 With this option, the boot code will look for a device tree binary
3060 DTB) included in the vmlinux ELF section .appended_dtb. By default
3061 it is empty and the DTB can be appended using binutils command
3064 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
3066 This is meant as a backward compatibility convenience for those
3067 systems with a bootloader that can't be upgraded to accommodate
3068 the documented boot protocol using a device tree.
3070 config MIPS_RAW_APPENDED_DTB
3071 bool "vmlinux.bin or vmlinuz.bin"
3073 With this option, the boot code will look for a device tree binary
3074 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
3075 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
3077 This is meant as a backward compatibility convenience for those
3078 systems with a bootloader that can't be upgraded to accommodate
3079 the documented boot protocol using a device tree.
3081 Beware that there is very little in terms of protection against
3082 this option being confused by leftover garbage in memory that might
3083 look like a DTB header after a reboot if no actual DTB is appended
3084 to vmlinux.bin. Do not leave this option active in a production kernel
3085 if you don't intend to always append a DTB.
3089 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
3090 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
3091 !MACH_LOONGSON64 && !MIPS_MALTA && \
3093 default MIPS_CMDLINE_FROM_BOOTLOADER
3095 config MIPS_CMDLINE_FROM_DTB
3097 bool "Dtb kernel arguments if available"
3099 config MIPS_CMDLINE_DTB_EXTEND
3101 bool "Extend dtb kernel arguments with bootloader arguments"
3103 config MIPS_CMDLINE_FROM_BOOTLOADER
3104 bool "Bootloader kernel arguments if available"
3106 config MIPS_CMDLINE_BUILTIN_EXTEND
3107 depends on CMDLINE_BOOL
3108 bool "Extend builtin kernel arguments with bootloader arguments"
3113 config LOCKDEP_SUPPORT
3117 config STACKTRACE_SUPPORT
3121 config PGTABLE_LEVELS
3123 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3124 default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48)
3127 config MIPS_AUTO_PFN_OFFSET
3130 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3132 config PCI_DRIVERS_GENERIC
3133 select PCI_DOMAINS_GENERIC if PCI
3136 config PCI_DRIVERS_LEGACY
3137 def_bool !PCI_DRIVERS_GENERIC
3138 select NO_GENERIC_PCI_IOPORT_MAP
3139 select PCI_DOMAINS if PCI
3142 # ISA support is now enabled via select. Too many systems still have the one
3143 # or other ISA chip on the board that users don't know about so don't expect
3144 # users to choose the right thing ...
3150 bool "TURBOchannel support"
3151 depends on MACH_DECSTATION
3153 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3154 processors. TURBOchannel programming specifications are available
3156 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3158 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3159 Linux driver support status is documented at:
3160 <http://www.linux-mips.org/wiki/DECstation>
3166 config ARCH_MMAP_RND_BITS_MIN
3170 config ARCH_MMAP_RND_BITS_MAX
3174 config ARCH_MMAP_RND_COMPAT_BITS_MIN
3177 config ARCH_MMAP_RND_COMPAT_BITS_MAX
3184 select MIPS_EXTERNAL_TIMER
3190 config MIPS32_COMPAT
3196 config SYSVIPC_COMPAT
3200 bool "Kernel support for o32 binaries"
3202 select ARCH_WANT_OLD_COMPAT_IPC
3204 select MIPS32_COMPAT
3205 select SYSVIPC_COMPAT if SYSVIPC
3207 Select this option if you want to run o32 binaries. These are pure
3208 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3209 existing binaries are in this format.
3214 bool "Kernel support for n32 binaries"
3216 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3218 select MIPS32_COMPAT
3219 select SYSVIPC_COMPAT if SYSVIPC
3221 Select this option if you want to run n32 binaries. These are
3222 64-bit binaries using 32-bit quantities for addressing and certain
3223 data that would normally be 64-bit. They are used in special
3228 config CC_HAS_MNO_BRANCH_LIKELY
3230 depends on $(cc-option,-mno-branch-likely)
3232 menu "Power management options"
3234 config ARCH_HIBERNATION_POSSIBLE
3236 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3238 config ARCH_SUSPEND_POSSIBLE
3240 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3242 source "kernel/power/Kconfig"
3246 config MIPS_EXTERNAL_TIMER
3249 menu "CPU Power Management"
3251 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3252 source "drivers/cpufreq/Kconfig"
3255 source "drivers/cpuidle/Kconfig"
3259 source "arch/mips/kvm/Kconfig"
3261 source "arch/mips/vdso/Kconfig"