Merge tag 'lkmm.2023.04.07a' of git://git.kernel.org/pub/scm/linux/kernel/git/paulmck...
[linux-block.git] / arch / loongarch / kernel / cpu-probe.c
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Processor capabilities determination functions.
4  *
5  * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
6  */
7 #include <linux/init.h>
8 #include <linux/kernel.h>
9 #include <linux/ptrace.h>
10 #include <linux/smp.h>
11 #include <linux/stddef.h>
12 #include <linux/export.h>
13 #include <linux/printk.h>
14 #include <linux/uaccess.h>
15
16 #include <asm/cpu-features.h>
17 #include <asm/elf.h>
18 #include <asm/fpu.h>
19 #include <asm/loongarch.h>
20 #include <asm/pgtable-bits.h>
21 #include <asm/setup.h>
22
23 /* Hardware capabilities */
24 unsigned int elf_hwcap __read_mostly;
25 EXPORT_SYMBOL_GPL(elf_hwcap);
26
27 /*
28  * Determine the FCSR mask for FPU hardware.
29  */
30 static inline void cpu_set_fpu_fcsr_mask(struct cpuinfo_loongarch *c)
31 {
32         unsigned long sr, mask, fcsr, fcsr0, fcsr1;
33
34         fcsr = c->fpu_csr0;
35         mask = FPU_CSR_ALL_X | FPU_CSR_ALL_E | FPU_CSR_ALL_S | FPU_CSR_RM;
36
37         sr = read_csr_euen();
38         enable_fpu();
39
40         fcsr0 = fcsr & mask;
41         write_fcsr(LOONGARCH_FCSR0, fcsr0);
42         fcsr0 = read_fcsr(LOONGARCH_FCSR0);
43
44         fcsr1 = fcsr | ~mask;
45         write_fcsr(LOONGARCH_FCSR0, fcsr1);
46         fcsr1 = read_fcsr(LOONGARCH_FCSR0);
47
48         write_fcsr(LOONGARCH_FCSR0, fcsr);
49
50         write_csr_euen(sr);
51
52         c->fpu_mask = ~(fcsr0 ^ fcsr1) & ~mask;
53 }
54
55 static inline void set_elf_platform(int cpu, const char *plat)
56 {
57         if (cpu == 0)
58                 __elf_platform = plat;
59 }
60
61 /* MAP BASE */
62 unsigned long vm_map_base;
63 EXPORT_SYMBOL(vm_map_base);
64
65 static void cpu_probe_addrbits(struct cpuinfo_loongarch *c)
66 {
67 #ifdef __NEED_ADDRBITS_PROBE
68         c->pabits = (read_cpucfg(LOONGARCH_CPUCFG1) & CPUCFG1_PABITS) >> 4;
69         c->vabits = (read_cpucfg(LOONGARCH_CPUCFG1) & CPUCFG1_VABITS) >> 12;
70         vm_map_base = 0UL - (1UL << c->vabits);
71 #endif
72 }
73
74 static void set_isa(struct cpuinfo_loongarch *c, unsigned int isa)
75 {
76         switch (isa) {
77         case LOONGARCH_CPU_ISA_LA64:
78                 c->isa_level |= LOONGARCH_CPU_ISA_LA64;
79                 fallthrough;
80         case LOONGARCH_CPU_ISA_LA32S:
81                 c->isa_level |= LOONGARCH_CPU_ISA_LA32S;
82                 fallthrough;
83         case LOONGARCH_CPU_ISA_LA32R:
84                 c->isa_level |= LOONGARCH_CPU_ISA_LA32R;
85                 break;
86         }
87 }
88
89 static void cpu_probe_common(struct cpuinfo_loongarch *c)
90 {
91         unsigned int config;
92         unsigned long asid_mask;
93
94         c->options = LOONGARCH_CPU_CPUCFG | LOONGARCH_CPU_CSR |
95                      LOONGARCH_CPU_TLB | LOONGARCH_CPU_VINT | LOONGARCH_CPU_WATCH;
96
97         elf_hwcap = HWCAP_LOONGARCH_CPUCFG;
98
99         config = read_cpucfg(LOONGARCH_CPUCFG1);
100         if (config & CPUCFG1_UAL) {
101                 c->options |= LOONGARCH_CPU_UAL;
102                 elf_hwcap |= HWCAP_LOONGARCH_UAL;
103         }
104         if (config & CPUCFG1_CRC32) {
105                 c->options |= LOONGARCH_CPU_CRC32;
106                 elf_hwcap |= HWCAP_LOONGARCH_CRC32;
107         }
108
109
110         config = read_cpucfg(LOONGARCH_CPUCFG2);
111         if (config & CPUCFG2_LAM) {
112                 c->options |= LOONGARCH_CPU_LAM;
113                 elf_hwcap |= HWCAP_LOONGARCH_LAM;
114         }
115         if (config & CPUCFG2_FP) {
116                 c->options |= LOONGARCH_CPU_FPU;
117                 elf_hwcap |= HWCAP_LOONGARCH_FPU;
118         }
119         if (config & CPUCFG2_COMPLEX) {
120                 c->options |= LOONGARCH_CPU_COMPLEX;
121                 elf_hwcap |= HWCAP_LOONGARCH_COMPLEX;
122         }
123         if (config & CPUCFG2_CRYPTO) {
124                 c->options |= LOONGARCH_CPU_CRYPTO;
125                 elf_hwcap |= HWCAP_LOONGARCH_CRYPTO;
126         }
127         if (config & CPUCFG2_LVZP) {
128                 c->options |= LOONGARCH_CPU_LVZ;
129                 elf_hwcap |= HWCAP_LOONGARCH_LVZ;
130         }
131
132         config = read_cpucfg(LOONGARCH_CPUCFG6);
133         if (config & CPUCFG6_PMP)
134                 c->options |= LOONGARCH_CPU_PMP;
135
136         config = iocsr_read32(LOONGARCH_IOCSR_FEATURES);
137         if (config & IOCSRF_CSRIPI)
138                 c->options |= LOONGARCH_CPU_CSRIPI;
139         if (config & IOCSRF_EXTIOI)
140                 c->options |= LOONGARCH_CPU_EXTIOI;
141         if (config & IOCSRF_FREQSCALE)
142                 c->options |= LOONGARCH_CPU_SCALEFREQ;
143         if (config & IOCSRF_FLATMODE)
144                 c->options |= LOONGARCH_CPU_FLATMODE;
145         if (config & IOCSRF_EIODECODE)
146                 c->options |= LOONGARCH_CPU_EIODECODE;
147         if (config & IOCSRF_VM)
148                 c->options |= LOONGARCH_CPU_HYPERVISOR;
149
150         config = csr_read32(LOONGARCH_CSR_ASID);
151         config = (config & CSR_ASID_BIT) >> CSR_ASID_BIT_SHIFT;
152         asid_mask = GENMASK(config - 1, 0);
153         set_cpu_asid_mask(c, asid_mask);
154
155         config = read_csr_prcfg1();
156         c->ksave_mask = GENMASK((config & CSR_CONF1_KSNUM) - 1, 0);
157         c->ksave_mask &= ~(EXC_KSAVE_MASK | PERCPU_KSAVE_MASK | KVM_KSAVE_MASK);
158
159         config = read_csr_prcfg3();
160         switch (config & CSR_CONF3_TLBTYPE) {
161         case 0:
162                 c->tlbsizemtlb = 0;
163                 c->tlbsizestlbsets = 0;
164                 c->tlbsizestlbways = 0;
165                 c->tlbsize = 0;
166                 break;
167         case 1:
168                 c->tlbsizemtlb = ((config & CSR_CONF3_MTLBSIZE) >> CSR_CONF3_MTLBSIZE_SHIFT) + 1;
169                 c->tlbsizestlbsets = 0;
170                 c->tlbsizestlbways = 0;
171                 c->tlbsize = c->tlbsizemtlb + c->tlbsizestlbsets * c->tlbsizestlbways;
172                 break;
173         case 2:
174                 c->tlbsizemtlb = ((config & CSR_CONF3_MTLBSIZE) >> CSR_CONF3_MTLBSIZE_SHIFT) + 1;
175                 c->tlbsizestlbsets = 1 << ((config & CSR_CONF3_STLBIDX) >> CSR_CONF3_STLBIDX_SHIFT);
176                 c->tlbsizestlbways = ((config & CSR_CONF3_STLBWAYS) >> CSR_CONF3_STLBWAYS_SHIFT) + 1;
177                 c->tlbsize = c->tlbsizemtlb + c->tlbsizestlbsets * c->tlbsizestlbways;
178                 break;
179         default:
180                 pr_warn("Warning: unknown TLB type\n");
181         }
182 }
183
184 #define MAX_NAME_LEN    32
185 #define VENDOR_OFFSET   0
186 #define CPUNAME_OFFSET  9
187
188 static char cpu_full_name[MAX_NAME_LEN] = "        -        ";
189
190 static inline void cpu_probe_loongson(struct cpuinfo_loongarch *c, unsigned int cpu)
191 {
192         uint64_t *vendor = (void *)(&cpu_full_name[VENDOR_OFFSET]);
193         uint64_t *cpuname = (void *)(&cpu_full_name[CPUNAME_OFFSET]);
194
195         if (!__cpu_full_name[cpu])
196                 __cpu_full_name[cpu] = cpu_full_name;
197
198         *vendor = iocsr_read64(LOONGARCH_IOCSR_VENDOR);
199         *cpuname = iocsr_read64(LOONGARCH_IOCSR_CPUNAME);
200
201         switch (c->processor_id & PRID_SERIES_MASK) {
202         case PRID_SERIES_LA132:
203                 c->cputype = CPU_LOONGSON32;
204                 set_isa(c, LOONGARCH_CPU_ISA_LA32S);
205                 __cpu_family[cpu] = "Loongson-32bit";
206                 pr_info("32-bit Loongson Processor probed (LA132 Core)\n");
207                 break;
208         case PRID_SERIES_LA264:
209                 c->cputype = CPU_LOONGSON64;
210                 set_isa(c, LOONGARCH_CPU_ISA_LA64);
211                 __cpu_family[cpu] = "Loongson-64bit";
212                 pr_info("64-bit Loongson Processor probed (LA264 Core)\n");
213                 break;
214         case PRID_SERIES_LA364:
215                 c->cputype = CPU_LOONGSON64;
216                 set_isa(c, LOONGARCH_CPU_ISA_LA64);
217                 __cpu_family[cpu] = "Loongson-64bit";
218                 pr_info("64-bit Loongson Processor probed (LA364 Core)\n");
219                 break;
220         case PRID_SERIES_LA464:
221                 c->cputype = CPU_LOONGSON64;
222                 set_isa(c, LOONGARCH_CPU_ISA_LA64);
223                 __cpu_family[cpu] = "Loongson-64bit";
224                 pr_info("64-bit Loongson Processor probed (LA464 Core)\n");
225                 break;
226         case PRID_SERIES_LA664:
227                 c->cputype = CPU_LOONGSON64;
228                 set_isa(c, LOONGARCH_CPU_ISA_LA64);
229                 __cpu_family[cpu] = "Loongson-64bit";
230                 pr_info("64-bit Loongson Processor probed (LA664 Core)\n");
231                 break;
232         default: /* Default to 64 bit */
233                 c->cputype = CPU_LOONGSON64;
234                 set_isa(c, LOONGARCH_CPU_ISA_LA64);
235                 __cpu_family[cpu] = "Loongson-64bit";
236                 pr_info("64-bit Loongson Processor probed (Unknown Core)\n");
237         }
238 }
239
240 #ifdef CONFIG_64BIT
241 /* For use by uaccess.h */
242 u64 __ua_limit;
243 EXPORT_SYMBOL(__ua_limit);
244 #endif
245
246 const char *__cpu_family[NR_CPUS];
247 const char *__cpu_full_name[NR_CPUS];
248 const char *__elf_platform;
249
250 static void cpu_report(void)
251 {
252         struct cpuinfo_loongarch *c = &current_cpu_data;
253
254         pr_info("CPU%d revision is: %08x (%s)\n",
255                 smp_processor_id(), c->processor_id, cpu_family_string());
256         if (c->options & LOONGARCH_CPU_FPU)
257                 pr_info("FPU%d revision is: %08x\n", smp_processor_id(), c->fpu_vers);
258 }
259
260 void cpu_probe(void)
261 {
262         unsigned int cpu = smp_processor_id();
263         struct cpuinfo_loongarch *c = &current_cpu_data;
264
265         /*
266          * Set a default ELF platform, cpu probe may later
267          * overwrite it with a more precise value
268          */
269         set_elf_platform(cpu, "loongarch");
270
271         c->cputype      = CPU_UNKNOWN;
272         c->processor_id = read_cpucfg(LOONGARCH_CPUCFG0);
273         c->fpu_vers     = (read_cpucfg(LOONGARCH_CPUCFG2) & CPUCFG2_FPVERS) >> 3;
274
275         c->fpu_csr0     = FPU_CSR_RN;
276         c->fpu_mask     = FPU_CSR_RSVD;
277
278         cpu_probe_common(c);
279
280         per_cpu_trap_init(cpu);
281
282         switch (c->processor_id & PRID_COMP_MASK) {
283         case PRID_COMP_LOONGSON:
284                 cpu_probe_loongson(c, cpu);
285                 break;
286         }
287
288         BUG_ON(!__cpu_family[cpu]);
289         BUG_ON(c->cputype == CPU_UNKNOWN);
290
291         cpu_probe_addrbits(c);
292
293 #ifdef CONFIG_64BIT
294         if (cpu == 0)
295                 __ua_limit = ~((1ull << cpu_vabits) - 1);
296 #endif
297
298         cpu_report();
299 }