1 # SPDX-License-Identifier: GPL-2.0
6 select ACPI_GENERIC_GSI if ACPI
7 select ACPI_MCFG if ACPI
8 select ACPI_HOTPLUG_CPU if ACPI_PROCESSOR && HOTPLUG_CPU
9 select ACPI_PPTT if ACPI
10 select ACPI_SYSTEM_POWER_STATES_SUPPORT if ACPI
11 select ARCH_BINFMT_ELF_STATE
12 select ARCH_DISABLE_KASAN_INLINE
13 select ARCH_ENABLE_MEMORY_HOTPLUG
14 select ARCH_ENABLE_MEMORY_HOTREMOVE
15 select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE
16 select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI
17 select ARCH_HAS_CPU_FINALIZE_INIT
18 select ARCH_HAS_CURRENT_STACK_POINTER
19 select ARCH_HAS_FAST_MULTIPLIER
20 select ARCH_HAS_FORTIFY_SOURCE
22 select ARCH_HAS_KERNEL_FPU_SUPPORT if CPU_HAS_FPU
23 select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS
24 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE
25 select ARCH_HAS_PTE_SPECIAL
26 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
27 select ARCH_INLINE_READ_LOCK if !PREEMPTION
28 select ARCH_INLINE_READ_LOCK_BH if !PREEMPTION
29 select ARCH_INLINE_READ_LOCK_IRQ if !PREEMPTION
30 select ARCH_INLINE_READ_LOCK_IRQSAVE if !PREEMPTION
31 select ARCH_INLINE_READ_UNLOCK if !PREEMPTION
32 select ARCH_INLINE_READ_UNLOCK_BH if !PREEMPTION
33 select ARCH_INLINE_READ_UNLOCK_IRQ if !PREEMPTION
34 select ARCH_INLINE_READ_UNLOCK_IRQRESTORE if !PREEMPTION
35 select ARCH_INLINE_WRITE_LOCK if !PREEMPTION
36 select ARCH_INLINE_WRITE_LOCK_BH if !PREEMPTION
37 select ARCH_INLINE_WRITE_LOCK_IRQ if !PREEMPTION
38 select ARCH_INLINE_WRITE_LOCK_IRQSAVE if !PREEMPTION
39 select ARCH_INLINE_WRITE_UNLOCK if !PREEMPTION
40 select ARCH_INLINE_WRITE_UNLOCK_BH if !PREEMPTION
41 select ARCH_INLINE_WRITE_UNLOCK_IRQ if !PREEMPTION
42 select ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE if !PREEMPTION
43 select ARCH_INLINE_SPIN_TRYLOCK if !PREEMPTION
44 select ARCH_INLINE_SPIN_TRYLOCK_BH if !PREEMPTION
45 select ARCH_INLINE_SPIN_LOCK if !PREEMPTION
46 select ARCH_INLINE_SPIN_LOCK_BH if !PREEMPTION
47 select ARCH_INLINE_SPIN_LOCK_IRQ if !PREEMPTION
48 select ARCH_INLINE_SPIN_LOCK_IRQSAVE if !PREEMPTION
49 select ARCH_INLINE_SPIN_UNLOCK if !PREEMPTION
50 select ARCH_INLINE_SPIN_UNLOCK_BH if !PREEMPTION
51 select ARCH_INLINE_SPIN_UNLOCK_IRQ if !PREEMPTION
52 select ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE if !PREEMPTION
53 select ARCH_KEEP_MEMBLOCK
54 select ARCH_MIGHT_HAVE_PC_PARPORT
55 select ARCH_MIGHT_HAVE_PC_SERIO
56 select ARCH_SPARSEMEM_ENABLE
58 select ARCH_SUPPORTS_ACPI
59 select ARCH_SUPPORTS_ATOMIC_RMW
60 select ARCH_SUPPORTS_HUGETLBFS
61 select ARCH_SUPPORTS_INT128 if CC_HAS_INT128
62 select ARCH_SUPPORTS_LTO_CLANG
63 select ARCH_SUPPORTS_LTO_CLANG_THIN
64 select ARCH_SUPPORTS_NUMA_BALANCING
65 select ARCH_USE_BUILTIN_BSWAP
66 select ARCH_USE_CMPXCHG_LOCKREF
67 select ARCH_USE_QUEUED_RWLOCKS
68 select ARCH_USE_QUEUED_SPINLOCKS
69 select ARCH_WANT_DEFAULT_BPF_JIT
70 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT
71 select ARCH_WANT_LD_ORPHAN_WARN
72 select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP
73 select ARCH_WANTS_NO_INSTR
74 select ARCH_WANTS_THP_SWAP if HAVE_ARCH_TRANSPARENT_HUGEPAGE
75 select BUILDTIME_TABLE_SORT
79 select GENERIC_CLOCKEVENTS
80 select GENERIC_CMOS_UPDATE
81 select GENERIC_CPU_AUTOPROBE
82 select GENERIC_CPU_DEVICES
84 select GENERIC_GETTIMEOFDAY
85 select GENERIC_IOREMAP if !ARCH_IOREMAP
86 select GENERIC_IRQ_MULTI_HANDLER
87 select GENERIC_IRQ_PROBE
88 select GENERIC_IRQ_SHOW
89 select GENERIC_LIB_ASHLDI3
90 select GENERIC_LIB_ASHRDI3
91 select GENERIC_LIB_CMPDI2
92 select GENERIC_LIB_LSHRDI3
93 select GENERIC_LIB_UCMPDI2
94 select GENERIC_LIB_DEVMEM_IS_ALLOWED
95 select GENERIC_PCI_IOMAP
96 select GENERIC_SCHED_CLOCK
97 select GENERIC_SMP_IDLE_THREAD
98 select GENERIC_TIME_VSYSCALL
99 select GENERIC_VDSO_TIME_NS
102 select HAVE_ARCH_AUDITSYSCALL
103 select HAVE_ARCH_JUMP_LABEL
104 select HAVE_ARCH_JUMP_LABEL_RELATIVE
105 select HAVE_ARCH_KASAN
106 select HAVE_ARCH_KFENCE
107 select HAVE_ARCH_KGDB if PERF_EVENTS
108 select HAVE_ARCH_MMAP_RND_BITS if MMU
109 select HAVE_ARCH_SECCOMP
110 select HAVE_ARCH_SECCOMP_FILTER
111 select HAVE_ARCH_TRACEHOOK
112 select HAVE_ARCH_TRANSPARENT_HUGEPAGE
113 select HAVE_ARCH_USERFAULTFD_MINOR if USERFAULTFD
114 select HAVE_ASM_MODVERSIONS
115 select HAVE_CONTEXT_TRACKING_USER
116 select HAVE_C_RECORDMCOUNT
117 select HAVE_DEBUG_KMEMLEAK
118 select HAVE_DEBUG_STACKOVERFLOW
119 select HAVE_DMA_CONTIGUOUS
120 select HAVE_DYNAMIC_FTRACE
121 select HAVE_DYNAMIC_FTRACE_WITH_ARGS
122 select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS
123 select HAVE_DYNAMIC_FTRACE_WITH_REGS
125 select HAVE_EFFICIENT_UNALIGNED_ACCESS if !ARCH_STRICT_ALIGN
126 select HAVE_EXIT_THREAD
128 select HAVE_FTRACE_MCOUNT_RECORD
129 select HAVE_FUNCTION_ARG_ACCESS_API
130 select HAVE_FUNCTION_ERROR_INJECTION
131 select HAVE_FUNCTION_GRAPH_RETVAL if HAVE_FUNCTION_GRAPH_TRACER
132 select HAVE_FUNCTION_GRAPH_TRACER
133 select HAVE_FUNCTION_TRACER
134 select HAVE_GCC_PLUGINS
135 select HAVE_GENERIC_VDSO
136 select HAVE_HW_BREAKPOINT if PERF_EVENTS
137 select HAVE_IOREMAP_PROT
138 select HAVE_IRQ_EXIT_ON_IRQ_STACK
139 select HAVE_IRQ_TIME_ACCOUNTING
141 select HAVE_KPROBES_ON_FTRACE
142 select HAVE_KRETPROBES
143 select HAVE_LIVEPATCH
144 select HAVE_MOD_ARCH_SPECIFIC
146 select HAVE_OBJTOOL if AS_HAS_EXPLICIT_RELOCS
148 select HAVE_PERF_EVENTS
149 select HAVE_PERF_REGS
150 select HAVE_PERF_USER_STACK_DUMP
151 select HAVE_PREEMPT_DYNAMIC_KEY
152 select HAVE_REGS_AND_STACK_ACCESS_API
153 select HAVE_RELIABLE_STACKTRACE if UNWINDER_ORC
157 select HAVE_SAMPLE_FTRACE_DIRECT
158 select HAVE_SAMPLE_FTRACE_DIRECT_MULTI
159 select HAVE_SETUP_PER_CPU_AREA if NUMA
160 select HAVE_STACK_VALIDATION if HAVE_OBJTOOL
161 select HAVE_STACKPROTECTOR
162 select HAVE_SYSCALL_TRACEPOINTS
164 select HAVE_VIRT_CPU_ACCOUNTING_GEN if !SMP
165 select IRQ_FORCED_THREADING
166 select IRQ_LOONGARCH_CPU
167 select LOCK_MM_AND_FIND_VMA
168 select MMU_GATHER_MERGE_VMAS if MMU
169 select MODULES_USE_ELF_RELA if MODULES
170 select NEED_PER_CPU_EMBED_FIRST_CHUNK
171 select NEED_PER_CPU_PAGE_FIRST_CHUNK
173 select OF_EARLY_FLATTREE
175 select PCI_DOMAINS_GENERIC
176 select PCI_ECAM if ACPI
178 select PCI_MSI_ARCH_FALLBACKS
180 select PERF_USE_VMALLOC
183 select SYSCTL_ARCH_UNALIGN_ALLOW
184 select SYSCTL_ARCH_UNALIGN_NO_WARN
185 select SYSCTL_EXCEPTION_TRACE
187 select TRACE_IRQFLAGS_SUPPORT
188 select USE_PERCPU_NUMA_NODE_ID
189 select USER_STACKTRACE_SUPPORT
202 config GENERIC_BUG_RELATIVE_POINTERS
204 depends on GENERIC_BUG
206 config GENERIC_CALIBRATE_DELAY
212 config GENERIC_HWEIGHT
215 config L1_CACHE_SHIFT
219 config LOCKDEP_SUPPORT
223 config STACKTRACE_SUPPORT
227 # MACH_LOONGSON32 and MACH_LOONGSON64 are deliberately carried over from the
228 # MIPS Loongson code, to preserve Loongson-specific code paths in drivers that
229 # are shared between architectures, and specifically expecting the symbols.
230 config MACH_LOONGSON32
233 config MACH_LOONGSON64
236 config FIX_EARLYCON_MEM
239 config PGTABLE_2LEVEL
242 config PGTABLE_3LEVEL
245 config PGTABLE_4LEVEL
248 config PGTABLE_LEVELS
250 default 2 if PGTABLE_2LEVEL
251 default 3 if PGTABLE_3LEVEL
252 default 4 if PGTABLE_4LEVEL
254 config SCHED_OMIT_FRAME_POINTER
258 config AS_HAS_EXPLICIT_RELOCS
259 def_bool $(as-instr,x:pcalau12i \$t0$(comma)%pc_hi20(x))
261 config AS_HAS_FCSR_CLASS
262 def_bool $(as-instr,movfcsr2gr \$t0$(comma)\$fcsr0)
264 config AS_HAS_LSX_EXTENSION
265 def_bool $(as-instr,vld \$vr0$(comma)\$a0$(comma)0)
267 config AS_HAS_LASX_EXTENSION
268 def_bool $(as-instr,xvld \$xr0$(comma)\$a0$(comma)0)
270 config AS_HAS_LBT_EXTENSION
271 def_bool $(as-instr,movscr2gr \$a0$(comma)\$scr0)
273 config AS_HAS_LVZ_EXTENSION
274 def_bool $(as-instr,hvcl 0)
276 menu "Kernel type and options"
278 source "kernel/Kconfig.hz"
281 prompt "Page Table Layout"
282 default 16KB_2LEVEL if 32BIT
283 default 16KB_3LEVEL if 64BIT
285 Allows choosing the page table layout, which is a combination
286 of page size and page table levels. The size of virtual memory
287 address space are determined by the page table layout.
290 bool "4KB with 3 levels"
291 select HAVE_PAGE_SIZE_4KB
292 select PGTABLE_3LEVEL
294 This option selects 4KB page size with 3 level page tables, which
295 support a maximum of 39 bits of application virtual memory.
298 bool "4KB with 4 levels"
299 select HAVE_PAGE_SIZE_4KB
300 select PGTABLE_4LEVEL
302 This option selects 4KB page size with 4 level page tables, which
303 support a maximum of 48 bits of application virtual memory.
306 bool "16KB with 2 levels"
307 select HAVE_PAGE_SIZE_16KB
308 select PGTABLE_2LEVEL
310 This option selects 16KB page size with 2 level page tables, which
311 support a maximum of 36 bits of application virtual memory.
314 bool "16KB with 3 levels"
315 select HAVE_PAGE_SIZE_16KB
316 select PGTABLE_3LEVEL
318 This option selects 16KB page size with 3 level page tables, which
319 support a maximum of 47 bits of application virtual memory.
322 bool "64KB with 2 levels"
323 select HAVE_PAGE_SIZE_64KB
324 select PGTABLE_2LEVEL
326 This option selects 64KB page size with 2 level page tables, which
327 support a maximum of 42 bits of application virtual memory.
330 bool "64KB with 3 levels"
331 select HAVE_PAGE_SIZE_64KB
332 select PGTABLE_3LEVEL
334 This option selects 64KB page size with 3 level page tables, which
335 support a maximum of 55 bits of application virtual memory.
340 string "Built-in kernel command line"
342 For most platforms, the arguments for the kernel's command line
343 are provided at run-time, during boot. However, there are cases
344 where either no arguments are being provided or the provided
345 arguments are insufficient or even invalid.
347 When that occurs, it is possible to define a built-in command
348 line here and choose how the kernel should use it later on.
351 prompt "Kernel command line type"
352 default CMDLINE_BOOTLOADER
354 Choose how the kernel will handle the provided built-in command
357 config CMDLINE_BOOTLOADER
358 bool "Use bootloader kernel arguments if available"
360 Prefer the command-line passed by the boot loader if available.
361 Use the built-in command line as fallback in case we get nothing
362 during boot. This is the default behaviour.
364 config CMDLINE_EXTEND
365 bool "Use built-in to extend bootloader kernel arguments"
367 The command-line arguments provided during boot will be
368 appended to the built-in command line. This is useful in
369 cases where the provided arguments are insufficient and
370 you don't want to or cannot modify them.
373 bool "Always use the built-in kernel command string"
375 Always use the built-in command line, even if we get one during
376 boot. This is useful in case you need to override the provided
377 command line on systems where you don't have or want control
383 bool "Enable built-in dtb in kernel"
386 Some existing systems do not provide a canonical device tree to
387 the kernel at boot time. Let's provide a device tree table in the
388 kernel, keyed by the dts filename, containing the relevant DTBs.
390 Built-in DTBs are generic enough and can be used as references.
392 config BUILTIN_DTB_NAME
393 string "Source file for built-in dtb"
394 depends on BUILTIN_DTB
396 Base name (without suffix, relative to arch/loongarch/boot/dts/)
397 for the DTS file that will be used to produce the DTB linked into
401 bool "Enable DMI scanning"
402 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
405 This enables SMBIOS/DMI feature for systems, and scanning of
406 DMI to identify machine quirks.
409 bool "EFI runtime service support"
411 select EFI_RUNTIME_WRAPPERS
413 This enables the kernel to use EFI runtime services that are
414 available (such as the EFI variable services).
417 bool "EFI boot stub support"
420 select EFI_GENERIC_STUB
422 This kernel feature allows the kernel to be loaded directly by
423 EFI firmware without the use of a bootloader.
426 bool "SMT scheduler support"
430 Improves scheduler's performance when there are multiple
431 threads in one physical core.
434 bool "Multi-Processing support"
436 This enables support for systems with more than one CPU. If you have
437 a system with only one CPU, say N. If you have a system with more
440 If you say N here, the kernel will run on uni- and multiprocessor
441 machines, but will use only one CPU of a multiprocessor machine. If
442 you say Y here, the kernel will run on many, but not all,
443 uniprocessor machines. On a uniprocessor machine, the kernel
444 will run faster if you say N here.
446 See also the SMP-HOWTO available at <http://www.tldp.org/docs.html#howto>.
448 If you don't know what to do here, say N.
451 bool "Support for hot-pluggable CPUs"
453 select GENERIC_IRQ_MIGRATION
455 Say Y here to allow turning CPUs off and on. CPUs can be
456 controlled through /sys/devices/system/cpu.
457 (Note: power management support will enable this option
458 automatically on SMP systems. )
459 Say N if you want to disable CPU hotplug.
462 int "Maximum number of CPUs (2-256)"
467 This allows you to specify the maximum number of CPUs which this
473 select ACPI_NUMA if ACPI
475 Say Y to compile the kernel with NUMA (Non-Uniform Memory Access)
476 support. This option improves performance on systems with more
477 than one NUMA node; on single node systems it is generally better
478 to leave it disabled.
485 config ARCH_FORCE_MAX_ORDER
486 int "Maximum zone order"
487 default "13" if PAGE_SIZE_64KB
488 default "11" if PAGE_SIZE_16KB
491 The kernel memory allocator divides physically contiguous memory
492 blocks into "zones", where each zone is a power of two number of
493 pages. This option selects the largest power of two that the kernel
494 keeps in the memory allocator. If you need to allocate very large
495 blocks of physically contiguous memory, then you may need to
498 The page size is not necessarily 4KB. Keep this in mind
499 when choosing a value for this option.
502 bool "Enable LoongArch DMW-based ioremap()"
504 We use generic TLB-based ioremap() by default since it has page
505 protection support. However, you can enable LoongArch DMW-based
506 ioremap() for better performance.
508 config ARCH_WRITECOMBINE
509 bool "Enable WriteCombine (WUC) for ioremap()"
511 LoongArch maintains cache coherency in hardware, but when paired
512 with LS7A chipsets the WUC attribute (Weak-ordered UnCached, which
513 is similar to WriteCombine) is out of the scope of cache coherency
514 machanism for PCIe devices (this is a PCIe protocol violation, which
515 may be fixed in newer chipsets).
517 This means WUC can only used for write-only memory regions now, so
518 this option is disabled by default, making WUC silently fallback to
519 SUC for ioremap(). You can enable this option if the kernel is ensured
520 to run on hardware without this bug.
522 You can override this setting via writecombine=on/off boot parameter.
524 config ARCH_STRICT_ALIGN
525 bool "Enable -mstrict-align to prevent unaligned accesses" if EXPERT
528 Not all LoongArch cores support h/w unaligned access, we can use
529 -mstrict-align build parameter to prevent unaligned accesses.
531 CPUs with h/w unaligned access support:
532 Loongson-2K2000/2K3000/3A5000/3C5000/3D5000.
534 CPUs without h/w unaligned access support:
535 Loongson-2K500/2K1000.
537 This option is enabled by default to make the kernel be able to run
538 on all LoongArch systems. But you can disable it manually if you want
539 to run kernel only on systems with h/w unaligned access support in
540 order to optimise for performance.
547 bool "Support for the Loongson SIMD Extension"
548 depends on AS_HAS_LSX_EXTENSION
550 Loongson SIMD Extension (LSX) introduces 128 bit wide vector registers
551 and a set of SIMD instructions to operate on them. When this option
552 is enabled the kernel will support allocating & switching LSX
553 vector register contexts. If you know that your kernel will only be
554 running on CPUs which do not support LSX or that your userland will
555 not be making use of it then you may wish to say N here to reduce
556 the size & complexity of your kernel.
561 bool "Support for the Loongson Advanced SIMD Extension"
562 depends on CPU_HAS_LSX
563 depends on AS_HAS_LASX_EXTENSION
565 Loongson Advanced SIMD Extension (LASX) introduces 256 bit wide vector
566 registers and a set of SIMD instructions to operate on them. When this
567 option is enabled the kernel will support allocating & switching LASX
568 vector register contexts. If you know that your kernel will only be
569 running on CPUs which do not support LASX or that your userland will
570 not be making use of it then you may wish to say N here to reduce
571 the size & complexity of your kernel.
576 bool "Support for the Loongson Binary Translation Extension"
577 depends on AS_HAS_LBT_EXTENSION
579 Loongson Binary Translation (LBT) introduces 4 scratch registers (SCR0
580 to SCR3), x86/ARM eflags (eflags) and x87 fpu stack pointer (ftop).
581 Enabling this option allows the kernel to allocate and switch registers
584 If you want to use this feature, such as the Loongson Architecture
585 Translator (LAT), say Y.
587 config CPU_HAS_PREFETCH
591 config ARCH_SUPPORTS_KEXEC
594 config ARCH_SUPPORTS_CRASH_DUMP
597 config ARCH_SELECTS_CRASH_DUMP
599 depends on CRASH_DUMP
602 config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION
603 def_bool CRASH_RESERVE
606 bool "Relocatable kernel"
608 This builds the kernel as a Position Independent Executable (PIE),
609 which retains all relocation metadata required, so as to relocate
610 the kernel binary at runtime to a different virtual address from
613 config RANDOMIZE_BASE
614 bool "Randomize the address of the kernel (KASLR)"
615 depends on RELOCATABLE
617 Randomizes the physical and virtual address at which the
618 kernel image is loaded, as a security feature that
619 deters exploit attempts relying on knowledge of the location
622 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
626 config RANDOMIZE_BASE_MAX_OFFSET
627 hex "Maximum KASLR offset" if EXPERT
628 depends on RANDOMIZE_BASE
632 When KASLR is active, this provides the maximum offset that will
633 be applied to the kernel image. It should be set according to the
634 amount of physical RAM available in the target system.
636 This is limited by the size of the lower address memory, 256MB.
638 source "kernel/livepatch/Kconfig"
641 bool "Enable paravirtualization code"
642 depends on AS_HAS_LVZ_EXTENSION
644 This changes the kernel so it can modify itself when it is run
645 under a hypervisor, potentially improving performance significantly
646 over full virtualization. However, when run without a hypervisor
647 the kernel is theoretically slower and slightly larger.
651 config ARCH_SELECT_MEMORY_MODEL
654 config ARCH_FLATMEM_ENABLE
658 config ARCH_SPARSEMEM_ENABLE
660 select SPARSEMEM_VMEMMAP_ENABLE
662 Say Y to support efficient handling of sparse physical memory,
663 for architectures which are either NUMA (Non-Uniform Memory Access)
664 or have huge holes in the physical address space for other reasons.
665 See <file:Documentation/mm/numa.rst> for more.
667 config ARCH_MEMORY_PROBE
669 depends on MEMORY_HOTPLUG
675 config ARCH_MMAP_RND_BITS_MIN
678 config ARCH_MMAP_RND_BITS_MAX
681 config ARCH_SUPPORTS_UPROBES
684 config KASAN_SHADOW_OFFSET
689 menu "Power management options"
691 config ARCH_SUSPEND_POSSIBLE
694 config ARCH_HIBERNATION_POSSIBLE
697 source "kernel/power/Kconfig"
698 source "drivers/acpi/Kconfig"
702 source "arch/loongarch/kvm/Kconfig"