1 # SPDX-License-Identifier: GPL-2.0
6 select ACPI_GENERIC_GSI if ACPI
7 select ACPI_MCFG if ACPI
8 select ACPI_HOTPLUG_CPU if ACPI_PROCESSOR && HOTPLUG_CPU
9 select ACPI_PPTT if ACPI
10 select ACPI_SYSTEM_POWER_STATES_SUPPORT if ACPI
11 select ARCH_BINFMT_ELF_STATE
12 select ARCH_DISABLE_KASAN_INLINE
13 select ARCH_ENABLE_MEMORY_HOTPLUG
14 select ARCH_ENABLE_MEMORY_HOTREMOVE
15 select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE
16 select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI
17 select ARCH_HAS_CPU_FINALIZE_INIT
18 select ARCH_HAS_CURRENT_STACK_POINTER
19 select ARCH_HAS_FORTIFY_SOURCE
21 select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS
22 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE
23 select ARCH_HAS_PTE_SPECIAL
24 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
25 select ARCH_INLINE_READ_LOCK if !PREEMPTION
26 select ARCH_INLINE_READ_LOCK_BH if !PREEMPTION
27 select ARCH_INLINE_READ_LOCK_IRQ if !PREEMPTION
28 select ARCH_INLINE_READ_LOCK_IRQSAVE if !PREEMPTION
29 select ARCH_INLINE_READ_UNLOCK if !PREEMPTION
30 select ARCH_INLINE_READ_UNLOCK_BH if !PREEMPTION
31 select ARCH_INLINE_READ_UNLOCK_IRQ if !PREEMPTION
32 select ARCH_INLINE_READ_UNLOCK_IRQRESTORE if !PREEMPTION
33 select ARCH_INLINE_WRITE_LOCK if !PREEMPTION
34 select ARCH_INLINE_WRITE_LOCK_BH if !PREEMPTION
35 select ARCH_INLINE_WRITE_LOCK_IRQ if !PREEMPTION
36 select ARCH_INLINE_WRITE_LOCK_IRQSAVE if !PREEMPTION
37 select ARCH_INLINE_WRITE_UNLOCK if !PREEMPTION
38 select ARCH_INLINE_WRITE_UNLOCK_BH if !PREEMPTION
39 select ARCH_INLINE_WRITE_UNLOCK_IRQ if !PREEMPTION
40 select ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE if !PREEMPTION
41 select ARCH_INLINE_SPIN_TRYLOCK if !PREEMPTION
42 select ARCH_INLINE_SPIN_TRYLOCK_BH if !PREEMPTION
43 select ARCH_INLINE_SPIN_LOCK if !PREEMPTION
44 select ARCH_INLINE_SPIN_LOCK_BH if !PREEMPTION
45 select ARCH_INLINE_SPIN_LOCK_IRQ if !PREEMPTION
46 select ARCH_INLINE_SPIN_LOCK_IRQSAVE if !PREEMPTION
47 select ARCH_INLINE_SPIN_UNLOCK if !PREEMPTION
48 select ARCH_INLINE_SPIN_UNLOCK_BH if !PREEMPTION
49 select ARCH_INLINE_SPIN_UNLOCK_IRQ if !PREEMPTION
50 select ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE if !PREEMPTION
51 select ARCH_KEEP_MEMBLOCK
52 select ARCH_MIGHT_HAVE_PC_PARPORT
53 select ARCH_MIGHT_HAVE_PC_SERIO
54 select ARCH_SPARSEMEM_ENABLE
56 select ARCH_SUPPORTS_ACPI
57 select ARCH_SUPPORTS_ATOMIC_RMW
58 select ARCH_SUPPORTS_HUGETLBFS
59 select ARCH_SUPPORTS_LTO_CLANG
60 select ARCH_SUPPORTS_LTO_CLANG_THIN
61 select ARCH_SUPPORTS_NUMA_BALANCING
62 select ARCH_USE_BUILTIN_BSWAP
63 select ARCH_USE_CMPXCHG_LOCKREF
64 select ARCH_USE_QUEUED_RWLOCKS
65 select ARCH_USE_QUEUED_SPINLOCKS
66 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT
67 select ARCH_WANT_LD_ORPHAN_WARN
68 select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP
69 select ARCH_WANTS_NO_INSTR
70 select BUILDTIME_TABLE_SORT
74 select GENERIC_CLOCKEVENTS
75 select GENERIC_CMOS_UPDATE
76 select GENERIC_CPU_AUTOPROBE
77 select GENERIC_CPU_DEVICES
79 select GENERIC_GETTIMEOFDAY
80 select GENERIC_IOREMAP if !ARCH_IOREMAP
81 select GENERIC_IRQ_MULTI_HANDLER
82 select GENERIC_IRQ_PROBE
83 select GENERIC_IRQ_SHOW
84 select GENERIC_LIB_ASHLDI3
85 select GENERIC_LIB_ASHRDI3
86 select GENERIC_LIB_CMPDI2
87 select GENERIC_LIB_LSHRDI3
88 select GENERIC_LIB_UCMPDI2
89 select GENERIC_LIB_DEVMEM_IS_ALLOWED
90 select GENERIC_PCI_IOMAP
91 select GENERIC_SCHED_CLOCK
92 select GENERIC_SMP_IDLE_THREAD
93 select GENERIC_TIME_VSYSCALL
94 select GENERIC_VDSO_TIME_NS
97 select HAVE_ARCH_AUDITSYSCALL
98 select HAVE_ARCH_JUMP_LABEL
99 select HAVE_ARCH_JUMP_LABEL_RELATIVE
100 select HAVE_ARCH_KASAN
101 select HAVE_ARCH_KFENCE
102 select HAVE_ARCH_KGDB if PERF_EVENTS
103 select HAVE_ARCH_MMAP_RND_BITS if MMU
104 select HAVE_ARCH_SECCOMP
105 select HAVE_ARCH_SECCOMP_FILTER
106 select HAVE_ARCH_TRACEHOOK
107 select HAVE_ARCH_TRANSPARENT_HUGEPAGE
108 select HAVE_ARCH_USERFAULTFD_MINOR if USERFAULTFD
109 select HAVE_ASM_MODVERSIONS
110 select HAVE_CONTEXT_TRACKING_USER
111 select HAVE_C_RECORDMCOUNT
112 select HAVE_DEBUG_KMEMLEAK
113 select HAVE_DEBUG_STACKOVERFLOW
114 select HAVE_DMA_CONTIGUOUS
115 select HAVE_DYNAMIC_FTRACE
116 select HAVE_DYNAMIC_FTRACE_WITH_ARGS
117 select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS
118 select HAVE_DYNAMIC_FTRACE_WITH_REGS
120 select HAVE_EFFICIENT_UNALIGNED_ACCESS if !ARCH_STRICT_ALIGN
121 select HAVE_EXIT_THREAD
123 select HAVE_FTRACE_MCOUNT_RECORD
124 select HAVE_FUNCTION_ARG_ACCESS_API
125 select HAVE_FUNCTION_ERROR_INJECTION
126 select HAVE_FUNCTION_GRAPH_RETVAL if HAVE_FUNCTION_GRAPH_TRACER
127 select HAVE_FUNCTION_GRAPH_TRACER
128 select HAVE_FUNCTION_TRACER
129 select HAVE_GCC_PLUGINS
130 select HAVE_GENERIC_VDSO
131 select HAVE_HW_BREAKPOINT if PERF_EVENTS
132 select HAVE_IOREMAP_PROT
133 select HAVE_IRQ_EXIT_ON_IRQ_STACK
134 select HAVE_IRQ_TIME_ACCOUNTING
136 select HAVE_KPROBES_ON_FTRACE
137 select HAVE_KRETPROBES
138 select HAVE_LIVEPATCH
139 select HAVE_MOD_ARCH_SPECIFIC
141 select HAVE_OBJTOOL if AS_HAS_EXPLICIT_RELOCS
143 select HAVE_PERF_EVENTS
144 select HAVE_PERF_REGS
145 select HAVE_PERF_USER_STACK_DUMP
146 select HAVE_PREEMPT_DYNAMIC_KEY
147 select HAVE_REGS_AND_STACK_ACCESS_API
148 select HAVE_RELIABLE_STACKTRACE if UNWINDER_ORC
152 select HAVE_SAMPLE_FTRACE_DIRECT
153 select HAVE_SAMPLE_FTRACE_DIRECT_MULTI
154 select HAVE_SETUP_PER_CPU_AREA if NUMA
155 select HAVE_STACK_VALIDATION if HAVE_OBJTOOL
156 select HAVE_STACKPROTECTOR
157 select HAVE_SYSCALL_TRACEPOINTS
159 select HAVE_VIRT_CPU_ACCOUNTING_GEN if !SMP
160 select IRQ_FORCED_THREADING
161 select IRQ_LOONGARCH_CPU
162 select LOCK_MM_AND_FIND_VMA
163 select MMU_GATHER_MERGE_VMAS if MMU
164 select MODULES_USE_ELF_RELA if MODULES
165 select NEED_PER_CPU_EMBED_FIRST_CHUNK
166 select NEED_PER_CPU_PAGE_FIRST_CHUNK
168 select OF_EARLY_FLATTREE
170 select PCI_DOMAINS_GENERIC
171 select PCI_ECAM if ACPI
173 select PCI_MSI_ARCH_FALLBACKS
175 select PERF_USE_VMALLOC
179 select SYSCTL_ARCH_UNALIGN_ALLOW
180 select SYSCTL_ARCH_UNALIGN_NO_WARN
181 select SYSCTL_EXCEPTION_TRACE
183 select TRACE_IRQFLAGS_SUPPORT
184 select USE_PERCPU_NUMA_NODE_ID
185 select USER_STACKTRACE_SUPPORT
198 config GENERIC_BUG_RELATIVE_POINTERS
200 depends on GENERIC_BUG
202 config GENERIC_CALIBRATE_DELAY
208 config GENERIC_HWEIGHT
211 config L1_CACHE_SHIFT
215 config LOCKDEP_SUPPORT
219 config STACKTRACE_SUPPORT
223 # MACH_LOONGSON32 and MACH_LOONGSON64 are deliberately carried over from the
224 # MIPS Loongson code, to preserve Loongson-specific code paths in drivers that
225 # are shared between architectures, and specifically expecting the symbols.
226 config MACH_LOONGSON32
229 config MACH_LOONGSON64
232 config FIX_EARLYCON_MEM
235 config PGTABLE_2LEVEL
238 config PGTABLE_3LEVEL
241 config PGTABLE_4LEVEL
244 config PGTABLE_LEVELS
246 default 2 if PGTABLE_2LEVEL
247 default 3 if PGTABLE_3LEVEL
248 default 4 if PGTABLE_4LEVEL
250 config SCHED_OMIT_FRAME_POINTER
254 config AS_HAS_EXPLICIT_RELOCS
255 def_bool $(as-instr,x:pcalau12i \$t0$(comma)%pc_hi20(x))
257 config AS_HAS_FCSR_CLASS
258 def_bool $(as-instr,movfcsr2gr \$t0$(comma)\$fcsr0)
260 config AS_HAS_LSX_EXTENSION
261 def_bool $(as-instr,vld \$vr0$(comma)\$a0$(comma)0)
263 config AS_HAS_LASX_EXTENSION
264 def_bool $(as-instr,xvld \$xr0$(comma)\$a0$(comma)0)
266 config AS_HAS_LBT_EXTENSION
267 def_bool $(as-instr,movscr2gr \$a0$(comma)\$scr0)
269 config AS_HAS_LVZ_EXTENSION
270 def_bool $(as-instr,hvcl 0)
272 menu "Kernel type and options"
274 source "kernel/Kconfig.hz"
277 prompt "Page Table Layout"
278 default 16KB_2LEVEL if 32BIT
279 default 16KB_3LEVEL if 64BIT
281 Allows choosing the page table layout, which is a combination
282 of page size and page table levels. The size of virtual memory
283 address space are determined by the page table layout.
286 bool "4KB with 3 levels"
287 select HAVE_PAGE_SIZE_4KB
288 select PGTABLE_3LEVEL
290 This option selects 4KB page size with 3 level page tables, which
291 support a maximum of 39 bits of application virtual memory.
294 bool "4KB with 4 levels"
295 select HAVE_PAGE_SIZE_4KB
296 select PGTABLE_4LEVEL
298 This option selects 4KB page size with 4 level page tables, which
299 support a maximum of 48 bits of application virtual memory.
302 bool "16KB with 2 levels"
303 select HAVE_PAGE_SIZE_16KB
304 select PGTABLE_2LEVEL
306 This option selects 16KB page size with 2 level page tables, which
307 support a maximum of 36 bits of application virtual memory.
310 bool "16KB with 3 levels"
311 select HAVE_PAGE_SIZE_16KB
312 select PGTABLE_3LEVEL
314 This option selects 16KB page size with 3 level page tables, which
315 support a maximum of 47 bits of application virtual memory.
318 bool "64KB with 2 levels"
319 select HAVE_PAGE_SIZE_64KB
320 select PGTABLE_2LEVEL
322 This option selects 64KB page size with 2 level page tables, which
323 support a maximum of 42 bits of application virtual memory.
326 bool "64KB with 3 levels"
327 select HAVE_PAGE_SIZE_64KB
328 select PGTABLE_3LEVEL
330 This option selects 64KB page size with 3 level page tables, which
331 support a maximum of 55 bits of application virtual memory.
336 string "Built-in kernel command line"
338 For most platforms, the arguments for the kernel's command line
339 are provided at run-time, during boot. However, there are cases
340 where either no arguments are being provided or the provided
341 arguments are insufficient or even invalid.
343 When that occurs, it is possible to define a built-in command
344 line here and choose how the kernel should use it later on.
347 prompt "Kernel command line type"
348 default CMDLINE_BOOTLOADER
350 Choose how the kernel will handle the provided built-in command
353 config CMDLINE_BOOTLOADER
354 bool "Use bootloader kernel arguments if available"
356 Prefer the command-line passed by the boot loader if available.
357 Use the built-in command line as fallback in case we get nothing
358 during boot. This is the default behaviour.
360 config CMDLINE_EXTEND
361 bool "Use built-in to extend bootloader kernel arguments"
363 The command-line arguments provided during boot will be
364 appended to the built-in command line. This is useful in
365 cases where the provided arguments are insufficient and
366 you don't want to or cannot modify them.
369 bool "Always use the built-in kernel command string"
371 Always use the built-in command line, even if we get one during
372 boot. This is useful in case you need to override the provided
373 command line on systems where you don't have or want control
379 bool "Enable built-in dtb in kernel"
382 Some existing systems do not provide a canonical device tree to
383 the kernel at boot time. Let's provide a device tree table in the
384 kernel, keyed by the dts filename, containing the relevant DTBs.
386 Built-in DTBs are generic enough and can be used as references.
388 config BUILTIN_DTB_NAME
389 string "Source file for built-in dtb"
390 depends on BUILTIN_DTB
392 Base name (without suffix, relative to arch/loongarch/boot/dts/)
393 for the DTS file that will be used to produce the DTB linked into
397 bool "Enable DMI scanning"
398 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
401 This enables SMBIOS/DMI feature for systems, and scanning of
402 DMI to identify machine quirks.
405 bool "EFI runtime service support"
407 select EFI_RUNTIME_WRAPPERS
409 This enables the kernel to use EFI runtime services that are
410 available (such as the EFI variable services).
413 bool "EFI boot stub support"
416 select EFI_GENERIC_STUB
418 This kernel feature allows the kernel to be loaded directly by
419 EFI firmware without the use of a bootloader.
422 bool "SMT scheduler support"
425 Improves scheduler's performance when there are multiple
426 threads in one physical core.
429 bool "Multi-Processing support"
431 This enables support for systems with more than one CPU. If you have
432 a system with only one CPU, say N. If you have a system with more
435 If you say N here, the kernel will run on uni- and multiprocessor
436 machines, but will use only one CPU of a multiprocessor machine. If
437 you say Y here, the kernel will run on many, but not all,
438 uniprocessor machines. On a uniprocessor machine, the kernel
439 will run faster if you say N here.
441 See also the SMP-HOWTO available at <http://www.tldp.org/docs.html#howto>.
443 If you don't know what to do here, say N.
446 bool "Support for hot-pluggable CPUs"
448 select GENERIC_IRQ_MIGRATION
450 Say Y here to allow turning CPUs off and on. CPUs can be
451 controlled through /sys/devices/system/cpu.
452 (Note: power management support will enable this option
453 automatically on SMP systems. )
454 Say N if you want to disable CPU hotplug.
457 int "Maximum number of CPUs (2-256)"
462 This allows you to specify the maximum number of CPUs which this
468 select ACPI_NUMA if ACPI
470 Say Y to compile the kernel with NUMA (Non-Uniform Memory Access)
471 support. This option improves performance on systems with more
472 than one NUMA node; on single node systems it is generally better
473 to leave it disabled.
480 config ARCH_FORCE_MAX_ORDER
481 int "Maximum zone order"
482 default "13" if PAGE_SIZE_64KB
483 default "11" if PAGE_SIZE_16KB
486 The kernel memory allocator divides physically contiguous memory
487 blocks into "zones", where each zone is a power of two number of
488 pages. This option selects the largest power of two that the kernel
489 keeps in the memory allocator. If you need to allocate very large
490 blocks of physically contiguous memory, then you may need to
493 The page size is not necessarily 4KB. Keep this in mind
494 when choosing a value for this option.
497 bool "Enable LoongArch DMW-based ioremap()"
499 We use generic TLB-based ioremap() by default since it has page
500 protection support. However, you can enable LoongArch DMW-based
501 ioremap() for better performance.
503 config ARCH_WRITECOMBINE
504 bool "Enable WriteCombine (WUC) for ioremap()"
506 LoongArch maintains cache coherency in hardware, but when paired
507 with LS7A chipsets the WUC attribute (Weak-ordered UnCached, which
508 is similar to WriteCombine) is out of the scope of cache coherency
509 machanism for PCIe devices (this is a PCIe protocol violation, which
510 may be fixed in newer chipsets).
512 This means WUC can only used for write-only memory regions now, so
513 this option is disabled by default, making WUC silently fallback to
514 SUC for ioremap(). You can enable this option if the kernel is ensured
515 to run on hardware without this bug.
517 You can override this setting via writecombine=on/off boot parameter.
519 config ARCH_STRICT_ALIGN
520 bool "Enable -mstrict-align to prevent unaligned accesses" if EXPERT
523 Not all LoongArch cores support h/w unaligned access, we can use
524 -mstrict-align build parameter to prevent unaligned accesses.
526 CPUs with h/w unaligned access support:
527 Loongson-2K2000/2K3000/3A5000/3C5000/3D5000.
529 CPUs without h/w unaligned access support:
530 Loongson-2K500/2K1000.
532 This option is enabled by default to make the kernel be able to run
533 on all LoongArch systems. But you can disable it manually if you want
534 to run kernel only on systems with h/w unaligned access support in
535 order to optimise for performance.
542 bool "Support for the Loongson SIMD Extension"
543 depends on AS_HAS_LSX_EXTENSION
545 Loongson SIMD Extension (LSX) introduces 128 bit wide vector registers
546 and a set of SIMD instructions to operate on them. When this option
547 is enabled the kernel will support allocating & switching LSX
548 vector register contexts. If you know that your kernel will only be
549 running on CPUs which do not support LSX or that your userland will
550 not be making use of it then you may wish to say N here to reduce
551 the size & complexity of your kernel.
556 bool "Support for the Loongson Advanced SIMD Extension"
557 depends on CPU_HAS_LSX
558 depends on AS_HAS_LASX_EXTENSION
560 Loongson Advanced SIMD Extension (LASX) introduces 256 bit wide vector
561 registers and a set of SIMD instructions to operate on them. When this
562 option is enabled the kernel will support allocating & switching LASX
563 vector register contexts. If you know that your kernel will only be
564 running on CPUs which do not support LASX or that your userland will
565 not be making use of it then you may wish to say N here to reduce
566 the size & complexity of your kernel.
571 bool "Support for the Loongson Binary Translation Extension"
572 depends on AS_HAS_LBT_EXTENSION
574 Loongson Binary Translation (LBT) introduces 4 scratch registers (SCR0
575 to SCR3), x86/ARM eflags (eflags) and x87 fpu stack pointer (ftop).
576 Enabling this option allows the kernel to allocate and switch registers
579 If you want to use this feature, such as the Loongson Architecture
580 Translator (LAT), say Y.
582 config CPU_HAS_PREFETCH
586 config ARCH_SUPPORTS_KEXEC
589 config ARCH_SUPPORTS_CRASH_DUMP
592 config ARCH_SELECTS_CRASH_DUMP
594 depends on CRASH_DUMP
597 config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION
598 def_bool CRASH_RESERVE
601 bool "Relocatable kernel"
603 This builds the kernel as a Position Independent Executable (PIE),
604 which retains all relocation metadata required, so as to relocate
605 the kernel binary at runtime to a different virtual address from
608 config RANDOMIZE_BASE
609 bool "Randomize the address of the kernel (KASLR)"
610 depends on RELOCATABLE
612 Randomizes the physical and virtual address at which the
613 kernel image is loaded, as a security feature that
614 deters exploit attempts relying on knowledge of the location
617 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
621 config RANDOMIZE_BASE_MAX_OFFSET
622 hex "Maximum KASLR offset" if EXPERT
623 depends on RANDOMIZE_BASE
627 When KASLR is active, this provides the maximum offset that will
628 be applied to the kernel image. It should be set according to the
629 amount of physical RAM available in the target system.
631 This is limited by the size of the lower address memory, 256MB.
633 source "kernel/livepatch/Kconfig"
636 bool "Enable paravirtualization code"
637 depends on AS_HAS_LVZ_EXTENSION
639 This changes the kernel so it can modify itself when it is run
640 under a hypervisor, potentially improving performance significantly
641 over full virtualization. However, when run without a hypervisor
642 the kernel is theoretically slower and slightly larger.
646 config ARCH_SELECT_MEMORY_MODEL
649 config ARCH_FLATMEM_ENABLE
653 config ARCH_SPARSEMEM_ENABLE
655 select SPARSEMEM_VMEMMAP_ENABLE
657 Say Y to support efficient handling of sparse physical memory,
658 for architectures which are either NUMA (Non-Uniform Memory Access)
659 or have huge holes in the physical address space for other reasons.
660 See <file:Documentation/mm/numa.rst> for more.
662 config ARCH_MEMORY_PROBE
664 depends on MEMORY_HOTPLUG
670 config ARCH_MMAP_RND_BITS_MIN
673 config ARCH_MMAP_RND_BITS_MAX
676 config ARCH_SUPPORTS_UPROBES
679 config KASAN_SHADOW_OFFSET
684 menu "Power management options"
686 config ARCH_SUSPEND_POSSIBLE
689 config ARCH_HIBERNATION_POSSIBLE
692 source "kernel/power/Kconfig"
693 source "drivers/acpi/Kconfig"
697 source "arch/loongarch/kvm/Kconfig"