5 * The later H8SX models have a 32x32-bit multiply, but the H8/300H
6 * and H8S have only 16x16->32. Since it's tolerably compact, this is
7 * basically an inlined version of the __mulsi3 code. Since the inputs
8 * are not expected to be small, it's also simplfied by skipping the
11 * (Since neither CPU has any multi-bit shift instructions, a
12 * shift-and-add version is a non-starter.)
14 * TODO: come up with an arch-specific version of the hashing in fs/namei.c,
15 * since that is heavily dependent on rotates. Which, as mentioned, suck
19 #if defined(CONFIG_CPU_H300H) || defined(CONFIG_CPU_H8S)
21 #define HAVE_ARCH__HASH_32 1
24 * Multiply by k = 0x61C88647. Fitting this into three registers requires
25 * one extra instruction, but reducing register pressure will probably
26 * make that back and then some.
28 * GCC asm note: %e1 is the high half of operand %1, while %f1 is the
29 * low half. So if %1 is er4, then %e1 is e4 and %f1 is r4.
31 * This has been designed to modify x in place, since that's the most
32 * common usage, but preserve k, since hash_64() makes two calls in
35 static inline u32 __attribute_const__ __hash_32(u32 x)
40 "\n mulxu.w %f2,%0" /* klow * xhigh */
41 "\n mov.w %f0,%e1" /* The extra instruction */
43 "\n mulxu.w %e2,%0" /* khigh * xlow */
45 "\n mulxu.w %f2,%1" /* klow * xlow */
47 : "=&r" (temp), "=r" (x)
48 : "%r" (GOLDEN_RATIO_32), "1" (x));
53 #endif /* _ASM_HASH_H */