1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __iop_scrc_out_defs_asm_h
3 #define __iop_scrc_out_defs_asm_h
6 * This file is autogenerated from
7 * file: ../../inst/io_proc/rtl/iop_scrc_out.r
8 * id: iop_scrc_out.r,v 1.11 2005/02/16 09:13:38 niklaspa Exp
9 * last modfied: Mon Apr 11 16:08:46 2005
11 * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_scrc_out_defs_asm.h ../../inst/io_proc/rtl/iop_scrc_out.r
12 * id: $Id: iop_scrc_out_defs_asm.h,v 1.5 2005/04/24 18:31:06 starvik Exp $
13 * Any changes here will be lost.
15 * -*- buffer-read-only: t -*-
19 #define REG_FIELD( scope, reg, field, value ) \
20 REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
21 #define REG_FIELD_X_( value, shift ) ((value) << shift)
25 #define REG_STATE( scope, reg, field, symbolic_value ) \
26 REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
27 #define REG_STATE_X_( k, shift ) (k << shift)
31 #define REG_MASK( scope, reg, field ) \
32 REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
33 #define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb)
37 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb
41 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit
45 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
46 #define REG_ADDR_X_( inst, offs ) ((inst) + offs)
50 #define REG_ADDR_VECT( scope, inst, reg, index ) \
51 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 STRIDE_##scope##_##reg )
53 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \
54 ((inst) + offs + (index) * stride)
57 /* Register rw_cfg, scope iop_scrc_out, type rw */
58 #define reg_iop_scrc_out_rw_cfg___trig___lsb 0
59 #define reg_iop_scrc_out_rw_cfg___trig___width 2
60 #define reg_iop_scrc_out_rw_cfg___inv_crc___lsb 2
61 #define reg_iop_scrc_out_rw_cfg___inv_crc___width 1
62 #define reg_iop_scrc_out_rw_cfg___inv_crc___bit 2
63 #define reg_iop_scrc_out_rw_cfg_offset 0
65 /* Register rw_ctrl, scope iop_scrc_out, type rw */
66 #define reg_iop_scrc_out_rw_ctrl___strb_src___lsb 0
67 #define reg_iop_scrc_out_rw_ctrl___strb_src___width 1
68 #define reg_iop_scrc_out_rw_ctrl___strb_src___bit 0
69 #define reg_iop_scrc_out_rw_ctrl___out_src___lsb 1
70 #define reg_iop_scrc_out_rw_ctrl___out_src___width 1
71 #define reg_iop_scrc_out_rw_ctrl___out_src___bit 1
72 #define reg_iop_scrc_out_rw_ctrl_offset 4
74 /* Register rw_init_crc, scope iop_scrc_out, type rw */
75 #define reg_iop_scrc_out_rw_init_crc_offset 8
77 /* Register rw_crc, scope iop_scrc_out, type rw */
78 #define reg_iop_scrc_out_rw_crc_offset 12
80 /* Register rw_data, scope iop_scrc_out, type rw */
81 #define reg_iop_scrc_out_rw_data___val___lsb 0
82 #define reg_iop_scrc_out_rw_data___val___width 1
83 #define reg_iop_scrc_out_rw_data___val___bit 0
84 #define reg_iop_scrc_out_rw_data_offset 16
86 /* Register r_computed_crc, scope iop_scrc_out, type r */
87 #define reg_iop_scrc_out_r_computed_crc_offset 20
91 #define regk_iop_scrc_out_crc 0x00000001
92 #define regk_iop_scrc_out_data 0x00000000
93 #define regk_iop_scrc_out_dif 0x00000001
94 #define regk_iop_scrc_out_hi 0x00000000
95 #define regk_iop_scrc_out_neg 0x00000002
96 #define regk_iop_scrc_out_no 0x00000000
97 #define regk_iop_scrc_out_pos 0x00000001
98 #define regk_iop_scrc_out_pos_neg 0x00000003
99 #define regk_iop_scrc_out_reg 0x00000000
100 #define regk_iop_scrc_out_rw_cfg_default 0x00000000
101 #define regk_iop_scrc_out_rw_crc_default 0x00000000
102 #define regk_iop_scrc_out_rw_ctrl_default 0x00000000
103 #define regk_iop_scrc_out_rw_data_default 0x00000000
104 #define regk_iop_scrc_out_rw_init_crc_default 0x00000000
105 #define regk_iop_scrc_out_yes 0x00000001
106 #endif /* __iop_scrc_out_defs_asm_h */