arch/arm64/mm/dma-mapping.c

   1 /*
   2  * SWIOTLB-based DMA API implementation
   3  *
   4  * Copyright (C) 2012 ARM Ltd.
   5  * Author: Catalin Marinas <catalin.marinas@arm.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include <linux/gfp.h>
  21 #include <linux/acpi.h>
  22 #include <linux/bootmem.h>
  23 #include <linux/cache.h>
  24 #include <linux/export.h>
  25 #include <linux/slab.h>
  26 #include <linux/genalloc.h>
  27 #include <linux/dma-mapping.h>
  28 #include <linux/dma-contiguous.h>
  29 #include <linux/vmalloc.h>
  30 #include <linux/swiotlb.h>
  31 #include <linux/pci.h>
  32
  33 #include <asm/cacheflush.h>
  34
  35 static int swiotlb __ro_after_init;
  36
  37 static pgprot_t __get_dma_pgprot(unsigned long attrs, pgprot_t prot,
  38                                  bool coherent)
  39 {
  40         if (!coherent || (attrs & DMA_ATTR_WRITE_COMBINE))
  41                 return pgprot_writecombine(prot);
  42         return prot;
  43 }
  44
  45 static struct gen_pool *atomic_pool;
  46
  47 #define DEFAULT_DMA_COHERENT_POOL_SIZE  SZ_256K
  48 static size_t atomic_pool_size __initdata = DEFAULT_DMA_COHERENT_POOL_SIZE;
  49
  50 static int __init early_coherent_pool(char *p)
  51 {
  52         atomic_pool_size = memparse(p, &p);
  53         return 0;
  54 }
  55 early_param("coherent_pool", early_coherent_pool);
  56
  57 static void *__alloc_from_pool(size_t size, struct page **ret_page, gfp_t flags)
  58 {
  59         unsigned long val;
  60         void *ptr = NULL;
  61
  62         if (!atomic_pool) {
  63                 WARN(1, "coherent pool not initialised!\n");
  64                 return NULL;
  65         }
  66
  67         val = gen_pool_alloc(atomic_pool, size);
  68         if (val) {
  69                 phys_addr_t phys = gen_pool_virt_to_phys(atomic_pool, val);
  70
  71                 *ret_page = phys_to_page(phys);
  72                 ptr = (void *)val;
  73                 memset(ptr, 0, size);
  74         }
  75
  76         return ptr;
  77 }
  78
  79 static bool __in_atomic_pool(void *start, size_t size)
  80 {
  81         return addr_in_gen_pool(atomic_pool, (unsigned long)start, size);
  82 }
  83
  84 static int __free_from_pool(void *start, size_t size)
  85 {
  86         if (!__in_atomic_pool(start, size))
  87                 return 0;
  88
  89         gen_pool_free(atomic_pool, (unsigned long)start, size);
  90
  91         return 1;
  92 }
  93
  94 static void *__dma_alloc_coherent(struct device *dev, size_t size,
  95                                   dma_addr_t *dma_handle, gfp_t flags,
  96                                   unsigned long attrs)
  97 {
  98         if (dev == NULL) {
  99                 WARN_ONCE(1, "Use an actual device structure for DMA allocation\n");
 100                 return NULL;
 101         }
 102
 103         if (IS_ENABLED(CONFIG_ZONE_DMA) &&
 104             dev->coherent_dma_mask <= DMA_BIT_MASK(32))
 105                 flags |= GFP_DMA;
 106         if (dev_get_cma_area(dev) && gfpflags_allow_blocking(flags)) {
 107                 struct page *page;
 108                 void *addr;
 109
 110                 page = dma_alloc_from_contiguous(dev, size >> PAGE_SHIFT,
 111                                                  get_order(size), flags);
 112                 if (!page)
 113                         return NULL;
 114
 115                 *dma_handle = phys_to_dma(dev, page_to_phys(page));
 116                 addr = page_address(page);
 117                 memset(addr, 0, size);
 118                 return addr;
 119         } else {
 120                 return swiotlb_alloc_coherent(dev, size, dma_handle, flags);
 121         }
 122 }
 123
 124 static void __dma_free_coherent(struct device *dev, size_t size,
 125                                 void *vaddr, dma_addr_t dma_handle,
 126                                 unsigned long attrs)
 127 {
 128         bool freed;
 129         phys_addr_t paddr = dma_to_phys(dev, dma_handle);
 130
 131         if (dev == NULL) {
 132                 WARN_ONCE(1, "Use an actual device structure for DMA allocation\n");
 133                 return;
 134         }
 135
 136         freed = dma_release_from_contiguous(dev,
 137                                         phys_to_page(paddr),
 138                                         size >> PAGE_SHIFT);
 139         if (!freed)
 140                 swiotlb_free_coherent(dev, size, vaddr, dma_handle);
 141 }
 142
 143 static void *__dma_alloc(struct device *dev, size_t size,
 144                          dma_addr_t *dma_handle, gfp_t flags,
 145                          unsigned long attrs)
 146 {
 147         struct page *page;
 148         void *ptr, *coherent_ptr;
 149         bool coherent = is_device_dma_coherent(dev);
 150         pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL, false);
 151
 152         size = PAGE_ALIGN(size);
 153
 154         if (!coherent && !gfpflags_allow_blocking(flags)) {
 155                 struct page *page = NULL;
 156                 void *addr = __alloc_from_pool(size, &page, flags);
 157
 158                 if (addr)
 159                         *dma_handle = phys_to_dma(dev, page_to_phys(page));
 160
 161                 return addr;
 162         }
 163
 164         ptr = __dma_alloc_coherent(dev, size, dma_handle, flags, attrs);
 165         if (!ptr)
 166                 goto no_mem;
 167
 168         /* no need for non-cacheable mapping if coherent */
 169         if (coherent)
 170                 return ptr;
 171
 172         /* remove any dirty cache lines on the kernel alias */
 173         __dma_flush_area(ptr, size);
 174
 175         /* create a coherent mapping */
 176         page = virt_to_page(ptr);
 177         coherent_ptr = dma_common_contiguous_remap(page, size, VM_USERMAP,
 178                                                    prot, NULL);
 179         if (!coherent_ptr)
 180                 goto no_map;
 181
 182         return coherent_ptr;
 183
 184 no_map:
 185         __dma_free_coherent(dev, size, ptr, *dma_handle, attrs);
 186 no_mem:
 187         return NULL;
 188 }
 189
 190 static void __dma_free(struct device *dev, size_t size,
 191                        void *vaddr, dma_addr_t dma_handle,
 192                        unsigned long attrs)
 193 {
 194         void *swiotlb_addr = phys_to_virt(dma_to_phys(dev, dma_handle));
 195
 196         size = PAGE_ALIGN(size);
 197
 198         if (!is_device_dma_coherent(dev)) {
 199                 if (__free_from_pool(vaddr, size))
 200                         return;
 201                 vunmap(vaddr);
 202         }
 203         __dma_free_coherent(dev, size, swiotlb_addr, dma_handle, attrs);
 204 }
 205
 206 static dma_addr_t __swiotlb_map_page(struct device *dev, struct page *page,
 207                                      unsigned long offset, size_t size,
 208                                      enum dma_data_direction dir,
 209                                      unsigned long attrs)
 210 {
 211         dma_addr_t dev_addr;
 212
 213         dev_addr = swiotlb_map_page(dev, page, offset, size, dir, attrs);
 214         if (!is_device_dma_coherent(dev) &&
 215             (attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
 216                 __dma_map_area(phys_to_virt(dma_to_phys(dev, dev_addr)), size, dir);
 217
 218         return dev_addr;
 219 }
 220
 221
 222 static void __swiotlb_unmap_page(struct device *dev, dma_addr_t dev_addr,
 223                                  size_t size, enum dma_data_direction dir,
 224                                  unsigned long attrs)
 225 {
 226         if (!is_device_dma_coherent(dev) &&
 227             (attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
 228                 __dma_unmap_area(phys_to_virt(dma_to_phys(dev, dev_addr)), size, dir);
 229         swiotlb_unmap_page(dev, dev_addr, size, dir, attrs);
 230 }
 231
 232 static int __swiotlb_map_sg_attrs(struct device *dev, struct scatterlist *sgl,
 233                                   int nelems, enum dma_data_direction dir,
 234                                   unsigned long attrs)
 235 {
 236         struct scatterlist *sg;
 237         int i, ret;
 238
 239         ret = swiotlb_map_sg_attrs(dev, sgl, nelems, dir, attrs);
 240         if (!is_device_dma_coherent(dev) &&
 241             (attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
 242                 for_each_sg(sgl, sg, ret, i)
 243                         __dma_map_area(phys_to_virt(dma_to_phys(dev, sg->dma_address)),
 244                                        sg->length, dir);
 245
 246         return ret;
 247 }
 248
 249 static void __swiotlb_unmap_sg_attrs(struct device *dev,
 250                                      struct scatterlist *sgl, int nelems,
 251                                      enum dma_data_direction dir,
 252                                      unsigned long attrs)
 253 {
 254         struct scatterlist *sg;
 255         int i;
 256
 257         if (!is_device_dma_coherent(dev) &&
 258             (attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
 259                 for_each_sg(sgl, sg, nelems, i)
 260                         __dma_unmap_area(phys_to_virt(dma_to_phys(dev, sg->dma_address)),
 261                                          sg->length, dir);
 262         swiotlb_unmap_sg_attrs(dev, sgl, nelems, dir, attrs);
 263 }
 264
 265 static void __swiotlb_sync_single_for_cpu(struct device *dev,
 266                                           dma_addr_t dev_addr, size_t size,
 267                                           enum dma_data_direction dir)
 268 {
 269         if (!is_device_dma_coherent(dev))
 270                 __dma_unmap_area(phys_to_virt(dma_to_phys(dev, dev_addr)), size, dir);
 271         swiotlb_sync_single_for_cpu(dev, dev_addr, size, dir);
 272 }
 273
 274 static void __swiotlb_sync_single_for_device(struct device *dev,
 275                                              dma_addr_t dev_addr, size_t size,
 276                                              enum dma_data_direction dir)
 277 {
 278         swiotlb_sync_single_for_device(dev, dev_addr, size, dir);
 279         if (!is_device_dma_coherent(dev))
 280                 __dma_map_area(phys_to_virt(dma_to_phys(dev, dev_addr)), size, dir);
 281 }
 282
 283 static void __swiotlb_sync_sg_for_cpu(struct device *dev,
 284                                       struct scatterlist *sgl, int nelems,
 285                                       enum dma_data_direction dir)
 286 {
 287         struct scatterlist *sg;
 288         int i;
 289
 290         if (!is_device_dma_coherent(dev))
 291                 for_each_sg(sgl, sg, nelems, i)
 292                         __dma_unmap_area(phys_to_virt(dma_to_phys(dev, sg->dma_address)),
 293                                          sg->length, dir);
 294         swiotlb_sync_sg_for_cpu(dev, sgl, nelems, dir);
 295 }
 296
 297 static void __swiotlb_sync_sg_for_device(struct device *dev,
 298                                          struct scatterlist *sgl, int nelems,
 299                                          enum dma_data_direction dir)
 300 {
 301         struct scatterlist *sg;
 302         int i;
 303
 304         swiotlb_sync_sg_for_device(dev, sgl, nelems, dir);
 305         if (!is_device_dma_coherent(dev))
 306                 for_each_sg(sgl, sg, nelems, i)
 307                         __dma_map_area(phys_to_virt(dma_to_phys(dev, sg->dma_address)),
 308                                        sg->length, dir);
 309 }
 310
 311 static int __swiotlb_mmap_pfn(struct vm_area_struct *vma,
 312                               unsigned long pfn, size_t size)
 313 {
 314         int ret = -ENXIO;
 315         unsigned long nr_vma_pages = (vma->vm_end - vma->vm_start) >>
 316                                         PAGE_SHIFT;
 317         unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
 318         unsigned long off = vma->vm_pgoff;
 319
 320         if (off < nr_pages && nr_vma_pages <= (nr_pages - off)) {
 321                 ret = remap_pfn_range(vma, vma->vm_start,
 322                                       pfn + off,
 323                                       vma->vm_end - vma->vm_start,
 324                                       vma->vm_page_prot);
 325         }
 326
 327         return ret;
 328 }
 329
 330 static int __swiotlb_mmap(struct device *dev,
 331                           struct vm_area_struct *vma,
 332                           void *cpu_addr, dma_addr_t dma_addr, size_t size,
 333                           unsigned long attrs)
 334 {
 335         int ret;
 336         unsigned long pfn = dma_to_phys(dev, dma_addr) >> PAGE_SHIFT;
 337
 338         vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot,
 339                                              is_device_dma_coherent(dev));
 340
 341         if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret))
 342                 return ret;
 343
 344         return __swiotlb_mmap_pfn(vma, pfn, size);
 345 }
 346
 347 static int __swiotlb_get_sgtable_page(struct sg_table *sgt,
 348                                       struct page *page, size_t size)
 349 {
 350         int ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
 351
 352         if (!ret)
 353                 sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0);
 354
 355         return ret;
 356 }
 357
 358 static int __swiotlb_get_sgtable(struct device *dev, struct sg_table *sgt,
 359                                  void *cpu_addr, dma_addr_t handle, size_t size,
 360                                  unsigned long attrs)
 361 {
 362         struct page *page = phys_to_page(dma_to_phys(dev, handle));
 363
 364         return __swiotlb_get_sgtable_page(sgt, page, size);
 365 }
 366
 367 static int __swiotlb_dma_supported(struct device *hwdev, u64 mask)
 368 {
 369         if (swiotlb)
 370                 return swiotlb_dma_supported(hwdev, mask);
 371         return 1;
 372 }
 373
 374 static int __swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t addr)
 375 {
 376         if (swiotlb)
 377                 return swiotlb_dma_mapping_error(hwdev, addr);
 378         return 0;
 379 }
 380
 381 static const struct dma_map_ops swiotlb_dma_ops = {
 382         .alloc = __dma_alloc,
 383         .free = __dma_free,
 384         .mmap = __swiotlb_mmap,
 385         .get_sgtable = __swiotlb_get_sgtable,
 386         .map_page = __swiotlb_map_page,
 387         .unmap_page = __swiotlb_unmap_page,
 388         .map_sg = __swiotlb_map_sg_attrs,
 389         .unmap_sg = __swiotlb_unmap_sg_attrs,
 390         .sync_single_for_cpu = __swiotlb_sync_single_for_cpu,
 391         .sync_single_for_device = __swiotlb_sync_single_for_device,
 392         .sync_sg_for_cpu = __swiotlb_sync_sg_for_cpu,
 393         .sync_sg_for_device = __swiotlb_sync_sg_for_device,
 394         .dma_supported = __swiotlb_dma_supported,
 395         .mapping_error = __swiotlb_dma_mapping_error,
 396 };
 397
 398 static int __init atomic_pool_init(void)
 399 {
 400         pgprot_t prot = __pgprot(PROT_NORMAL_NC);
 401         unsigned long nr_pages = atomic_pool_size >> PAGE_SHIFT;
 402         struct page *page;
 403         void *addr;
 404         unsigned int pool_size_order = get_order(atomic_pool_size);
 405
 406         if (dev_get_cma_area(NULL))
 407                 page = dma_alloc_from_contiguous(NULL, nr_pages,
 408                                                  pool_size_order, GFP_KERNEL);
 409         else
 410                 page = alloc_pages(GFP_DMA, pool_size_order);
 411
 412         if (page) {
 413                 int ret;
 414                 void *page_addr = page_address(page);
 415
 416                 memset(page_addr, 0, atomic_pool_size);
 417                 __dma_flush_area(page_addr, atomic_pool_size);
 418
 419                 atomic_pool = gen_pool_create(PAGE_SHIFT, -1);
 420                 if (!atomic_pool)
 421                         goto free_page;
 422
 423                 addr = dma_common_contiguous_remap(page, atomic_pool_size,
 424                                         VM_USERMAP, prot, atomic_pool_init);
 425
 426                 if (!addr)
 427                         goto destroy_genpool;
 428
 429                 ret = gen_pool_add_virt(atomic_pool, (unsigned long)addr,
 430                                         page_to_phys(page),
 431                                         atomic_pool_size, -1);
 432                 if (ret)
 433                         goto remove_mapping;
 434
 435                 gen_pool_set_algo(atomic_pool,
 436                                   gen_pool_first_fit_order_align,
 437                                   (void *)PAGE_SHIFT);
 438
 439                 pr_info("DMA: preallocated %zu KiB pool for atomic allocations\n",
 440                         atomic_pool_size / 1024);
 441                 return 0;
 442         }
 443         goto out;
 444
 445 remove_mapping:
 446         dma_common_free_remap(addr, atomic_pool_size, VM_USERMAP);
 447 destroy_genpool:
 448         gen_pool_destroy(atomic_pool);
 449         atomic_pool = NULL;
 450 free_page:
 451         if (!dma_release_from_contiguous(NULL, page, nr_pages))
 452                 __free_pages(page, pool_size_order);
 453 out:
 454         pr_err("DMA: failed to allocate %zu KiB pool for atomic coherent allocation\n",
 455                 atomic_pool_size / 1024);
 456         return -ENOMEM;
 457 }
 458
 459 /********************************************
 460  * The following APIs are for dummy DMA ops *
 461  ********************************************/
 462
 463 static void *__dummy_alloc(struct device *dev, size_t size,
 464                            dma_addr_t *dma_handle, gfp_t flags,
 465                            unsigned long attrs)
 466 {
 467         return NULL;
 468 }
 469
 470 static void __dummy_free(struct device *dev, size_t size,
 471                          void *vaddr, dma_addr_t dma_handle,
 472                          unsigned long attrs)
 473 {
 474 }
 475
 476 static int __dummy_mmap(struct device *dev,
 477                         struct vm_area_struct *vma,
 478                         void *cpu_addr, dma_addr_t dma_addr, size_t size,
 479                         unsigned long attrs)
 480 {
 481         return -ENXIO;
 482 }
 483
 484 static dma_addr_t __dummy_map_page(struct device *dev, struct page *page,
 485                                    unsigned long offset, size_t size,
 486                                    enum dma_data_direction dir,
 487                                    unsigned long attrs)
 488 {
 489         return 0;
 490 }
 491
 492 static void __dummy_unmap_page(struct device *dev, dma_addr_t dev_addr,
 493                                size_t size, enum dma_data_direction dir,
 494                                unsigned long attrs)
 495 {
 496 }
 497
 498 static int __dummy_map_sg(struct device *dev, struct scatterlist *sgl,
 499                           int nelems, enum dma_data_direction dir,
 500                           unsigned long attrs)
 501 {
 502         return 0;
 503 }
 504
 505 static void __dummy_unmap_sg(struct device *dev,
 506                              struct scatterlist *sgl, int nelems,
 507                              enum dma_data_direction dir,
 508                              unsigned long attrs)
 509 {
 510 }
 511
 512 static void __dummy_sync_single(struct device *dev,
 513                                 dma_addr_t dev_addr, size_t size,
 514                                 enum dma_data_direction dir)
 515 {
 516 }
 517
 518 static void __dummy_sync_sg(struct device *dev,
 519                             struct scatterlist *sgl, int nelems,
 520                             enum dma_data_direction dir)
 521 {
 522 }
 523
 524 static int __dummy_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
 525 {
 526         return 1;
 527 }
 528
 529 static int __dummy_dma_supported(struct device *hwdev, u64 mask)
 530 {
 531         return 0;
 532 }
 533
 534 const struct dma_map_ops dummy_dma_ops = {
 535         .alloc                  = __dummy_alloc,
 536         .free                   = __dummy_free,
 537         .mmap                   = __dummy_mmap,
 538         .map_page               = __dummy_map_page,
 539         .unmap_page             = __dummy_unmap_page,
 540         .map_sg                 = __dummy_map_sg,
 541         .unmap_sg               = __dummy_unmap_sg,
 542         .sync_single_for_cpu    = __dummy_sync_single,
 543         .sync_single_for_device = __dummy_sync_single,
 544         .sync_sg_for_cpu        = __dummy_sync_sg,
 545         .sync_sg_for_device     = __dummy_sync_sg,
 546         .mapping_error          = __dummy_mapping_error,
 547         .dma_supported          = __dummy_dma_supported,
 548 };
 549 EXPORT_SYMBOL(dummy_dma_ops);
 550
 551 static int __init arm64_dma_init(void)
 552 {
 553         if (swiotlb_force == SWIOTLB_FORCE ||
 554             max_pfn > (arm64_dma_phys_limit >> PAGE_SHIFT))
 555                 swiotlb = 1;
 556
 557         return atomic_pool_init();
 558 }
 559 arch_initcall(arm64_dma_init);
 560
 561 #define PREALLOC_DMA_DEBUG_ENTRIES      4096
 562
 563 static int __init dma_debug_do_init(void)
 564 {
 565         dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
 566         return 0;
 567 }
 568 fs_initcall(dma_debug_do_init);
 569
 570
 571 #ifdef CONFIG_IOMMU_DMA
 572 #include <linux/dma-iommu.h>
 573 #include <linux/platform_device.h>
 574 #include <linux/amba/bus.h>
 575
 576 /* Thankfully, all cache ops are by VA so we can ignore phys here */
 577 static void flush_page(struct device *dev, const void *virt, phys_addr_t phys)
 578 {
 579         __dma_flush_area(virt, PAGE_SIZE);
 580 }
 581
 582 static void *__iommu_alloc_attrs(struct device *dev, size_t size,
 583                                  dma_addr_t *handle, gfp_t gfp,
 584                                  unsigned long attrs)
 585 {
 586         bool coherent = is_device_dma_coherent(dev);
 587         int ioprot = dma_info_to_prot(DMA_BIDIRECTIONAL, coherent, attrs);
 588         size_t iosize = size;
 589         void *addr;
 590
 591         if (WARN(!dev, "cannot create IOMMU mapping for unknown device\n"))
 592                 return NULL;
 593
 594         size = PAGE_ALIGN(size);
 595
 596         /*
 597          * Some drivers rely on this, and we probably don't want the
 598          * possibility of stale kernel data being read by devices anyway.
 599          */
 600         gfp |= __GFP_ZERO;
 601
 602         if (!gfpflags_allow_blocking(gfp)) {
 603                 struct page *page;
 604                 /*
 605                  * In atomic context we can't remap anything, so we'll only
 606                  * get the virtually contiguous buffer we need by way of a
 607                  * physically contiguous allocation.
 608                  */
 609                 if (coherent) {
 610                         page = alloc_pages(gfp, get_order(size));
 611                         addr = page ? page_address(page) : NULL;
 612                 } else {
 613                         addr = __alloc_from_pool(size, &page, gfp);
 614                 }
 615                 if (!addr)
 616                         return NULL;
 617
 618                 *handle = iommu_dma_map_page(dev, page, 0, iosize, ioprot);
 619                 if (iommu_dma_mapping_error(dev, *handle)) {
 620                         if (coherent)
 621                                 __free_pages(page, get_order(size));
 622                         else
 623                                 __free_from_pool(addr, size);
 624                         addr = NULL;
 625                 }
 626         } else if (attrs & DMA_ATTR_FORCE_CONTIGUOUS) {
 627                 pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL, coherent);
 628                 struct page *page;
 629
 630                 page = dma_alloc_from_contiguous(dev, size >> PAGE_SHIFT,
 631                                                  get_order(size), gfp);
 632                 if (!page)
 633                         return NULL;
 634
 635                 *handle = iommu_dma_map_page(dev, page, 0, iosize, ioprot);
 636                 if (iommu_dma_mapping_error(dev, *handle)) {
 637                         dma_release_from_contiguous(dev, page,
 638                                                     size >> PAGE_SHIFT);
 639                         return NULL;
 640                 }
 641                 if (!coherent)
 642                         __dma_flush_area(page_to_virt(page), iosize);
 643
 644                 addr = dma_common_contiguous_remap(page, size, VM_USERMAP,
 645                                                    prot,
 646                                                    __builtin_return_address(0));
 647                 if (!addr) {
 648                         iommu_dma_unmap_page(dev, *handle, iosize, 0, attrs);
 649                         dma_release_from_contiguous(dev, page,
 650                                                     size >> PAGE_SHIFT);
 651                 }
 652         } else {
 653                 pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL, coherent);
 654                 struct page **pages;
 655
 656                 pages = iommu_dma_alloc(dev, iosize, gfp, attrs, ioprot,
 657                                         handle, flush_page);
 658                 if (!pages)
 659                         return NULL;
 660
 661                 addr = dma_common_pages_remap(pages, size, VM_USERMAP, prot,
 662                                               __builtin_return_address(0));
 663                 if (!addr)
 664                         iommu_dma_free(dev, pages, iosize, handle);
 665         }
 666         return addr;
 667 }
 668
 669 static void __iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr,
 670                                dma_addr_t handle, unsigned long attrs)
 671 {
 672         size_t iosize = size;
 673
 674         size = PAGE_ALIGN(size);
 675         /*
 676          * @cpu_addr will be one of 4 things depending on how it was allocated:
 677          * - A remapped array of pages for contiguous allocations.
 678          * - A remapped array of pages from iommu_dma_alloc(), for all
 679          *   non-atomic allocations.
 680          * - A non-cacheable alias from the atomic pool, for atomic
 681          *   allocations by non-coherent devices.
 682          * - A normal lowmem address, for atomic allocations by
 683          *   coherent devices.
 684          * Hence how dodgy the below logic looks...
 685          */
 686         if (__in_atomic_pool(cpu_addr, size)) {
 687                 iommu_dma_unmap_page(dev, handle, iosize, 0, 0);
 688                 __free_from_pool(cpu_addr, size);
 689         } else if (attrs & DMA_ATTR_FORCE_CONTIGUOUS) {
 690                 struct page *page = vmalloc_to_page(cpu_addr);
 691
 692                 iommu_dma_unmap_page(dev, handle, iosize, 0, attrs);
 693                 dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT);
 694                 dma_common_free_remap(cpu_addr, size, VM_USERMAP);
 695         } else if (is_vmalloc_addr(cpu_addr)){
 696                 struct vm_struct *area = find_vm_area(cpu_addr);
 697
 698                 if (WARN_ON(!area || !area->pages))
 699                         return;
 700                 iommu_dma_free(dev, area->pages, iosize, &handle);
 701                 dma_common_free_remap(cpu_addr, size, VM_USERMAP);
 702         } else {
 703                 iommu_dma_unmap_page(dev, handle, iosize, 0, 0);
 704                 __free_pages(virt_to_page(cpu_addr), get_order(size));
 705         }
 706 }
 707
 708 static int __iommu_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
 709                               void *cpu_addr, dma_addr_t dma_addr, size_t size,
 710                               unsigned long attrs)
 711 {
 712         struct vm_struct *area;
 713         int ret;
 714
 715         vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot,
 716                                              is_device_dma_coherent(dev));
 717
 718         if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret))
 719                 return ret;
 720
 721         if (attrs & DMA_ATTR_FORCE_CONTIGUOUS) {
 722                 /*
 723                  * DMA_ATTR_FORCE_CONTIGUOUS allocations are always remapped,
 724                  * hence in the vmalloc space.
 725                  */
 726                 unsigned long pfn = vmalloc_to_pfn(cpu_addr);
 727                 return __swiotlb_mmap_pfn(vma, pfn, size);
 728         }
 729
 730         area = find_vm_area(cpu_addr);
 731         if (WARN_ON(!area || !area->pages))
 732                 return -ENXIO;
 733
 734         return iommu_dma_mmap(area->pages, size, vma);
 735 }
 736
 737 static int __iommu_get_sgtable(struct device *dev, struct sg_table *sgt,
 738                                void *cpu_addr, dma_addr_t dma_addr,
 739                                size_t size, unsigned long attrs)
 740 {
 741         unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
 742         struct vm_struct *area = find_vm_area(cpu_addr);
 743
 744         if (attrs & DMA_ATTR_FORCE_CONTIGUOUS) {
 745                 /*
 746                  * DMA_ATTR_FORCE_CONTIGUOUS allocations are always remapped,
 747                  * hence in the vmalloc space.
 748                  */
 749                 struct page *page = vmalloc_to_page(cpu_addr);
 750                 return __swiotlb_get_sgtable_page(sgt, page, size);
 751         }
 752
 753         if (WARN_ON(!area || !area->pages))
 754                 return -ENXIO;
 755
 756         return sg_alloc_table_from_pages(sgt, area->pages, count, 0, size,
 757                                          GFP_KERNEL);
 758 }
 759
 760 static void __iommu_sync_single_for_cpu(struct device *dev,
 761                                         dma_addr_t dev_addr, size_t size,
 762                                         enum dma_data_direction dir)
 763 {
 764         phys_addr_t phys;
 765
 766         if (is_device_dma_coherent(dev))
 767                 return;
 768
 769         phys = iommu_iova_to_phys(iommu_get_domain_for_dev(dev), dev_addr);
 770         __dma_unmap_area(phys_to_virt(phys), size, dir);
 771 }
 772
 773 static void __iommu_sync_single_for_device(struct device *dev,
 774                                            dma_addr_t dev_addr, size_t size,
 775                                            enum dma_data_direction dir)
 776 {
 777         phys_addr_t phys;
 778
 779         if (is_device_dma_coherent(dev))
 780                 return;
 781
 782         phys = iommu_iova_to_phys(iommu_get_domain_for_dev(dev), dev_addr);
 783         __dma_map_area(phys_to_virt(phys), size, dir);
 784 }
 785
 786 static dma_addr_t __iommu_map_page(struct device *dev, struct page *page,
 787                                    unsigned long offset, size_t size,
 788                                    enum dma_data_direction dir,
 789                                    unsigned long attrs)
 790 {
 791         bool coherent = is_device_dma_coherent(dev);
 792         int prot = dma_info_to_prot(dir, coherent, attrs);
 793         dma_addr_t dev_addr = iommu_dma_map_page(dev, page, offset, size, prot);
 794
 795         if (!iommu_dma_mapping_error(dev, dev_addr) &&
 796             (attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
 797                 __iommu_sync_single_for_device(dev, dev_addr, size, dir);
 798
 799         return dev_addr;
 800 }
 801
 802 static void __iommu_unmap_page(struct device *dev, dma_addr_t dev_addr,
 803                                size_t size, enum dma_data_direction dir,
 804                                unsigned long attrs)
 805 {
 806         if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
 807                 __iommu_sync_single_for_cpu(dev, dev_addr, size, dir);
 808
 809         iommu_dma_unmap_page(dev, dev_addr, size, dir, attrs);
 810 }
 811
 812 static void __iommu_sync_sg_for_cpu(struct device *dev,
 813                                     struct scatterlist *sgl, int nelems,
 814                                     enum dma_data_direction dir)
 815 {
 816         struct scatterlist *sg;
 817         int i;
 818
 819         if (is_device_dma_coherent(dev))
 820                 return;
 821
 822         for_each_sg(sgl, sg, nelems, i)
 823                 __dma_unmap_area(sg_virt(sg), sg->length, dir);
 824 }
 825
 826 static void __iommu_sync_sg_for_device(struct device *dev,
 827                                        struct scatterlist *sgl, int nelems,
 828                                        enum dma_data_direction dir)
 829 {
 830         struct scatterlist *sg;
 831         int i;
 832
 833         if (is_device_dma_coherent(dev))
 834                 return;
 835
 836         for_each_sg(sgl, sg, nelems, i)
 837                 __dma_map_area(sg_virt(sg), sg->length, dir);
 838 }
 839
 840 static int __iommu_map_sg_attrs(struct device *dev, struct scatterlist *sgl,
 841                                 int nelems, enum dma_data_direction dir,
 842                                 unsigned long attrs)
 843 {
 844         bool coherent = is_device_dma_coherent(dev);
 845
 846         if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
 847                 __iommu_sync_sg_for_device(dev, sgl, nelems, dir);
 848
 849         return iommu_dma_map_sg(dev, sgl, nelems,
 850                                 dma_info_to_prot(dir, coherent, attrs));
 851 }
 852
 853 static void __iommu_unmap_sg_attrs(struct device *dev,
 854                                    struct scatterlist *sgl, int nelems,
 855                                    enum dma_data_direction dir,
 856                                    unsigned long attrs)
 857 {
 858         if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
 859                 __iommu_sync_sg_for_cpu(dev, sgl, nelems, dir);
 860
 861         iommu_dma_unmap_sg(dev, sgl, nelems, dir, attrs);
 862 }
 863
 864 static const struct dma_map_ops iommu_dma_ops = {
 865         .alloc = __iommu_alloc_attrs,
 866         .free = __iommu_free_attrs,
 867         .mmap = __iommu_mmap_attrs,
 868         .get_sgtable = __iommu_get_sgtable,
 869         .map_page = __iommu_map_page,
 870         .unmap_page = __iommu_unmap_page,
 871         .map_sg = __iommu_map_sg_attrs,
 872         .unmap_sg = __iommu_unmap_sg_attrs,
 873         .sync_single_for_cpu = __iommu_sync_single_for_cpu,
 874         .sync_single_for_device = __iommu_sync_single_for_device,
 875         .sync_sg_for_cpu = __iommu_sync_sg_for_cpu,
 876         .sync_sg_for_device = __iommu_sync_sg_for_device,
 877         .map_resource = iommu_dma_map_resource,
 878         .unmap_resource = iommu_dma_unmap_resource,
 879         .mapping_error = iommu_dma_mapping_error,
 880 };
 881
 882 static int __init __iommu_dma_init(void)
 883 {
 884         return iommu_dma_init();
 885 }
 886 arch_initcall(__iommu_dma_init);
 887
 888 static void __iommu_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
 889                                   const struct iommu_ops *ops)
 890 {
 891         struct iommu_domain *domain;
 892
 893         if (!ops)
 894                 return;
 895
 896         /*
 897          * The IOMMU core code allocates the default DMA domain, which the
 898          * underlying IOMMU driver needs to support via the dma-iommu layer.
 899          */
 900         domain = iommu_get_domain_for_dev(dev);
 901
 902         if (!domain)
 903                 goto out_err;
 904
 905         if (domain->type == IOMMU_DOMAIN_DMA) {
 906                 if (iommu_dma_init_domain(domain, dma_base, size, dev))
 907                         goto out_err;
 908
 909                 dev->dma_ops = &iommu_dma_ops;
 910         }
 911
 912         return;
 913
 914 out_err:
 915          pr_warn("Failed to set up IOMMU for device %s; retaining platform DMA ops\n",
 916                  dev_name(dev));
 917 }
 918
 919 void arch_teardown_dma_ops(struct device *dev)
 920 {
 921         dev->dma_ops = NULL;
 922 }
 923
 924 #else
 925
 926 static void __iommu_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
 927                                   const struct iommu_ops *iommu)
 928 { }
 929
 930 #endif  /* CONFIG_IOMMU_DMA */
 931
 932 void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
 933                         const struct iommu_ops *iommu, bool coherent)
 934 {
 935         if (!dev->dma_ops)
 936                 dev->dma_ops = &swiotlb_dma_ops;
 937
 938         dev->archdata.dma_coherent = coherent;
 939         __iommu_setup_dma_ops(dev, dma_base, size, iommu);
 940
 941 #ifdef CONFIG_XEN
 942         if (xen_initial_domain()) {
 943                 dev->archdata.dev_dma_ops = dev->dma_ops;
 944                 dev->dma_ops = xen_dma_ops;
 945         }
 946 #endif
 947 }