arch/arm64/kernel/traps.c

   1 /*
   2  * Based on arch/arm/kernel/traps.c
   3  *
   4  * Copyright (C) 1995-2009 Russell King
   5  * Copyright (C) 2012 ARM Ltd.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include <linux/bug.h>
  21 #include <linux/signal.h>
  22 #include <linux/personality.h>
  23 #include <linux/kallsyms.h>
  24 #include <linux/spinlock.h>
  25 #include <linux/uaccess.h>
  26 #include <linux/hardirq.h>
  27 #include <linux/kdebug.h>
  28 #include <linux/module.h>
  29 #include <linux/kexec.h>
  30 #include <linux/delay.h>
  31 #include <linux/init.h>
  32 #include <linux/sched/signal.h>
  33 #include <linux/sched/debug.h>
  34 #include <linux/sched/task_stack.h>
  35 #include <linux/syscalls.h>
  36
  37 #include <asm/atomic.h>
  38 #include <asm/bug.h>
  39 #include <asm/debug-monitors.h>
  40 #include <asm/esr.h>
  41 #include <asm/insn.h>
  42 #include <asm/traps.h>
  43 #include <asm/stack_pointer.h>
  44 #include <asm/stacktrace.h>
  45 #include <asm/exception.h>
  46 #include <asm/system_misc.h>
  47 #include <asm/sysreg.h>
  48
  49 static const char *handler[]= {
  50         "Synchronous Abort",
  51         "IRQ",
  52         "FIQ",
  53         "Error"
  54 };
  55
  56 int show_unhandled_signals = 1;
  57
  58 /*
  59  * Dump out the contents of some kernel memory nicely...
  60  */
  61 static void dump_mem(const char *lvl, const char *str, unsigned long bottom,
  62                      unsigned long top)
  63 {
  64         unsigned long first;
  65         mm_segment_t fs;
  66         int i;
  67
  68         /*
  69          * We need to switch to kernel mode so that we can use __get_user
  70          * to safely read from kernel space.
  71          */
  72         fs = get_fs();
  73         set_fs(KERNEL_DS);
  74
  75         printk("%s%s(0x%016lx to 0x%016lx)\n", lvl, str, bottom, top);
  76
  77         for (first = bottom & ~31; first < top; first += 32) {
  78                 unsigned long p;
  79                 char str[sizeof(" 12345678") * 8 + 1];
  80
  81                 memset(str, ' ', sizeof(str));
  82                 str[sizeof(str) - 1] = '\0';
  83
  84                 for (p = first, i = 0; i < (32 / 8)
  85                                         && p < top; i++, p += 8) {
  86                         if (p >= bottom && p < top) {
  87                                 unsigned long val;
  88
  89                                 if (__get_user(val, (unsigned long *)p) == 0)
  90                                         sprintf(str + i * 17, " %016lx", val);
  91                                 else
  92                                         sprintf(str + i * 17, " ????????????????");
  93                         }
  94                 }
  95                 printk("%s%04lx:%s\n", lvl, first & 0xffff, str);
  96         }
  97
  98         set_fs(fs);
  99 }
 100
 101 static void dump_backtrace_entry(unsigned long where)
 102 {
 103         /*
 104          * Note that 'where' can have a physical address, but it's not handled.
 105          */
 106         print_ip_sym(where);
 107 }
 108
 109 static void __dump_instr(const char *lvl, struct pt_regs *regs)
 110 {
 111         unsigned long addr = instruction_pointer(regs);
 112         char str[sizeof("00000000 ") * 5 + 2 + 1], *p = str;
 113         int i;
 114
 115         for (i = -4; i < 1; i++) {
 116                 unsigned int val, bad;
 117
 118                 bad = __get_user(val, &((u32 *)addr)[i]);
 119
 120                 if (!bad)
 121                         p += sprintf(p, i == 0 ? "(%08x) " : "%08x ", val);
 122                 else {
 123                         p += sprintf(p, "bad PC value");
 124                         break;
 125                 }
 126         }
 127         printk("%sCode: %s\n", lvl, str);
 128 }
 129
 130 static void dump_instr(const char *lvl, struct pt_regs *regs)
 131 {
 132         if (!user_mode(regs)) {
 133                 mm_segment_t fs = get_fs();
 134                 set_fs(KERNEL_DS);
 135                 __dump_instr(lvl, regs);
 136                 set_fs(fs);
 137         } else {
 138                 __dump_instr(lvl, regs);
 139         }
 140 }
 141
 142 static void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk)
 143 {
 144         struct stackframe frame;
 145         unsigned long irq_stack_ptr;
 146         int skip;
 147
 148         pr_debug("%s(regs = %p tsk = %p)\n", __func__, regs, tsk);
 149
 150         if (!tsk)
 151                 tsk = current;
 152
 153         if (!try_get_task_stack(tsk))
 154                 return;
 155
 156         /*
 157          * Switching between stacks is valid when tracing current and in
 158          * non-preemptible context.
 159          */
 160         if (tsk == current && !preemptible())
 161                 irq_stack_ptr = IRQ_STACK_PTR(smp_processor_id());
 162         else
 163                 irq_stack_ptr = 0;
 164
 165         if (tsk == current) {
 166                 frame.fp = (unsigned long)__builtin_frame_address(0);
 167                 frame.sp = current_stack_pointer;
 168                 frame.pc = (unsigned long)dump_backtrace;
 169         } else {
 170                 /*
 171                  * task blocked in __switch_to
 172                  */
 173                 frame.fp = thread_saved_fp(tsk);
 174                 frame.sp = thread_saved_sp(tsk);
 175                 frame.pc = thread_saved_pc(tsk);
 176         }
 177 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
 178         frame.graph = tsk->curr_ret_stack;
 179 #endif
 180
 181         skip = !!regs;
 182         printk("Call trace:\n");
 183         while (1) {
 184                 unsigned long where = frame.pc;
 185                 unsigned long stack;
 186                 int ret;
 187
 188                 /* skip until specified stack frame */
 189                 if (!skip) {
 190                         dump_backtrace_entry(where);
 191                 } else if (frame.fp == regs->regs[29]) {
 192                         skip = 0;
 193                         /*
 194                          * Mostly, this is the case where this function is
 195                          * called in panic/abort. As exception handler's
 196                          * stack frame does not contain the corresponding pc
 197                          * at which an exception has taken place, use regs->pc
 198                          * instead.
 199                          */
 200                         dump_backtrace_entry(regs->pc);
 201                 }
 202                 ret = unwind_frame(tsk, &frame);
 203                 if (ret < 0)
 204                         break;
 205                 stack = frame.sp;
 206                 if (in_exception_text(where)) {
 207                         /*
 208                          * If we switched to the irq_stack before calling this
 209                          * exception handler, then the pt_regs will be on the
 210                          * task stack. The easiest way to tell is if the large
 211                          * pt_regs would overlap with the end of the irq_stack.
 212                          */
 213                         if (stack < irq_stack_ptr &&
 214                             (stack + sizeof(struct pt_regs)) > irq_stack_ptr)
 215                                 stack = IRQ_STACK_TO_TASK_STACK(irq_stack_ptr);
 216
 217                         dump_mem("", "Exception stack", stack,
 218                                  stack + sizeof(struct pt_regs));
 219                 }
 220         }
 221
 222         put_task_stack(tsk);
 223 }
 224
 225 void show_stack(struct task_struct *tsk, unsigned long *sp)
 226 {
 227         dump_backtrace(NULL, tsk);
 228         barrier();
 229 }
 230
 231 #ifdef CONFIG_PREEMPT
 232 #define S_PREEMPT " PREEMPT"
 233 #else
 234 #define S_PREEMPT ""
 235 #endif
 236 #define S_SMP " SMP"
 237
 238 static int __die(const char *str, int err, struct pt_regs *regs)
 239 {
 240         struct task_struct *tsk = current;
 241         static int die_counter;
 242         int ret;
 243
 244         pr_emerg("Internal error: %s: %x [#%d]" S_PREEMPT S_SMP "\n",
 245                  str, err, ++die_counter);
 246
 247         /* trap and error numbers are mostly meaningless on ARM */
 248         ret = notify_die(DIE_OOPS, str, regs, err, 0, SIGSEGV);
 249         if (ret == NOTIFY_STOP)
 250                 return ret;
 251
 252         print_modules();
 253         __show_regs(regs);
 254         pr_emerg("Process %.*s (pid: %d, stack limit = 0x%p)\n",
 255                  TASK_COMM_LEN, tsk->comm, task_pid_nr(tsk),
 256                  end_of_stack(tsk));
 257
 258         if (!user_mode(regs)) {
 259                 dump_mem(KERN_EMERG, "Stack: ", regs->sp,
 260                          THREAD_SIZE + (unsigned long)task_stack_page(tsk));
 261                 dump_backtrace(regs, tsk);
 262                 dump_instr(KERN_EMERG, regs);
 263         }
 264
 265         return ret;
 266 }
 267
 268 static DEFINE_RAW_SPINLOCK(die_lock);
 269
 270 /*
 271  * This function is protected against re-entrancy.
 272  */
 273 void die(const char *str, struct pt_regs *regs, int err)
 274 {
 275         int ret;
 276
 277         oops_enter();
 278
 279         raw_spin_lock_irq(&die_lock);
 280         console_verbose();
 281         bust_spinlocks(1);
 282         ret = __die(str, err, regs);
 283
 284         if (regs && kexec_should_crash(current))
 285                 crash_kexec(regs);
 286
 287         bust_spinlocks(0);
 288         add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
 289         raw_spin_unlock_irq(&die_lock);
 290         oops_exit();
 291
 292         if (in_interrupt())
 293                 panic("Fatal exception in interrupt");
 294         if (panic_on_oops)
 295                 panic("Fatal exception");
 296         if (ret != NOTIFY_STOP)
 297                 do_exit(SIGSEGV);
 298 }
 299
 300 void arm64_notify_die(const char *str, struct pt_regs *regs,
 301                       struct siginfo *info, int err)
 302 {
 303         if (user_mode(regs)) {
 304                 current->thread.fault_address = 0;
 305                 current->thread.fault_code = err;
 306                 force_sig_info(info->si_signo, info, current);
 307         } else {
 308                 die(str, regs, err);
 309         }
 310 }
 311
 312 static LIST_HEAD(undef_hook);
 313 static DEFINE_RAW_SPINLOCK(undef_lock);
 314
 315 void register_undef_hook(struct undef_hook *hook)
 316 {
 317         unsigned long flags;
 318
 319         raw_spin_lock_irqsave(&undef_lock, flags);
 320         list_add(&hook->node, &undef_hook);
 321         raw_spin_unlock_irqrestore(&undef_lock, flags);
 322 }
 323
 324 void unregister_undef_hook(struct undef_hook *hook)
 325 {
 326         unsigned long flags;
 327
 328         raw_spin_lock_irqsave(&undef_lock, flags);
 329         list_del(&hook->node);
 330         raw_spin_unlock_irqrestore(&undef_lock, flags);
 331 }
 332
 333 static int call_undef_hook(struct pt_regs *regs)
 334 {
 335         struct undef_hook *hook;
 336         unsigned long flags;
 337         u32 instr;
 338         int (*fn)(struct pt_regs *regs, u32 instr) = NULL;
 339         void __user *pc = (void __user *)instruction_pointer(regs);
 340
 341         if (!user_mode(regs))
 342                 return 1;
 343
 344         if (compat_thumb_mode(regs)) {
 345                 /* 16-bit Thumb instruction */
 346                 if (get_user(instr, (u16 __user *)pc))
 347                         goto exit;
 348                 instr = le16_to_cpu(instr);
 349                 if (aarch32_insn_is_wide(instr)) {
 350                         u32 instr2;
 351
 352                         if (get_user(instr2, (u16 __user *)(pc + 2)))
 353                                 goto exit;
 354                         instr2 = le16_to_cpu(instr2);
 355                         instr = (instr << 16) | instr2;
 356                 }
 357         } else {
 358                 /* 32-bit ARM instruction */
 359                 if (get_user(instr, (u32 __user *)pc))
 360                         goto exit;
 361                 instr = le32_to_cpu(instr);
 362         }
 363
 364         raw_spin_lock_irqsave(&undef_lock, flags);
 365         list_for_each_entry(hook, &undef_hook, node)
 366                 if ((instr & hook->instr_mask) == hook->instr_val &&
 367                         (regs->pstate & hook->pstate_mask) == hook->pstate_val)
 368                         fn = hook->fn;
 369
 370         raw_spin_unlock_irqrestore(&undef_lock, flags);
 371 exit:
 372         return fn ? fn(regs, instr) : 1;
 373 }
 374
 375 static void force_signal_inject(int signal, int code, struct pt_regs *regs,
 376                                 unsigned long address)
 377 {
 378         siginfo_t info;
 379         void __user *pc = (void __user *)instruction_pointer(regs);
 380         const char *desc;
 381
 382         switch (signal) {
 383         case SIGILL:
 384                 desc = "undefined instruction";
 385                 break;
 386         case SIGSEGV:
 387                 desc = "illegal memory access";
 388                 break;
 389         default:
 390                 desc = "bad mode";
 391                 break;
 392         }
 393
 394         if (unhandled_signal(current, signal) &&
 395             show_unhandled_signals_ratelimited()) {
 396                 pr_info("%s[%d]: %s: pc=%p\n",
 397                         current->comm, task_pid_nr(current), desc, pc);
 398                 dump_instr(KERN_INFO, regs);
 399         }
 400
 401         info.si_signo = signal;
 402         info.si_errno = 0;
 403         info.si_code  = code;
 404         info.si_addr  = pc;
 405
 406         arm64_notify_die(desc, regs, &info, 0);
 407 }
 408
 409 /*
 410  * Set up process info to signal segmentation fault - called on access error.
 411  */
 412 void arm64_notify_segfault(struct pt_regs *regs, unsigned long addr)
 413 {
 414         int code;
 415
 416         down_read(&current->mm->mmap_sem);
 417         if (find_vma(current->mm, addr) == NULL)
 418                 code = SEGV_MAPERR;
 419         else
 420                 code = SEGV_ACCERR;
 421         up_read(&current->mm->mmap_sem);
 422
 423         force_signal_inject(SIGSEGV, code, regs, addr);
 424 }
 425
 426 asmlinkage void __exception do_undefinstr(struct pt_regs *regs)
 427 {
 428         /* check for AArch32 breakpoint instructions */
 429         if (!aarch32_break_handler(regs))
 430                 return;
 431
 432         if (call_undef_hook(regs) == 0)
 433                 return;
 434
 435         force_signal_inject(SIGILL, ILL_ILLOPC, regs, 0);
 436 }
 437
 438 int cpu_enable_cache_maint_trap(void *__unused)
 439 {
 440         config_sctlr_el1(SCTLR_EL1_UCI, 0);
 441         return 0;
 442 }
 443
 444 #define __user_cache_maint(insn, address, res)                  \
 445         if (untagged_addr(address) >= user_addr_max()) {        \
 446                 res = -EFAULT;                                  \
 447         } else {                                                \
 448                 uaccess_ttbr0_enable();                         \
 449                 asm volatile (                                  \
 450                         "1:     " insn ", %1\n"                 \
 451                         "       mov     %w0, #0\n"              \
 452                         "2:\n"                                  \
 453                         "       .pushsection .fixup,\"ax\"\n"   \
 454                         "       .align  2\n"                    \
 455                         "3:     mov     %w0, %w2\n"             \
 456                         "       b       2b\n"                   \
 457                         "       .popsection\n"                  \
 458                         _ASM_EXTABLE(1b, 3b)                    \
 459                         : "=r" (res)                            \
 460                         : "r" (address), "i" (-EFAULT));        \
 461                 uaccess_ttbr0_disable();                        \
 462         }
 463
 464 static void user_cache_maint_handler(unsigned int esr, struct pt_regs *regs)
 465 {
 466         unsigned long address;
 467         int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
 468         int crm = (esr & ESR_ELx_SYS64_ISS_CRM_MASK) >> ESR_ELx_SYS64_ISS_CRM_SHIFT;
 469         int ret = 0;
 470
 471         address = pt_regs_read_reg(regs, rt);
 472
 473         switch (crm) {
 474         case ESR_ELx_SYS64_ISS_CRM_DC_CVAU:     /* DC CVAU, gets promoted */
 475                 __user_cache_maint("dc civac", address, ret);
 476                 break;
 477         case ESR_ELx_SYS64_ISS_CRM_DC_CVAC:     /* DC CVAC, gets promoted */
 478                 __user_cache_maint("dc civac", address, ret);
 479                 break;
 480         case ESR_ELx_SYS64_ISS_CRM_DC_CIVAC:    /* DC CIVAC */
 481                 __user_cache_maint("dc civac", address, ret);
 482                 break;
 483         case ESR_ELx_SYS64_ISS_CRM_IC_IVAU:     /* IC IVAU */
 484                 __user_cache_maint("ic ivau", address, ret);
 485                 break;
 486         default:
 487                 force_signal_inject(SIGILL, ILL_ILLOPC, regs, 0);
 488                 return;
 489         }
 490
 491         if (ret)
 492                 arm64_notify_segfault(regs, address);
 493         else
 494                 regs->pc += 4;
 495 }
 496
 497 static void ctr_read_handler(unsigned int esr, struct pt_regs *regs)
 498 {
 499         int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
 500         unsigned long val = arm64_ftr_reg_user_value(&arm64_ftr_reg_ctrel0);
 501
 502         pt_regs_write_reg(regs, rt, val);
 503
 504         regs->pc += 4;
 505 }
 506
 507 struct sys64_hook {
 508         unsigned int esr_mask;
 509         unsigned int esr_val;
 510         void (*handler)(unsigned int esr, struct pt_regs *regs);
 511 };
 512
 513 static struct sys64_hook sys64_hooks[] = {
 514         {
 515                 .esr_mask = ESR_ELx_SYS64_ISS_EL0_CACHE_OP_MASK,
 516                 .esr_val = ESR_ELx_SYS64_ISS_EL0_CACHE_OP_VAL,
 517                 .handler = user_cache_maint_handler,
 518         },
 519         {
 520                 /* Trap read access to CTR_EL0 */
 521                 .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK,
 522                 .esr_val = ESR_ELx_SYS64_ISS_SYS_CTR_READ,
 523                 .handler = ctr_read_handler,
 524         },
 525         {},
 526 };
 527
 528 asmlinkage void __exception do_sysinstr(unsigned int esr, struct pt_regs *regs)
 529 {
 530         struct sys64_hook *hook;
 531
 532         for (hook = sys64_hooks; hook->handler; hook++)
 533                 if ((hook->esr_mask & esr) == hook->esr_val) {
 534                         hook->handler(esr, regs);
 535                         return;
 536                 }
 537
 538         /*
 539          * New SYS instructions may previously have been undefined at EL0. Fall
 540          * back to our usual undefined instruction handler so that we handle
 541          * these consistently.
 542          */
 543         do_undefinstr(regs);
 544 }
 545
 546 long compat_arm_syscall(struct pt_regs *regs);
 547
 548 asmlinkage long do_ni_syscall(struct pt_regs *regs)
 549 {
 550 #ifdef CONFIG_COMPAT
 551         long ret;
 552         if (is_compat_task()) {
 553                 ret = compat_arm_syscall(regs);
 554                 if (ret != -ENOSYS)
 555                         return ret;
 556         }
 557 #endif
 558
 559         if (show_unhandled_signals_ratelimited()) {
 560                 pr_info("%s[%d]: syscall %d\n", current->comm,
 561                         task_pid_nr(current), (int)regs->syscallno);
 562                 dump_instr("", regs);
 563                 if (user_mode(regs))
 564                         __show_regs(regs);
 565         }
 566
 567         return sys_ni_syscall();
 568 }
 569
 570 static const char *esr_class_str[] = {
 571         [0 ... ESR_ELx_EC_MAX]          = "UNRECOGNIZED EC",
 572         [ESR_ELx_EC_UNKNOWN]            = "Unknown/Uncategorized",
 573         [ESR_ELx_EC_WFx]                = "WFI/WFE",
 574         [ESR_ELx_EC_CP15_32]            = "CP15 MCR/MRC",
 575         [ESR_ELx_EC_CP15_64]            = "CP15 MCRR/MRRC",
 576         [ESR_ELx_EC_CP14_MR]            = "CP14 MCR/MRC",
 577         [ESR_ELx_EC_CP14_LS]            = "CP14 LDC/STC",
 578         [ESR_ELx_EC_FP_ASIMD]           = "ASIMD",
 579         [ESR_ELx_EC_CP10_ID]            = "CP10 MRC/VMRS",
 580         [ESR_ELx_EC_CP14_64]            = "CP14 MCRR/MRRC",
 581         [ESR_ELx_EC_ILL]                = "PSTATE.IL",
 582         [ESR_ELx_EC_SVC32]              = "SVC (AArch32)",
 583         [ESR_ELx_EC_HVC32]              = "HVC (AArch32)",
 584         [ESR_ELx_EC_SMC32]              = "SMC (AArch32)",
 585         [ESR_ELx_EC_SVC64]              = "SVC (AArch64)",
 586         [ESR_ELx_EC_HVC64]              = "HVC (AArch64)",
 587         [ESR_ELx_EC_SMC64]              = "SMC (AArch64)",
 588         [ESR_ELx_EC_SYS64]              = "MSR/MRS (AArch64)",
 589         [ESR_ELx_EC_IMP_DEF]            = "EL3 IMP DEF",
 590         [ESR_ELx_EC_IABT_LOW]           = "IABT (lower EL)",
 591         [ESR_ELx_EC_IABT_CUR]           = "IABT (current EL)",
 592         [ESR_ELx_EC_PC_ALIGN]           = "PC Alignment",
 593         [ESR_ELx_EC_DABT_LOW]           = "DABT (lower EL)",
 594         [ESR_ELx_EC_DABT_CUR]           = "DABT (current EL)",
 595         [ESR_ELx_EC_SP_ALIGN]           = "SP Alignment",
 596         [ESR_ELx_EC_FP_EXC32]           = "FP (AArch32)",
 597         [ESR_ELx_EC_FP_EXC64]           = "FP (AArch64)",
 598         [ESR_ELx_EC_SERROR]             = "SError",
 599         [ESR_ELx_EC_BREAKPT_LOW]        = "Breakpoint (lower EL)",
 600         [ESR_ELx_EC_BREAKPT_CUR]        = "Breakpoint (current EL)",
 601         [ESR_ELx_EC_SOFTSTP_LOW]        = "Software Step (lower EL)",
 602         [ESR_ELx_EC_SOFTSTP_CUR]        = "Software Step (current EL)",
 603         [ESR_ELx_EC_WATCHPT_LOW]        = "Watchpoint (lower EL)",
 604         [ESR_ELx_EC_WATCHPT_CUR]        = "Watchpoint (current EL)",
 605         [ESR_ELx_EC_BKPT32]             = "BKPT (AArch32)",
 606         [ESR_ELx_EC_VECTOR32]           = "Vector catch (AArch32)",
 607         [ESR_ELx_EC_BRK64]              = "BRK (AArch64)",
 608 };
 609
 610 const char *esr_get_class_string(u32 esr)
 611 {
 612         return esr_class_str[ESR_ELx_EC(esr)];
 613 }
 614
 615 /*
 616  * bad_mode handles the impossible case in the exception vector. This is always
 617  * fatal.
 618  */
 619 asmlinkage void bad_mode(struct pt_regs *regs, int reason, unsigned int esr)
 620 {
 621         console_verbose();
 622
 623         pr_crit("Bad mode in %s handler detected on CPU%d, code 0x%08x -- %s\n",
 624                 handler[reason], smp_processor_id(), esr,
 625                 esr_get_class_string(esr));
 626
 627         die("Oops - bad mode", regs, 0);
 628         local_irq_disable();
 629         panic("bad mode");
 630 }
 631
 632 /*
 633  * bad_el0_sync handles unexpected, but potentially recoverable synchronous
 634  * exceptions taken from EL0. Unlike bad_mode, this returns.
 635  */
 636 asmlinkage void bad_el0_sync(struct pt_regs *regs, int reason, unsigned int esr)
 637 {
 638         siginfo_t info;
 639         void __user *pc = (void __user *)instruction_pointer(regs);
 640         console_verbose();
 641
 642         pr_crit("Bad EL0 synchronous exception detected on CPU%d, code 0x%08x -- %s\n",
 643                 smp_processor_id(), esr, esr_get_class_string(esr));
 644         __show_regs(regs);
 645
 646         info.si_signo = SIGILL;
 647         info.si_errno = 0;
 648         info.si_code  = ILL_ILLOPC;
 649         info.si_addr  = pc;
 650
 651         current->thread.fault_address = 0;
 652         current->thread.fault_code = 0;
 653
 654         force_sig_info(info.si_signo, &info, current);
 655 }
 656
 657 void __pte_error(const char *file, int line, unsigned long val)
 658 {
 659         pr_err("%s:%d: bad pte %016lx.\n", file, line, val);
 660 }
 661
 662 void __pmd_error(const char *file, int line, unsigned long val)
 663 {
 664         pr_err("%s:%d: bad pmd %016lx.\n", file, line, val);
 665 }
 666
 667 void __pud_error(const char *file, int line, unsigned long val)
 668 {
 669         pr_err("%s:%d: bad pud %016lx.\n", file, line, val);
 670 }
 671
 672 void __pgd_error(const char *file, int line, unsigned long val)
 673 {
 674         pr_err("%s:%d: bad pgd %016lx.\n", file, line, val);
 675 }
 676
 677 /* GENERIC_BUG traps */
 678
 679 int is_valid_bugaddr(unsigned long addr)
 680 {
 681         /*
 682          * bug_handler() only called for BRK #BUG_BRK_IMM.
 683          * So the answer is trivial -- any spurious instances with no
 684          * bug table entry will be rejected by report_bug() and passed
 685          * back to the debug-monitors code and handled as a fatal
 686          * unexpected debug exception.
 687          */
 688         return 1;
 689 }
 690
 691 static int bug_handler(struct pt_regs *regs, unsigned int esr)
 692 {
 693         if (user_mode(regs))
 694                 return DBG_HOOK_ERROR;
 695
 696         switch (report_bug(regs->pc, regs)) {
 697         case BUG_TRAP_TYPE_BUG:
 698                 die("Oops - BUG", regs, 0);
 699                 break;
 700
 701         case BUG_TRAP_TYPE_WARN:
 702                 /* Ideally, report_bug() should backtrace for us... but no. */
 703                 dump_backtrace(regs, NULL);
 704                 break;
 705
 706         default:
 707                 /* unknown/unrecognised bug trap type */
 708                 return DBG_HOOK_ERROR;
 709         }
 710
 711         /* If thread survives, skip over the BUG instruction and continue: */
 712         regs->pc += AARCH64_INSN_SIZE;  /* skip BRK and resume */
 713         return DBG_HOOK_HANDLED;
 714 }
 715
 716 static struct break_hook bug_break_hook = {
 717         .esr_val = 0xf2000000 | BUG_BRK_IMM,
 718         .esr_mask = 0xffffffff,
 719         .fn = bug_handler,
 720 };
 721
 722 /*
 723  * Initial handler for AArch64 BRK exceptions
 724  * This handler only used until debug_traps_init().
 725  */
 726 int __init early_brk64(unsigned long addr, unsigned int esr,
 727                 struct pt_regs *regs)
 728 {
 729         return bug_handler(regs, esr) != DBG_HOOK_HANDLED;
 730 }
 731
 732 /* This registration must happen early, before debug_traps_init(). */
 733 void __init trap_init(void)
 734 {
 735         register_break_hook(&bug_break_hook);
 736 }