1 // SPDX-License-Identifier: GPL-2.0-only
3 * Based on arch/arm/kernel/process.c
5 * Original Copyright (C) 1995 Linus Torvalds
6 * Copyright (C) 1996-2000 Russell King - Converted to ARM.
7 * Copyright (C) 2012 ARM Ltd.
12 #include <linux/compat.h>
13 #include <linux/efi.h>
14 #include <linux/export.h>
15 #include <linux/sched.h>
16 #include <linux/sched/debug.h>
17 #include <linux/sched/task.h>
18 #include <linux/sched/task_stack.h>
19 #include <linux/kernel.h>
21 #include <linux/stddef.h>
22 #include <linux/sysctl.h>
23 #include <linux/unistd.h>
24 #include <linux/user.h>
25 #include <linux/delay.h>
26 #include <linux/reboot.h>
27 #include <linux/interrupt.h>
28 #include <linux/init.h>
29 #include <linux/cpu.h>
30 #include <linux/elfcore.h>
32 #include <linux/tick.h>
33 #include <linux/utsname.h>
34 #include <linux/uaccess.h>
35 #include <linux/random.h>
36 #include <linux/hw_breakpoint.h>
37 #include <linux/personality.h>
38 #include <linux/notifier.h>
39 #include <trace/events/power.h>
40 #include <linux/percpu.h>
41 #include <linux/thread_info.h>
42 #include <linux/prctl.h>
44 #include <asm/alternative.h>
45 #include <asm/arch_gicv3.h>
46 #include <asm/compat.h>
47 #include <asm/cacheflush.h>
49 #include <asm/fpsimd.h>
50 #include <asm/mmu_context.h>
51 #include <asm/processor.h>
52 #include <asm/pointer_auth.h>
53 #include <asm/stacktrace.h>
55 #if defined(CONFIG_STACKPROTECTOR) && !defined(CONFIG_STACKPROTECTOR_PER_TASK)
56 #include <linux/stackprotector.h>
57 unsigned long __stack_chk_guard __read_mostly;
58 EXPORT_SYMBOL(__stack_chk_guard);
62 * Function pointers to optional machine specific functions
64 void (*pm_power_off)(void);
65 EXPORT_SYMBOL_GPL(pm_power_off);
67 void (*arm_pm_restart)(enum reboot_mode reboot_mode, const char *cmd);
69 static void __cpu_do_idle(void)
75 static void __cpu_do_idle_irqprio(void)
78 unsigned long daif_bits;
80 daif_bits = read_sysreg(daif);
81 write_sysreg(daif_bits | PSR_I_BIT, daif);
84 * Unmask PMR before going idle to make sure interrupts can
88 gic_write_pmr(GIC_PRIO_IRQON | GIC_PRIO_PSR_I_SET);
93 write_sysreg(daif_bits, daif);
99 * Idle the processor (wait for interrupt).
101 * If the CPU supports priority masking we must do additional work to
102 * ensure that interrupts are not masked at the PMR (because the core will
103 * not wake up if we block the wake up signal in the interrupt controller).
105 void cpu_do_idle(void)
107 if (system_uses_irq_prio_masking())
108 __cpu_do_idle_irqprio();
114 * This is our default idle handler.
116 void arch_cpu_idle(void)
119 * This should do all the clock switching and wait for interrupt
122 trace_cpu_idle_rcuidle(1, smp_processor_id());
125 trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
128 #ifdef CONFIG_HOTPLUG_CPU
129 void arch_cpu_idle_dead(void)
136 * Called by kexec, immediately prior to machine_kexec().
138 * This must completely disable all secondary CPUs; simply causing those CPUs
139 * to execute e.g. a RAM-based pin loop is not sufficient. This allows the
140 * kexec'd kernel to use any and all RAM as it sees fit, without having to
141 * avoid any code or data used by any SW CPU pin loop. The CPU hotplug
142 * functionality embodied in disable_nonboot_cpus() to achieve this.
144 void machine_shutdown(void)
146 disable_nonboot_cpus();
150 * Halting simply requires that the secondary CPUs stop performing any
151 * activity (executing tasks, handling interrupts). smp_send_stop()
154 void machine_halt(void)
162 * Power-off simply requires that the secondary CPUs stop performing any
163 * activity (executing tasks, handling interrupts). smp_send_stop()
164 * achieves this. When the system power is turned off, it will take all CPUs
167 void machine_power_off(void)
176 * Restart requires that the secondary CPUs stop performing any activity
177 * while the primary CPU resets the system. Systems with multiple CPUs must
178 * provide a HW restart implementation, to ensure that all CPUs reset at once.
179 * This is required so that any code running after reset on the primary CPU
180 * doesn't have to co-ordinate with other CPUs to ensure they aren't still
181 * executing pre-reset code, and using RAM that the primary CPU's code wishes
182 * to use. Implementing such co-ordination would be essentially impossible.
184 void machine_restart(char *cmd)
186 /* Disable interrupts first */
191 * UpdateCapsule() depends on the system being reset via
194 if (efi_enabled(EFI_RUNTIME_SERVICES))
195 efi_reboot(reboot_mode, NULL);
197 /* Now call the architecture specific reboot code. */
199 arm_pm_restart(reboot_mode, cmd);
201 do_kernel_restart(cmd);
204 * Whoops - the architecture was unable to reboot.
206 printk("Reboot failed -- System halted\n");
210 static void print_pstate(struct pt_regs *regs)
212 u64 pstate = regs->pstate;
214 if (compat_user_mode(regs)) {
215 printk("pstate: %08llx (%c%c%c%c %c %s %s %c%c%c)\n",
217 pstate & PSR_AA32_N_BIT ? 'N' : 'n',
218 pstate & PSR_AA32_Z_BIT ? 'Z' : 'z',
219 pstate & PSR_AA32_C_BIT ? 'C' : 'c',
220 pstate & PSR_AA32_V_BIT ? 'V' : 'v',
221 pstate & PSR_AA32_Q_BIT ? 'Q' : 'q',
222 pstate & PSR_AA32_T_BIT ? "T32" : "A32",
223 pstate & PSR_AA32_E_BIT ? "BE" : "LE",
224 pstate & PSR_AA32_A_BIT ? 'A' : 'a',
225 pstate & PSR_AA32_I_BIT ? 'I' : 'i',
226 pstate & PSR_AA32_F_BIT ? 'F' : 'f');
228 printk("pstate: %08llx (%c%c%c%c %c%c%c%c %cPAN %cUAO)\n",
230 pstate & PSR_N_BIT ? 'N' : 'n',
231 pstate & PSR_Z_BIT ? 'Z' : 'z',
232 pstate & PSR_C_BIT ? 'C' : 'c',
233 pstate & PSR_V_BIT ? 'V' : 'v',
234 pstate & PSR_D_BIT ? 'D' : 'd',
235 pstate & PSR_A_BIT ? 'A' : 'a',
236 pstate & PSR_I_BIT ? 'I' : 'i',
237 pstate & PSR_F_BIT ? 'F' : 'f',
238 pstate & PSR_PAN_BIT ? '+' : '-',
239 pstate & PSR_UAO_BIT ? '+' : '-');
243 void __show_regs(struct pt_regs *regs)
248 if (compat_user_mode(regs)) {
249 lr = regs->compat_lr;
250 sp = regs->compat_sp;
258 show_regs_print_info(KERN_DEFAULT);
261 if (!user_mode(regs)) {
262 printk("pc : %pS\n", (void *)regs->pc);
263 printk("lr : %pS\n", (void *)lr);
265 printk("pc : %016llx\n", regs->pc);
266 printk("lr : %016llx\n", lr);
269 printk("sp : %016llx\n", sp);
271 if (system_uses_irq_prio_masking())
272 printk("pmr_save: %08llx\n", regs->pmr_save);
277 printk("x%-2d: %016llx ", i, regs->regs[i]);
281 pr_cont("x%-2d: %016llx ", i, regs->regs[i]);
289 void show_regs(struct pt_regs * regs)
292 dump_backtrace(regs, NULL);
295 static void tls_thread_flush(void)
297 write_sysreg(0, tpidr_el0);
299 if (is_compat_task()) {
300 current->thread.uw.tp_value = 0;
303 * We need to ensure ordering between the shadow state and the
304 * hardware state, so that we don't corrupt the hardware state
305 * with a stale shadow state during context switch.
308 write_sysreg(0, tpidrro_el0);
312 static void flush_tagged_addr_state(void)
314 if (IS_ENABLED(CONFIG_ARM64_TAGGED_ADDR_ABI))
315 clear_thread_flag(TIF_TAGGED_ADDR);
318 void flush_thread(void)
320 fpsimd_flush_thread();
322 flush_ptrace_hw_breakpoint(current);
323 flush_tagged_addr_state();
326 void release_thread(struct task_struct *dead_task)
330 void arch_release_task_struct(struct task_struct *tsk)
332 fpsimd_release_task(tsk);
336 * src and dst may temporarily have aliased sve_state after task_struct
337 * is copied. We cannot fix this properly here, because src may have
338 * live SVE state and dst's thread_info may not exist yet, so tweaking
339 * either src's or dst's TIF_SVE is not safe.
341 * The unaliasing is done in copy_thread() instead. This works because
342 * dst is not schedulable or traceable until both of these functions
345 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
348 fpsimd_preserve_current_state();
354 asmlinkage void ret_from_fork(void) asm("ret_from_fork");
356 int copy_thread(unsigned long clone_flags, unsigned long stack_start,
357 unsigned long stk_sz, struct task_struct *p)
359 struct pt_regs *childregs = task_pt_regs(p);
361 memset(&p->thread.cpu_context, 0, sizeof(struct cpu_context));
364 * Unalias p->thread.sve_state (if any) from the parent task
365 * and disable discard SVE state for p:
367 clear_tsk_thread_flag(p, TIF_SVE);
368 p->thread.sve_state = NULL;
371 * In case p was allocated the same task_struct pointer as some
372 * other recently-exited task, make sure p is disassociated from
373 * any cpu that may have run that now-exited task recently.
374 * Otherwise we could erroneously skip reloading the FPSIMD
377 fpsimd_flush_task_state(p);
379 if (likely(!(p->flags & PF_KTHREAD))) {
380 *childregs = *current_pt_regs();
381 childregs->regs[0] = 0;
384 * Read the current TLS pointer from tpidr_el0 as it may be
385 * out-of-sync with the saved value.
387 *task_user_tls(p) = read_sysreg(tpidr_el0);
390 if (is_compat_thread(task_thread_info(p)))
391 childregs->compat_sp = stack_start;
393 childregs->sp = stack_start;
397 * If a TLS pointer was passed to clone (4th argument), use it
398 * for the new thread.
400 if (clone_flags & CLONE_SETTLS)
401 p->thread.uw.tp_value = childregs->regs[3];
403 memset(childregs, 0, sizeof(struct pt_regs));
404 childregs->pstate = PSR_MODE_EL1h;
405 if (IS_ENABLED(CONFIG_ARM64_UAO) &&
406 cpus_have_const_cap(ARM64_HAS_UAO))
407 childregs->pstate |= PSR_UAO_BIT;
409 if (arm64_get_ssbd_state() == ARM64_SSBD_FORCE_DISABLE)
410 set_ssbs_bit(childregs);
412 if (system_uses_irq_prio_masking())
413 childregs->pmr_save = GIC_PRIO_IRQON;
415 p->thread.cpu_context.x19 = stack_start;
416 p->thread.cpu_context.x20 = stk_sz;
418 p->thread.cpu_context.pc = (unsigned long)ret_from_fork;
419 p->thread.cpu_context.sp = (unsigned long)childregs;
421 ptrace_hw_copy_thread(p);
426 void tls_preserve_current_state(void)
428 *task_user_tls(current) = read_sysreg(tpidr_el0);
431 static void tls_thread_switch(struct task_struct *next)
433 tls_preserve_current_state();
435 if (is_compat_thread(task_thread_info(next)))
436 write_sysreg(next->thread.uw.tp_value, tpidrro_el0);
437 else if (!arm64_kernel_unmapped_at_el0())
438 write_sysreg(0, tpidrro_el0);
440 write_sysreg(*task_user_tls(next), tpidr_el0);
443 /* Restore the UAO state depending on next's addr_limit */
444 void uao_thread_switch(struct task_struct *next)
446 if (IS_ENABLED(CONFIG_ARM64_UAO)) {
447 if (task_thread_info(next)->addr_limit == KERNEL_DS)
448 asm(ALTERNATIVE("nop", SET_PSTATE_UAO(1), ARM64_HAS_UAO));
450 asm(ALTERNATIVE("nop", SET_PSTATE_UAO(0), ARM64_HAS_UAO));
455 * Force SSBS state on context-switch, since it may be lost after migrating
456 * from a CPU which treats the bit as RES0 in a heterogeneous system.
458 static void ssbs_thread_switch(struct task_struct *next)
460 struct pt_regs *regs = task_pt_regs(next);
463 * Nothing to do for kernel threads, but 'regs' may be junk
464 * (e.g. idle task) so check the flags and bail early.
466 if (unlikely(next->flags & PF_KTHREAD))
469 /* If the mitigation is enabled, then we leave SSBS clear. */
470 if ((arm64_get_ssbd_state() == ARM64_SSBD_FORCE_ENABLE) ||
471 test_tsk_thread_flag(next, TIF_SSBD))
474 if (compat_user_mode(regs))
475 set_compat_ssbs_bit(regs);
476 else if (user_mode(regs))
481 * We store our current task in sp_el0, which is clobbered by userspace. Keep a
482 * shadow copy so that we can restore this upon entry from userspace.
484 * This is *only* for exception entry from EL0, and is not valid until we
485 * __switch_to() a user task.
487 DEFINE_PER_CPU(struct task_struct *, __entry_task);
489 static void entry_task_switch(struct task_struct *next)
491 __this_cpu_write(__entry_task, next);
497 __notrace_funcgraph struct task_struct *__switch_to(struct task_struct *prev,
498 struct task_struct *next)
500 struct task_struct *last;
502 fpsimd_thread_switch(next);
503 tls_thread_switch(next);
504 hw_breakpoint_thread_switch(next);
505 contextidr_thread_switch(next);
506 entry_task_switch(next);
507 uao_thread_switch(next);
508 ptrauth_thread_switch(next);
509 ssbs_thread_switch(next);
512 * Complete any pending TLB or cache maintenance on this CPU in case
513 * the thread migrates to a different CPU.
514 * This full barrier is also required by the membarrier system
519 /* the actual thread switch */
520 last = cpu_switch_to(prev, next);
525 unsigned long get_wchan(struct task_struct *p)
527 struct stackframe frame;
528 unsigned long stack_page, ret = 0;
530 if (!p || p == current || p->state == TASK_RUNNING)
533 stack_page = (unsigned long)try_get_task_stack(p);
537 start_backtrace(&frame, thread_saved_fp(p), thread_saved_pc(p));
540 if (unwind_frame(p, &frame))
542 if (!in_sched_functions(frame.pc)) {
546 } while (count ++ < 16);
553 unsigned long arch_align_stack(unsigned long sp)
555 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
556 sp -= get_random_int() & ~PAGE_MASK;
560 unsigned long arch_randomize_brk(struct mm_struct *mm)
562 if (is_compat_task())
563 return randomize_page(mm->brk, SZ_32M);
565 return randomize_page(mm->brk, SZ_1G);
569 * Called from setup_new_exec() after (COMPAT_)SET_PERSONALITY.
571 void arch_setup_new_exec(void)
573 current->mm->context.flags = is_compat_task() ? MMCF_AARCH32 : 0;
575 ptrauth_thread_init_user(current);
578 #ifdef CONFIG_ARM64_TAGGED_ADDR_ABI
580 * Control the relaxed ABI allowing tagged user addresses into the kernel.
582 static unsigned int tagged_addr_disabled;
584 long set_tagged_addr_ctrl(unsigned long arg)
586 if (is_compat_task())
588 if (arg & ~PR_TAGGED_ADDR_ENABLE)
592 * Do not allow the enabling of the tagged address ABI if globally
593 * disabled via sysctl abi.tagged_addr_disabled.
595 if (arg & PR_TAGGED_ADDR_ENABLE && tagged_addr_disabled)
598 update_thread_flag(TIF_TAGGED_ADDR, arg & PR_TAGGED_ADDR_ENABLE);
603 long get_tagged_addr_ctrl(void)
605 if (is_compat_task())
608 if (test_thread_flag(TIF_TAGGED_ADDR))
609 return PR_TAGGED_ADDR_ENABLE;
615 * Global sysctl to disable the tagged user addresses support. This control
616 * only prevents the tagged address ABI enabling via prctl() and does not
617 * disable it for tasks that already opted in to the relaxed ABI.
622 static struct ctl_table tagged_addr_sysctl_table[] = {
624 .procname = "tagged_addr_disabled",
626 .data = &tagged_addr_disabled,
627 .maxlen = sizeof(int),
628 .proc_handler = proc_dointvec_minmax,
635 static int __init tagged_addr_init(void)
637 if (!register_sysctl("abi", tagged_addr_sysctl_table))
642 core_initcall(tagged_addr_init);
643 #endif /* CONFIG_ARM64_TAGGED_ADDR_ABI */