1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/soc/rockchip,vop2.h>
11 model = "Pine64 RK3566 SoQuartz SOM";
12 compatible = "pine64,soquartz", "rockchip,rk3566";
22 stdout-path = "serial2:1500000n8";
25 gmac1_clkin: external-gmac1-clock {
26 compatible = "fixed-clock";
27 clock-frequency = <125000000>;
28 clock-output-names = "gmac1_clkin";
33 compatible = "hdmi-connector";
37 hdmi_con_in: endpoint {
38 remote-endpoint = <&hdmi_out_con>;
44 compatible = "gpio-leds";
49 gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_LOW>;
50 linux,default-trigger = "heartbeat";
51 pinctrl-names = "default";
52 pinctrl-0 = <&diy_led_enable_h>;
53 retain-state-suspended;
59 default-state = "off";
60 gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>;
61 pinctrl-names = "default";
62 pinctrl-0 = <&work_led_enable_h>;
63 retain-state-suspended;
68 sdio_pwrseq: sdio-pwrseq {
70 compatible = "mmc-pwrseq-simple";
72 clock-names = "ext_clock";
73 pinctrl-names = "default";
74 pinctrl-0 = <&wifi_enable_h>;
75 reset-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_LOW>;
78 vbus: vbus-regulator {
79 compatible = "regulator-fixed";
80 regulator-name = "vbus";
83 regulator-min-microvolt = <5000000>;
84 regulator-max-microvolt = <5000000>;
87 /* sourced from vbus, vbus is provided by the carrier board */
88 vcc5v0_sys: vcc5v0-sys-regulator {
89 compatible = "regulator-fixed";
90 regulator-name = "vcc5v0_sys";
93 regulator-min-microvolt = <5000000>;
94 regulator-max-microvolt = <5000000>;
98 vcc3v3_sys: vcc3v3-sys-regulator {
99 compatible = "regulator-fixed";
100 regulator-name = "vcc3v3_sys";
103 regulator-min-microvolt = <3300000>;
104 regulator-max-microvolt = <3300000>;
105 vin-supply = <&vcc5v0_sys>;
110 cpu-supply = <&vdd_cpu>;
114 cpu-supply = <&vdd_cpu>;
118 cpu-supply = <&vdd_cpu>;
122 cpu-supply = <&vdd_cpu>;
126 assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;
127 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;
128 clock_in_out = "input";
129 phy-supply = <&vcc_3v3>;
131 pinctrl-names = "default";
132 pinctrl-0 = <&gmac1m0_miim
138 snps,reset-gpio = <&gpio0 RK_PC3 GPIO_ACTIVE_LOW>;
139 snps,reset-active-low;
140 /* Reset time is 20ms, 100ms for rtl8211f, also works well here */
141 snps,reset-delays-us = <0 20000 100000>;
144 phy-handle = <&rgmii_phy1>;
152 * GPIO_ACTIVE_LOW + output-low here means that the pin is set
153 * to high, because output-low decides the value pre-inversion.
155 gpios = <RK_PA5 GPIO_ACTIVE_LOW>;
156 line-name = "nEXTRST";
162 mali-supply = <&vdd_gpu>;
167 avdd-0v9-supply = <&vdda0v9_image>;
168 avdd-1v8-supply = <&vcca1v8_image>;
173 hdmi_in_vp0: endpoint {
174 remote-endpoint = <&vp0_out_hdmi>;
179 hdmi_out_con: endpoint {
180 remote-endpoint = <&hdmi_con_in>;
191 vdd_cpu: regulator@1c {
192 compatible = "tcs,tcs4525";
194 fcs,suspend-voltage-selector = <1>;
195 regulator-name = "vdd_cpu";
196 regulator-min-microvolt = <800000>;
197 regulator-max-microvolt = <1150000>;
198 regulator-ramp-delay = <2300>;
201 vin-supply = <&vcc5v0_sys>;
203 regulator-state-mem {
204 regulator-off-in-suspend;
209 compatible = "rockchip,rk809";
211 interrupt-parent = <&gpio0>;
212 interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
214 clock-output-names = "rk808-clkout1", "rk808-clkout2";
215 pinctrl-names = "default";
216 pinctrl-0 = <&pmic_int_l>;
217 rockchip,system-power-controller;
220 vcc1-supply = <&vcc3v3_sys>;
221 vcc2-supply = <&vcc3v3_sys>;
222 vcc3-supply = <&vcc3v3_sys>;
223 vcc4-supply = <&vcc3v3_sys>;
224 vcc5-supply = <&vcc3v3_sys>;
225 vcc6-supply = <&vcc3v3_sys>;
226 vcc7-supply = <&vcc3v3_sys>;
227 vcc8-supply = <&vcc3v3_sys>;
228 vcc9-supply = <&vcc3v3_sys>;
231 vdd_logic: DCDC_REG1 {
232 regulator-name = "vdd_logic";
235 regulator-min-microvolt = <500000>;
236 regulator-max-microvolt = <1350000>;
237 regulator-ramp-delay = <6001>;
238 regulator-initial-mode = <0x2>;
239 regulator-state-mem {
240 regulator-on-in-suspend;
241 regulator-suspend-microvolt = <900000>;
246 regulator-name = "vdd_gpu";
249 regulator-min-microvolt = <500000>;
250 regulator-max-microvolt = <1350000>;
251 regulator-ramp-delay = <6001>;
252 regulator-initial-mode = <0x2>;
253 regulator-state-mem {
254 regulator-off-in-suspend;
261 regulator-initial-mode = <0x2>;
262 regulator-name = "vcc_ddr";
263 regulator-state-mem {
264 regulator-on-in-suspend;
271 regulator-min-microvolt = <500000>;
272 regulator-max-microvolt = <1350000>;
273 regulator-initial-mode = <0x2>;
274 regulator-name = "vdd_npu";
275 regulator-state-mem {
276 regulator-off-in-suspend;
281 regulator-name = "vcc_1v8";
284 regulator-min-microvolt = <1800000>;
285 regulator-max-microvolt = <1800000>;
286 regulator-state-mem {
287 regulator-on-in-suspend;
288 regulator-suspend-microvolt = <1800000>;
292 vdda0v9_image: LDO_REG1 {
295 regulator-min-microvolt = <900000>;
296 regulator-max-microvolt = <900000>;
297 regulator-name = "vdda0v9_image";
298 regulator-state-mem {
299 regulator-on-in-suspend;
300 regulator-suspend-microvolt = <900000>;
307 regulator-min-microvolt = <900000>;
308 regulator-max-microvolt = <900000>;
309 regulator-name = "vdda_0v9";
310 regulator-state-mem {
311 regulator-off-in-suspend;
315 vdda0v9_pmu: LDO_REG3 {
318 regulator-min-microvolt = <900000>;
319 regulator-max-microvolt = <900000>;
320 regulator-name = "vdda0v9_pmu";
321 regulator-state-mem {
322 regulator-on-in-suspend;
323 regulator-suspend-microvolt = <900000>;
327 vccio_acodec: LDO_REG4 {
330 regulator-min-microvolt = <3300000>;
331 regulator-max-microvolt = <3300000>;
332 regulator-name = "vccio_acodec";
333 regulator-state-mem {
334 regulator-off-in-suspend;
341 regulator-min-microvolt = <1800000>;
342 regulator-max-microvolt = <3300000>;
343 regulator-name = "vccio_sd";
344 regulator-state-mem {
345 regulator-off-in-suspend;
349 vcc3v3_pmu: LDO_REG6 {
352 regulator-min-microvolt = <3300000>;
353 regulator-max-microvolt = <3300000>;
354 regulator-name = "vcc3v3_pmu";
355 regulator-state-mem {
356 regulator-on-in-suspend;
357 regulator-suspend-microvolt = <3300000>;
364 regulator-min-microvolt = <1800000>;
365 regulator-max-microvolt = <1800000>;
366 regulator-name = "vcca_1v8";
367 regulator-state-mem {
368 regulator-off-in-suspend;
372 vcca1v8_pmu: LDO_REG8 {
375 regulator-min-microvolt = <1800000>;
376 regulator-max-microvolt = <1800000>;
377 regulator-name = "vcca1v8_pmu";
378 regulator-state-mem {
379 regulator-off-in-suspend;
383 vcca1v8_image: LDO_REG9 {
386 regulator-min-microvolt = <1800000>;
387 regulator-max-microvolt = <1800000>;
388 regulator-name = "vcca1v8_image";
389 regulator-state-mem {
390 regulator-off-in-suspend;
394 vcc_3v3: SWITCH_REG1 {
395 regulator-name = "vcc_3v3";
396 regulator-state-mem {
397 regulator-off-in-suspend;
401 vcc3v3_sd: SWITCH_REG2 {
402 regulator-name = "vcc3v3_sd";
404 regulator-state-mem {
405 regulator-on-in-suspend;
414 * i2c1 is exposed on CM1 / Module1A
415 * pin 80 - i2c1_scl_m0, pullup to vcc3v3_pmu
416 * pin 82 - i2c1_sda_m0, pullup to vcc3v3_pmu
423 * i2c2 is exposed on CM1 / Module1A
424 * pin 56 - i2c2_scl_m1, pullup to vcc_3v3, shared with i2s1_8ch
425 * pin 58 - i2c2_sda_m1, pullup to vcc_3v3
428 pinctrl-names = "default";
429 pinctrl-0 = <&i2c2m1_xfer>;
434 * i2c3 is exposed on CM1 / Module1A
435 * pin 35 - i2c3_scl_m0, pullup to vcc_3v3
436 * pin 36 - i2c3_sda_m0, pullup to vcc_3v3
443 * i2c4 is exposed on CM2 / Module1B
444 * pin 45 - i2c4_scl_m1
445 * pin 47 - i2c4_sda_m1
448 pinctrl-names = "default";
449 pinctrl-0 = <&i2c4m1_xfer>;
458 * i2s1_8ch is exposed on CM1 / Module1A
459 * pin 24 - i2s1_sdi1_m1
460 * pin 25 - i2s1_sdo0_m1
461 * pin 26 - i2s1_lrck_tx_m1
462 * pin 27 - i2s1_sdi0_m1
463 * pin 29 - i2s1_sdi3_m1
464 * pin 30 - i2s1_sdi2_m1
465 * pin 40 - i2s1_sdo1_m1, shared with spi3
466 * pin 41 - i2s1_sdo2_m1
467 * pin 49 - i2s1_sclk_tx_m1
468 * pin 50 - i2s1_mclk_m1
469 * pin 56 - i2s1_sdo3_m1, shared with i2c2
472 pinctrl-names = "default";
473 pinctrl-0 = <&i2s1m1_sclktx &i2s1m1_sclkrx
474 &i2s1m1_lrcktx &i2s1m1_lrckrx
475 &i2s1m1_sdi0 &i2s1m1_sdi1
476 &i2s1m1_sdi2 &i2s1m1_sdi3
477 &i2s1m1_sdo0 &i2s1m1_sdo1
478 &i2s1m1_sdo2 &i2s1m1_sdo3>;
483 rgmii_phy1: ethernet-phy@0 {
484 compatible = "ethernet-phy-ieee802.3-c22";
491 pinctrl-names = "default";
492 pinctrl-0 = <&pcie_reset_h>;
493 reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
498 bt_enable_h: bt-enable-h {
499 rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
502 bt_host_wake_l: bt-host-wake-l {
503 rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_down>;
506 bt_wake_l: bt-wake-l {
507 rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
512 work_led_enable_h: work-led-enable-h {
513 rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
516 diy_led_enable_h: diy-led-enable-h {
517 rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
522 pcie_clkreq_h: pcie-clkreq-h {
523 rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
525 pcie_reset_h: pcie-reset-h {
526 rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
531 pmic_int_l: pmic-int-l {
532 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
537 wifi_enable_h: wifi-enable-h {
538 rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
544 pmuio1-supply = <&vcc3v3_pmu>;
545 pmuio2-supply = <&vcc3v3_pmu>;
546 vccio1-supply = <&vcc_3v3>;
547 vccio2-supply = <&vcc_1v8>;
548 vccio3-supply = <&vccio_sd>;
549 vccio4-supply = <&vcc_1v8>;
550 vccio5-supply = <&vcc_3v3>;
551 vccio6-supply = <&vcc_3v3>;
552 vccio7-supply = <&vcc_3v3>;
557 * saradc is exposed on CM1 / Module1A
558 * pin 94 - saradc_vin3
559 * pin 96 - saradc_vin2
562 vref-supply = <&vcca_1v8>;
570 vmmc-supply = <&vcc_3v3>;
571 vqmmc-supply = <&vcc_1v8>;
580 pinctrl-names = "default";
581 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
582 vqmmc-supply = <&vccio_sd>;
590 keep-power-in-suspend;
591 mmc-pwrseq = <&sdio_pwrseq>;
593 pinctrl-names = "default";
594 pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
596 vmmc-supply = <&vcc3v3_sys>;
597 vqmmc-supply = <&vcc_1v8>;
602 * spi3 is exposed on CM1 / Module1A
603 * pin 37 - spi3_cs1_m0
604 * pin 38 - spi3_clk_m0
605 * pin 39 - spi3_cs0_m0
606 * pin 40 - spi3_miso_m0, shared with i2s1_8ch
607 * pin 44 - spi3_mosi_m0
618 pinctrl-names = "default";
619 pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
624 compatible = "brcm,bcm43438-bt";
627 device-wakeup-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
628 host-wakeup-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
629 shutdown-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
630 pinctrl-names = "default";
631 pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
632 vbat-supply = <&vcc3v3_sys>;
633 vddio-supply = <&vcca1v8_pmu>;
638 * uart2 is exposed on CM1 / Module1A
639 * pin 51 - uart2_rx_m0
640 * pin 55 - uart2_tx_m0
647 * uart7 is exposed on CM1 / Module1A
648 * pin 46 - uart7_tx_m2
649 * pin 47 - uart7_rx_m2
652 pinctrl-names = "default";
653 pinctrl-0 = <&uart7m2_xfer>;
657 /* dwc3_otg is the only usb port available */
671 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
672 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
681 vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
682 reg = <ROCKCHIP_VOP2_EP_HDMI0>;
683 remote-endpoint = <&hdmi_in_vp0>;