1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2019 Akash Gajjar <Akash_Gajjar@mentor.com>
4 * Copyright (c) 2019 Pragnesh Patel <Pragnesh_Patel@mentor.com>
8 #include <dt-bindings/input/linux-event-codes.h>
9 #include <dt-bindings/pwm/pwm.h>
10 #include "rk3399.dtsi"
11 #include "rk3399-opp.dtsi"
20 stdout-path = "serial2:1500000n8";
23 clkin_gmac: external-gmac-clock {
24 compatible = "fixed-clock";
25 clock-frequency = <125000000>;
26 clock-output-names = "clkin_gmac";
30 sdio_pwrseq: sdio-pwrseq {
31 compatible = "mmc-pwrseq-simple";
33 clock-names = "ext_clock";
34 pinctrl-names = "default";
35 pinctrl-0 = <&wifi_enable_h>;
36 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
40 compatible = "audio-graph-card";
46 compatible = "audio-graph-card";
52 compatible = "linux,spdif-dit";
53 #sound-dai-cells = <0>;
57 remote-endpoint = <&spdif_p0_0>;
63 compatible = "regulator-fixed";
64 regulator-name = "vcc12v_dcin";
67 regulator-min-microvolt = <12000000>;
68 regulator-max-microvolt = <12000000>;
72 compatible = "regulator-fixed";
73 regulator-name = "vcc5v0_sys";
76 regulator-min-microvolt = <5000000>;
77 regulator-max-microvolt = <5000000>;
78 vin-supply = <&vcc12v_dcin>;
82 compatible = "regulator-fixed";
83 regulator-name = "vcc_0v9";
86 regulator-min-microvolt = <900000>;
87 regulator-max-microvolt = <900000>;
88 vin-supply = <&vcc3v3_sys>;
91 vcc3v3_pcie: vcc3v3-pcie-regulator {
92 compatible = "regulator-fixed";
94 gpio = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
95 pinctrl-names = "default";
96 pinctrl-0 = <&pcie_pwr_en>;
97 regulator-name = "vcc3v3_pcie";
100 vin-supply = <&vcc5v0_sys>;
103 vcc3v3_sys: vcc3v3-sys {
104 compatible = "regulator-fixed";
105 regulator-name = "vcc3v3_sys";
108 regulator-min-microvolt = <3300000>;
109 regulator-max-microvolt = <3300000>;
110 vin-supply = <&vcc5v0_sys>;
113 vcc5v0_host: vcc5v0-host-regulator {
114 compatible = "regulator-fixed";
116 gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
117 pinctrl-names = "default";
118 pinctrl-0 = <&vcc5v0_host_en>;
119 regulator-name = "vcc5v0_host";
121 vin-supply = <&vcc5v0_sys>;
124 vcc5v0_typec: vcc5v0-typec-regulator {
125 compatible = "regulator-fixed";
127 gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
128 pinctrl-names = "default";
129 pinctrl-0 = <&vcc5v0_typec_en>;
130 regulator-name = "vcc5v0_typec";
132 vin-supply = <&vcc5v0_sys>;
135 vcc_lan: vcc3v3-phy-regulator {
136 compatible = "regulator-fixed";
137 regulator-name = "vcc_lan";
140 regulator-min-microvolt = <3300000>;
141 regulator-max-microvolt = <3300000>;
145 compatible = "pwm-regulator";
146 pwms = <&pwm2 0 25000 1>;
147 regulator-name = "vdd_log";
150 regulator-min-microvolt = <800000>;
151 regulator-max-microvolt = <1400000>;
152 vin-supply = <&vcc5v0_sys>;
157 cpu-supply = <&vdd_cpu_l>;
161 cpu-supply = <&vdd_cpu_l>;
165 cpu-supply = <&vdd_cpu_l>;
169 cpu-supply = <&vdd_cpu_l>;
173 cpu-supply = <&vdd_cpu_b>;
177 cpu-supply = <&vdd_cpu_b>;
185 assigned-clocks = <&cru SCLK_RMII_SRC>;
186 assigned-clock-parents = <&clkin_gmac>;
187 clock_in_out = "input";
188 phy-supply = <&vcc_lan>;
190 pinctrl-names = "default";
191 pinctrl-0 = <&rgmii_pins>;
192 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
193 snps,reset-active-low;
194 snps,reset-delays-us = <0 10000 50000>;
201 mali-supply = <&vdd_gpu>;
206 ddc-i2c-bus = <&i2c3>;
207 pinctrl-names = "default";
208 pinctrl-0 = <&hdmi_cec>;
217 clock-frequency = <400000>;
218 i2c-scl-rising-time-ns = <168>;
219 i2c-scl-falling-time-ns = <4>;
223 compatible = "rockchip,rk808";
225 interrupt-parent = <&gpio1>;
226 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
228 clock-output-names = "xin32k", "rk808-clkout2";
229 pinctrl-names = "default";
230 pinctrl-0 = <&pmic_int_l>;
231 rockchip,system-power-controller;
234 vcc1-supply = <&vcc5v0_sys>;
235 vcc2-supply = <&vcc5v0_sys>;
236 vcc3-supply = <&vcc5v0_sys>;
237 vcc4-supply = <&vcc5v0_sys>;
238 vcc6-supply = <&vcc5v0_sys>;
239 vcc7-supply = <&vcc5v0_sys>;
240 vcc8-supply = <&vcc3v3_sys>;
241 vcc9-supply = <&vcc5v0_sys>;
242 vcc10-supply = <&vcc5v0_sys>;
243 vcc11-supply = <&vcc5v0_sys>;
244 vcc12-supply = <&vcc3v3_sys>;
245 vddio-supply = <&vcc_1v8>;
248 vdd_center: DCDC_REG1 {
249 regulator-name = "vdd_center";
252 regulator-min-microvolt = <750000>;
253 regulator-max-microvolt = <1350000>;
254 regulator-ramp-delay = <6001>;
255 regulator-state-mem {
256 regulator-off-in-suspend;
260 vdd_cpu_l: DCDC_REG2 {
261 regulator-name = "vdd_cpu_l";
264 regulator-min-microvolt = <750000>;
265 regulator-max-microvolt = <1350000>;
266 regulator-ramp-delay = <6001>;
267 regulator-state-mem {
268 regulator-off-in-suspend;
273 regulator-name = "vcc_ddr";
276 regulator-state-mem {
277 regulator-on-in-suspend;
282 regulator-name = "vcc_1v8";
285 regulator-min-microvolt = <1800000>;
286 regulator-max-microvolt = <1800000>;
287 regulator-state-mem {
288 regulator-on-in-suspend;
289 regulator-suspend-microvolt = <1800000>;
293 vcc1v8_codec: LDO_REG1 {
294 regulator-name = "vcc1v8_codec";
297 regulator-min-microvolt = <1800000>;
298 regulator-max-microvolt = <1800000>;
299 regulator-state-mem {
300 regulator-off-in-suspend;
304 vcc1v8_hdmi: LDO_REG2 {
305 regulator-name = "vcc1v8_hdmi";
308 regulator-min-microvolt = <1800000>;
309 regulator-max-microvolt = <1800000>;
310 regulator-state-mem {
311 regulator-off-in-suspend;
316 regulator-name = "vcca_1v8";
319 regulator-min-microvolt = <1800000>;
320 regulator-max-microvolt = <1800000>;
321 regulator-state-mem {
322 regulator-on-in-suspend;
323 regulator-suspend-microvolt = <1800000>;
328 regulator-name = "vcc_sdio";
331 regulator-min-microvolt = <3000000>;
332 regulator-max-microvolt = <3000000>;
333 regulator-state-mem {
334 regulator-on-in-suspend;
335 regulator-suspend-microvolt = <3000000>;
339 vcca3v0_codec: LDO_REG5 {
340 regulator-name = "vcca3v0_codec";
343 regulator-min-microvolt = <3000000>;
344 regulator-max-microvolt = <3000000>;
345 regulator-state-mem {
346 regulator-off-in-suspend;
351 regulator-name = "vcc_1v5";
354 regulator-min-microvolt = <1500000>;
355 regulator-max-microvolt = <1500000>;
356 regulator-state-mem {
357 regulator-on-in-suspend;
358 regulator-suspend-microvolt = <1500000>;
362 vcc0v9_hdmi: LDO_REG7 {
363 regulator-name = "vcc0v9_hdmi";
366 regulator-min-microvolt = <900000>;
367 regulator-max-microvolt = <900000>;
368 regulator-state-mem {
369 regulator-off-in-suspend;
374 regulator-name = "vcc_3v0";
377 regulator-min-microvolt = <3000000>;
378 regulator-max-microvolt = <3000000>;
379 regulator-state-mem {
380 regulator-on-in-suspend;
381 regulator-suspend-microvolt = <3000000>;
385 vcc_cam: SWITCH_REG1 {
386 regulator-name = "vcc_cam";
389 regulator-state-mem {
390 regulator-off-in-suspend;
394 vcc_mipi: SWITCH_REG2 {
395 regulator-name = "vcc_mipi";
398 regulator-state-mem {
399 regulator-off-in-suspend;
405 vdd_cpu_b: regulator@40 {
406 compatible = "silergy,syr827";
408 fcs,suspend-voltage-selector = <1>;
409 pinctrl-names = "default";
410 pinctrl-0 = <&vsel1_pin>;
411 regulator-name = "vdd_cpu_b";
412 regulator-min-microvolt = <712500>;
413 regulator-max-microvolt = <1500000>;
414 regulator-ramp-delay = <1000>;
417 vin-supply = <&vcc5v0_sys>;
419 regulator-state-mem {
420 regulator-off-in-suspend;
424 vdd_gpu: regulator@41 {
425 compatible = "silergy,syr828";
427 fcs,suspend-voltage-selector = <1>;
428 pinctrl-names = "default";
429 pinctrl-0 = <&vsel2_pin>;
430 regulator-name = "vdd_gpu";
431 regulator-min-microvolt = <712500>;
432 regulator-max-microvolt = <1500000>;
433 regulator-ramp-delay = <1000>;
436 vin-supply = <&vcc5v0_sys>;
438 regulator-state-mem {
439 regulator-off-in-suspend;
445 i2c-scl-rising-time-ns = <300>;
446 i2c-scl-falling-time-ns = <15>;
450 compatible = "everest,es8316";
452 clocks = <&cru SCLK_I2S_8CH_OUT>;
453 clock-names = "mclk";
454 #sound-dai-cells = <0>;
457 es8316_p0_0: endpoint {
458 remote-endpoint = <&i2s0_p0_0>;
465 i2c-scl-rising-time-ns = <450>;
466 i2c-scl-falling-time-ns = <15>;
471 i2c-scl-rising-time-ns = <600>;
472 i2c-scl-falling-time-ns = <20>;
477 pinctrl-0 = <&i2s0_2ch_bus>;
478 rockchip,capture-channels = <2>;
479 rockchip,playback-channels = <2>;
483 i2s0_p0_0: endpoint {
486 remote-endpoint = <&es8316_p0_0>;
492 rockchip,playback-channels = <2>;
493 rockchip,capture-channels = <2>;
504 bt656-supply = <&vcc_3v0>;
505 audio-supply = <&vcc_3v0>;
506 sdmmc-supply = <&vcc_sdio>;
507 gpio1830-supply = <&vcc_3v0>;
513 pmu1830-supply = <&vcc_3v0>;
521 ep-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>;
523 pinctrl-0 = <&pcie_clkreqnb_cpm>;
524 pinctrl-names = "default";
525 vpcie0v9-supply = <&vcc_0v9>;
526 vpcie1v8-supply = <&vcc_1v8>;
527 vpcie3v3-supply = <&vcc3v3_pcie>;
533 bt_enable_h: bt-enable-h {
534 rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
537 bt_host_wake_l: bt-host-wake-l {
538 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
541 bt_wake_l: bt-wake-l {
542 rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
547 pcie_pwr_en: pcie-pwr-en {
548 rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
553 sdio0_bus4: sdio0-bus4 {
554 rockchip,pins = <2 RK_PC4 1 &pcfg_pull_up_20ma>,
555 <2 RK_PC5 1 &pcfg_pull_up_20ma>,
556 <2 RK_PC6 1 &pcfg_pull_up_20ma>,
557 <2 RK_PC7 1 &pcfg_pull_up_20ma>;
560 sdio0_cmd: sdio0-cmd {
561 rockchip,pins = <2 RK_PD0 1 &pcfg_pull_up_20ma>;
564 sdio0_clk: sdio0-clk {
565 rockchip,pins = <2 RK_PD1 1 &pcfg_pull_none_20ma>;
570 pmic_int_l: pmic-int-l {
571 rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
574 vsel1_pin: vsel1-pin {
575 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
578 vsel2_pin: vsel2-pin {
579 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
584 vcc5v0_typec_en: vcc5v0-typec-en {
585 rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
590 vcc5v0_host_en: vcc5v0-host-en {
591 rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
596 wifi_enable_h: wifi-enable-h {
597 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
600 wifi_host_wake_l: wifi-host-wake-l {
601 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
613 vref-supply = <&vcc_1v8>;
617 #address-cells = <1>;
620 clock-frequency = <50000000>;
623 keep-power-in-suspend;
624 mmc-pwrseq = <&sdio_pwrseq>;
626 pinctrl-names = "default";
627 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
635 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
637 max-frequency = <150000000>;
638 pinctrl-names = "default";
639 pinctrl-0 = <&sdmmc_clk &sdmmc_cd &sdmmc_cmd &sdmmc_bus4>;
646 mmc-hs400-enhanced-strobe;
654 spdif_p0_0: endpoint {
655 remote-endpoint = <&dit_p0_0>;
671 /* tshut mode 0:CRU 1:GPIO */
672 rockchip,hw-tshut-mode = <1>;
673 /* tshut polarity 0:LOW 1:HIGH */
674 rockchip,hw-tshut-polarity = <1>;
680 u2phy0_otg: otg-port {
684 u2phy0_host: host-port {
685 phy-supply = <&vcc5v0_host>;
693 u2phy1_otg: otg-port {
697 u2phy1_host: host-port {
698 phy-supply = <&vcc5v0_host>;
704 pinctrl-names = "default";
705 pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;