1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the common parts shared by the White Hawk CPU and
4 * White Hawk Single boards
6 * Copyright (C) 2022 Renesas Electronics Corp.
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
20 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
21 stdout-path = "serial0:921600n8";
24 sn65dsi86_refclk: clk-x6 {
25 compatible = "fixed-clock";
27 clock-frequency = <38400000>;
31 compatible = "gpio-keys";
33 pinctrl-0 = <&keys_pins>;
34 pinctrl-names = "default";
37 gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
41 debounce-interval = <20>;
45 gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
49 debounce-interval = <20>;
53 gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
57 debounce-interval = <20>;
62 compatible = "gpio-leds";
65 gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
66 color = <LED_COLOR_ID_GREEN>;
67 function = LED_FUNCTION_INDICATOR;
68 function-enumerator = <1>;
72 gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
73 color = <LED_COLOR_ID_GREEN>;
74 function = LED_FUNCTION_INDICATOR;
75 function-enumerator = <2>;
79 gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
80 color = <LED_COLOR_ID_GREEN>;
81 function = LED_FUNCTION_INDICATOR;
82 function-enumerator = <3>;
87 device_type = "memory";
88 /* first 128MB is reserved for secure area. */
89 reg = <0x0 0x48000000 0x0 0x78000000>;
93 device_type = "memory";
94 reg = <0x4 0x80000000 0x0 0x80000000>;
98 device_type = "memory";
99 reg = <0x6 0x00000000 0x1 0x00000000>;
103 compatible = "dp-connector";
108 mini_dp_con_in: endpoint {
109 remote-endpoint = <&sn65dsi86_out>;
114 reg_1p2v: regulator-1p2v {
115 compatible = "regulator-fixed";
116 regulator-name = "fixed-1.2V";
117 regulator-min-microvolt = <1200000>;
118 regulator-max-microvolt = <1200000>;
123 reg_1p8v: regulator-1p8v {
124 compatible = "regulator-fixed";
125 regulator-name = "fixed-1.8V";
126 regulator-min-microvolt = <1800000>;
127 regulator-max-microvolt = <1800000>;
132 reg_3p3v: regulator-3p3v {
133 compatible = "regulator-fixed";
134 regulator-name = "fixed-3.3V";
135 regulator-min-microvolt = <3300000>;
136 regulator-max-microvolt = <3300000>;
143 pinctrl-0 = <&avb0_pins>;
144 pinctrl-names = "default";
145 phy-handle = <&phy0>;
146 tx-internal-delay-ps = <2000>;
149 phy0: ethernet-phy@0 {
150 compatible = "ethernet-phy-id0022.1622",
151 "ethernet-phy-ieee802.3-c22";
152 rxc-skew-ps = <1500>;
154 interrupt-parent = <&gpio7>;
155 interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
156 reset-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>;
166 remote-endpoint = <&sn65dsi86_in>;
167 data-lanes = <1 2 3 4>;
178 clock-frequency = <16666666>;
182 clock-frequency = <32768>;
186 pinctrl-0 = <&hscif0_pins>;
187 pinctrl-names = "default";
193 pinctrl-0 = <&i2c0_pins>;
194 pinctrl-names = "default";
197 clock-frequency = <400000>;
199 io_expander_a: gpio@20 {
200 compatible = "onnn,pca9654";
202 interrupt-parent = <&gpio0>;
203 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
206 interrupt-controller;
207 #interrupt-cells = <2>;
211 compatible = "rohm,br24g01", "atmel,24c01";
219 pinctrl-0 = <&i2c1_pins>;
220 pinctrl-names = "default";
223 clock-frequency = <400000>;
226 compatible = "ti,sn65dsi86";
229 clocks = <&sn65dsi86_refclk>;
230 clock-names = "refclk";
232 interrupt-parent = <&intc_ex>;
233 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
235 enable-gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
237 vccio-supply = <®_1p8v>;
238 vpll-supply = <®_1p8v>;
239 vcca-supply = <®_1p2v>;
240 vcc-supply = <®_1p2v>;
243 #address-cells = <1>;
248 sn65dsi86_in: endpoint {
249 remote-endpoint = <&dsi0_out>;
255 sn65dsi86_out: endpoint {
256 remote-endpoint = <&mini_dp_con_in>;
264 pinctrl-0 = <&mmc_pins>;
265 pinctrl-1 = <&mmc_pins>;
266 pinctrl-names = "default", "state_uhs";
268 vmmc-supply = <®_3p3v>;
269 vqmmc-supply = <®_1p8v>;
276 full-pwr-cycle-in-suspend;
281 pinctrl-0 = <&scif_clk_pins>;
282 pinctrl-names = "default";
286 groups = "avb0_link", "avb0_mdio", "avb0_rgmii",
292 groups = "avb0_mdio";
293 drive-strength = <21>;
297 groups = "avb0_rgmii";
298 drive-strength = <21>;
303 hscif0_pins: hscif0 {
304 groups = "hscif0_data";
319 pins = "GP_5_0", "GP_5_1", "GP_5_2";
324 groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
326 power-source = <1800>;
330 groups = "qspi0_ctrl", "qspi0_data4";
334 scif_clk_pins: scif_clk {
336 function = "scif_clk";
341 pinctrl-0 = <&qspi0_pins>;
342 pinctrl-names = "default";
347 compatible = "spansion,s25fs512s", "jedec,spi-nor";
349 spi-max-frequency = <40000000>;
350 spi-rx-bus-width = <4>;
353 compatible = "fixed-partitions";
354 #address-cells = <1>;
358 reg = <0x0 0x1200000>;
362 reg = <0x1200000 0x2e00000>;
374 clock-frequency = <24000000>;