1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the White Hawk CPU board
5 * Copyright (C) 2022 Renesas Electronics Corp.
8 #include "r8a779g0.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/leds/common.h>
15 model = "Renesas White Hawk CPU board";
16 compatible = "renesas,white-hawk-cpu", "renesas,r8a779g0";
24 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
25 stdout-path = "serial0:921600n8";
29 compatible = "gpio-keys";
31 pinctrl-0 = <&keys_pins>;
32 pinctrl-names = "default";
35 gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
39 debounce-interval = <20>;
43 gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
47 debounce-interval = <20>;
51 gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
55 debounce-interval = <20>;
60 compatible = "gpio-leds";
63 gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
64 color = <LED_COLOR_ID_GREEN>;
65 function = LED_FUNCTION_INDICATOR;
66 function-enumerator = <1>;
70 gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
71 color = <LED_COLOR_ID_GREEN>;
72 function = LED_FUNCTION_INDICATOR;
73 function-enumerator = <2>;
77 gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
78 color = <LED_COLOR_ID_GREEN>;
79 function = LED_FUNCTION_INDICATOR;
80 function-enumerator = <3>;
85 device_type = "memory";
86 /* first 128MB is reserved for secure area. */
87 reg = <0x0 0x48000000 0x0 0x78000000>;
91 device_type = "memory";
92 reg = <0x4 0x80000000 0x0 0x80000000>;
96 device_type = "memory";
97 reg = <0x6 0x00000000 0x1 0x00000000>;
101 compatible = "dp-connector";
106 mini_dp_con_in: endpoint {
107 remote-endpoint = <&sn65dsi86_out>;
112 reg_1p2v: regulator-1p2v {
113 compatible = "regulator-fixed";
114 regulator-name = "fixed-1.2V";
115 regulator-min-microvolt = <1200000>;
116 regulator-max-microvolt = <1200000>;
121 reg_1p8v: regulator-1p8v {
122 compatible = "regulator-fixed";
123 regulator-name = "fixed-1.8V";
124 regulator-min-microvolt = <1800000>;
125 regulator-max-microvolt = <1800000>;
130 reg_3p3v: regulator-3p3v {
131 compatible = "regulator-fixed";
132 regulator-name = "fixed-3.3V";
133 regulator-min-microvolt = <3300000>;
134 regulator-max-microvolt = <3300000>;
139 sn65dsi86_refclk: clk-x6 {
140 compatible = "fixed-clock";
142 clock-frequency = <38400000>;
147 pinctrl-0 = <&avb0_pins>;
148 pinctrl-names = "default";
149 phy-handle = <&phy0>;
150 tx-internal-delay-ps = <2000>;
153 phy0: ethernet-phy@0 {
154 compatible = "ethernet-phy-id0022.1622",
155 "ethernet-phy-ieee802.3-c22";
156 rxc-skew-ps = <1500>;
158 interrupt-parent = <&gpio7>;
159 interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
160 reset-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>;
170 remote-endpoint = <&sn65dsi86_in>;
171 data-lanes = <1 2 3 4>;
182 clock-frequency = <16666666>;
186 clock-frequency = <32768>;
190 pinctrl-0 = <&hscif0_pins>;
191 pinctrl-names = "default";
197 pinctrl-0 = <&i2c0_pins>;
198 pinctrl-names = "default";
201 clock-frequency = <400000>;
203 io_expander_a: gpio@20 {
204 compatible = "onnn,pca9654";
206 interrupt-parent = <&gpio0>;
207 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
210 interrupt-controller;
211 #interrupt-cells = <2>;
215 compatible = "rohm,br24g01", "atmel,24c01";
223 pinctrl-0 = <&i2c1_pins>;
224 pinctrl-names = "default";
227 clock-frequency = <400000>;
230 compatible = "ti,sn65dsi86";
233 clocks = <&sn65dsi86_refclk>;
234 clock-names = "refclk";
236 interrupt-parent = <&intc_ex>;
237 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
239 enable-gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
241 vccio-supply = <®_1p8v>;
242 vpll-supply = <®_1p8v>;
243 vcca-supply = <®_1p2v>;
244 vcc-supply = <®_1p2v>;
247 #address-cells = <1>;
252 sn65dsi86_in: endpoint {
253 remote-endpoint = <&dsi0_out>;
259 sn65dsi86_out: endpoint {
260 remote-endpoint = <&mini_dp_con_in>;
268 pinctrl-0 = <&mmc_pins>;
269 pinctrl-1 = <&mmc_pins>;
270 pinctrl-names = "default", "state_uhs";
272 vmmc-supply = <®_3p3v>;
273 vqmmc-supply = <®_1p8v>;
280 full-pwr-cycle-in-suspend;
285 pinctrl-0 = <&scif_clk_pins>;
286 pinctrl-names = "default";
290 groups = "avb0_link", "avb0_mdio", "avb0_rgmii",
296 groups = "avb0_mdio";
297 drive-strength = <21>;
301 groups = "avb0_rgmii";
302 drive-strength = <21>;
306 hscif0_pins: hscif0 {
307 groups = "hscif0_data";
322 pins = "GP_5_0", "GP_5_1", "GP_5_2";
327 groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
329 power-source = <1800>;
333 groups = "qspi0_ctrl", "qspi0_data4";
337 scif_clk_pins: scif_clk {
339 function = "scif_clk";
344 pinctrl-0 = <&qspi0_pins>;
345 pinctrl-names = "default";
350 compatible = "spansion,s25fs512s", "jedec,spi-nor";
352 spi-max-frequency = <40000000>;
353 spi-rx-bus-width = <4>;
356 compatible = "fixed-partitions";
357 #address-cells = <1>;
361 reg = <0x0 0x1200000>;
365 reg = <0x1200000 0x2e00000>;
377 clock-frequency = <24000000>;