1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car V3H (R8A77980) SoC
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 * Copyright (C) 2018 Cogent Embedded, Inc.
9 #include <dt-bindings/clock/r8a77980-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/power/r8a77980-sysc.h>
15 compatible = "renesas,r8a77980";
28 /* External CAN clock - to be overridden by boards that provide it */
30 compatible = "fixed-clock";
32 clock-frequency = <0>;
41 compatible = "arm,cortex-a53";
43 clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
44 power-domains = <&sysc R8A77980_PD_CA53_CPU0>;
45 next-level-cache = <&L2_CA53>;
46 enable-method = "psci";
51 compatible = "arm,cortex-a53";
53 clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
54 power-domains = <&sysc R8A77980_PD_CA53_CPU1>;
55 next-level-cache = <&L2_CA53>;
56 enable-method = "psci";
61 compatible = "arm,cortex-a53";
63 clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
64 power-domains = <&sysc R8A77980_PD_CA53_CPU2>;
65 next-level-cache = <&L2_CA53>;
66 enable-method = "psci";
71 compatible = "arm,cortex-a53";
73 clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
74 power-domains = <&sysc R8A77980_PD_CA53_CPU3>;
75 next-level-cache = <&L2_CA53>;
76 enable-method = "psci";
79 L2_CA53: cache-controller {
81 power-domains = <&sysc R8A77980_PD_CA53_SCU>;
88 compatible = "fixed-clock";
90 /* This value must be overridden by the board */
91 clock-frequency = <0>;
95 compatible = "fixed-clock";
97 /* This value must be overridden by the board */
98 clock-frequency = <0>;
101 /* External PCIe clock - can be overridden by the board */
102 pcie_bus_clk: pcie_bus {
103 compatible = "fixed-clock";
105 clock-frequency = <0>;
109 compatible = "arm,cortex-a53-pmu";
110 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
111 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
112 <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
113 <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
114 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
118 compatible = "arm,psci-1.0", "arm,psci-0.2";
122 /* External SCIF clock - to be overridden by boards that provide it */
124 compatible = "fixed-clock";
126 clock-frequency = <0>;
130 compatible = "simple-bus";
131 interrupt-parent = <&gic>;
133 #address-cells = <2>;
137 rwdt: watchdog@e6020000 {
138 compatible = "renesas,r8a77980-wdt",
139 "renesas,rcar-gen3-wdt";
140 reg = <0 0xe6020000 0 0x0c>;
141 clocks = <&cpg CPG_MOD 402>;
142 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
147 gpio0: gpio@e6050000 {
148 compatible = "renesas,gpio-r8a77980",
149 "renesas,rcar-gen3-gpio";
150 reg = <0 0xe6050000 0 0x50>;
151 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
154 gpio-ranges = <&pfc 0 0 22>;
155 #interrupt-cells = <2>;
156 interrupt-controller;
157 clocks = <&cpg CPG_MOD 912>;
158 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
162 gpio1: gpio@e6051000 {
163 compatible = "renesas,gpio-r8a77980",
164 "renesas,rcar-gen3-gpio";
165 reg = <0 0xe6051000 0 0x50>;
166 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
169 gpio-ranges = <&pfc 0 32 28>;
170 #interrupt-cells = <2>;
171 interrupt-controller;
172 clocks = <&cpg CPG_MOD 911>;
173 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
177 gpio2: gpio@e6052000 {
178 compatible = "renesas,gpio-r8a77980",
179 "renesas,rcar-gen3-gpio";
180 reg = <0 0xe6052000 0 0x50>;
181 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
184 gpio-ranges = <&pfc 0 64 30>;
185 #interrupt-cells = <2>;
186 interrupt-controller;
187 clocks = <&cpg CPG_MOD 910>;
188 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
192 gpio3: gpio@e6053000 {
193 compatible = "renesas,gpio-r8a77980",
194 "renesas,rcar-gen3-gpio";
195 reg = <0 0xe6053000 0 0x50>;
196 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
199 gpio-ranges = <&pfc 0 96 17>;
200 #interrupt-cells = <2>;
201 interrupt-controller;
202 clocks = <&cpg CPG_MOD 909>;
203 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
207 gpio4: gpio@e6054000 {
208 compatible = "renesas,gpio-r8a77980",
209 "renesas,rcar-gen3-gpio";
210 reg = <0 0xe6054000 0 0x50>;
211 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
214 gpio-ranges = <&pfc 0 128 25>;
215 #interrupt-cells = <2>;
216 interrupt-controller;
217 clocks = <&cpg CPG_MOD 908>;
218 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
222 gpio5: gpio@e6055000 {
223 compatible = "renesas,gpio-r8a77980",
224 "renesas,rcar-gen3-gpio";
225 reg = <0 0xe6055000 0 0x50>;
226 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
229 gpio-ranges = <&pfc 0 160 15>;
230 #interrupt-cells = <2>;
231 interrupt-controller;
232 clocks = <&cpg CPG_MOD 907>;
233 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
237 pfc: pinctrl@e6060000 {
238 compatible = "renesas,pfc-r8a77980";
239 reg = <0 0xe6060000 0 0x50c>;
242 cmt0: timer@e60f0000 {
243 compatible = "renesas,r8a77980-cmt0",
244 "renesas,rcar-gen3-cmt0";
245 reg = <0 0xe60f0000 0 0x1004>;
246 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
247 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
248 clocks = <&cpg CPG_MOD 303>;
250 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
255 cmt1: timer@e6130000 {
256 compatible = "renesas,r8a77980-cmt1",
257 "renesas,rcar-gen3-cmt1";
258 reg = <0 0xe6130000 0 0x1004>;
259 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
260 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
261 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
262 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
263 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
264 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
265 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
266 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
267 clocks = <&cpg CPG_MOD 302>;
269 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
274 cmt2: timer@e6140000 {
275 compatible = "renesas,r8a77980-cmt1",
276 "renesas,rcar-gen3-cmt1";
277 reg = <0 0xe6140000 0 0x1004>;
278 interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>,
279 <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
280 <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
281 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>,
282 <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
283 <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,
284 <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
285 <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
286 clocks = <&cpg CPG_MOD 301>;
288 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
293 cmt3: timer@e6148000 {
294 compatible = "renesas,r8a77980-cmt1",
295 "renesas,rcar-gen3-cmt1";
296 reg = <0 0xe6148000 0 0x1004>;
297 interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
298 <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
299 <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>,
300 <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,
301 <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>,
302 <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
303 <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
304 <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>;
305 clocks = <&cpg CPG_MOD 300>;
307 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
312 cpg: clock-controller@e6150000 {
313 compatible = "renesas,r8a77980-cpg-mssr";
314 reg = <0 0xe6150000 0 0x1000>;
315 clocks = <&extal_clk>, <&extalr_clk>;
316 clock-names = "extal", "extalr";
318 #power-domain-cells = <0>;
322 rst: reset-controller@e6160000 {
323 compatible = "renesas,r8a77980-rst";
324 reg = <0 0xe6160000 0 0x200>;
327 sysc: system-controller@e6180000 {
328 compatible = "renesas,r8a77980-sysc";
329 reg = <0 0xe6180000 0 0x440>;
330 #power-domain-cells = <1>;
333 tsc: thermal@e6198000 {
334 compatible = "renesas,r8a77980-thermal";
335 reg = <0 0xe6198000 0 0x100>,
336 <0 0xe61a0000 0 0x100>;
337 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
338 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
339 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
340 clocks = <&cpg CPG_MOD 522>;
341 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
343 #thermal-sensor-cells = <1>;
346 intc_ex: interrupt-controller@e61c0000 {
347 compatible = "renesas,intc-ex-r8a77980", "renesas,irqc";
348 #interrupt-cells = <2>;
349 interrupt-controller;
350 reg = <0 0xe61c0000 0 0x200>;
351 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
352 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
353 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
354 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
355 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
356 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
357 clocks = <&cpg CPG_MOD 407>;
358 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
362 tmu0: timer@e61e0000 {
363 compatible = "renesas,tmu-r8a77980", "renesas,tmu";
364 reg = <0 0xe61e0000 0 0x30>;
365 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
366 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
367 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
368 clocks = <&cpg CPG_MOD 125>;
370 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
375 tmu1: timer@e6fc0000 {
376 compatible = "renesas,tmu-r8a77980", "renesas,tmu";
377 reg = <0 0xe6fc0000 0 0x30>;
378 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
379 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
380 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
381 clocks = <&cpg CPG_MOD 124>;
383 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
388 tmu2: timer@e6fd0000 {
389 compatible = "renesas,tmu-r8a77980", "renesas,tmu";
390 reg = <0 0xe6fd0000 0 0x30>;
391 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
392 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
393 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
394 clocks = <&cpg CPG_MOD 123>;
396 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
401 tmu3: timer@e6fe0000 {
402 compatible = "renesas,tmu-r8a77980", "renesas,tmu";
403 reg = <0 0xe6fe0000 0 0x30>;
404 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
405 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
406 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
407 clocks = <&cpg CPG_MOD 122>;
409 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
414 tmu4: timer@ffc00000 {
415 compatible = "renesas,tmu-r8a77980", "renesas,tmu";
416 reg = <0 0xffc00000 0 0x30>;
417 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
418 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
419 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
420 clocks = <&cpg CPG_MOD 121>;
422 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
428 compatible = "renesas,i2c-r8a77980",
429 "renesas,rcar-gen3-i2c";
430 reg = <0 0xe6500000 0 0x40>;
431 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
432 clocks = <&cpg CPG_MOD 931>;
433 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
435 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
436 <&dmac2 0x91>, <&dmac2 0x90>;
437 dma-names = "tx", "rx", "tx", "rx";
438 i2c-scl-internal-delay-ns = <6>;
439 #address-cells = <1>;
445 compatible = "renesas,i2c-r8a77980",
446 "renesas,rcar-gen3-i2c";
447 reg = <0 0xe6508000 0 0x40>;
448 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
449 clocks = <&cpg CPG_MOD 930>;
450 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
452 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
453 <&dmac2 0x93>, <&dmac2 0x92>;
454 dma-names = "tx", "rx", "tx", "rx";
455 i2c-scl-internal-delay-ns = <6>;
456 #address-cells = <1>;
462 compatible = "renesas,i2c-r8a77980",
463 "renesas,rcar-gen3-i2c";
464 reg = <0 0xe6510000 0 0x40>;
465 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
466 clocks = <&cpg CPG_MOD 929>;
467 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
469 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
470 <&dmac2 0x95>, <&dmac2 0x94>;
471 dma-names = "tx", "rx", "tx", "rx";
472 i2c-scl-internal-delay-ns = <6>;
473 #address-cells = <1>;
479 compatible = "renesas,i2c-r8a77980",
480 "renesas,rcar-gen3-i2c";
481 reg = <0 0xe66d0000 0 0x40>;
482 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
483 clocks = <&cpg CPG_MOD 928>;
484 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
486 i2c-scl-internal-delay-ns = <6>;
487 #address-cells = <1>;
493 compatible = "renesas,i2c-r8a77980",
494 "renesas,rcar-gen3-i2c";
495 reg = <0 0xe66d8000 0 0x40>;
496 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
497 clocks = <&cpg CPG_MOD 927>;
498 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
500 i2c-scl-internal-delay-ns = <6>;
501 #address-cells = <1>;
507 compatible = "renesas,i2c-r8a77980",
508 "renesas,rcar-gen3-i2c";
509 reg = <0 0xe66e0000 0 0x40>;
510 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
511 clocks = <&cpg CPG_MOD 919>;
512 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
514 dmas = <&dmac1 0x9b>, <&dmac1 0x9a>,
515 <&dmac2 0x9b>, <&dmac2 0x9a>;
516 dma-names = "tx", "rx", "tx", "rx";
517 i2c-scl-internal-delay-ns = <6>;
518 #address-cells = <1>;
523 hscif0: serial@e6540000 {
524 compatible = "renesas,hscif-r8a77980",
525 "renesas,rcar-gen3-hscif",
527 reg = <0 0xe6540000 0 0x60>;
528 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
529 clocks = <&cpg CPG_MOD 520>,
530 <&cpg CPG_CORE R8A77980_CLK_S3D1>,
532 clock-names = "fck", "brg_int", "scif_clk";
533 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
534 <&dmac2 0x31>, <&dmac2 0x30>;
535 dma-names = "tx", "rx", "tx", "rx";
536 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
541 hscif1: serial@e6550000 {
542 compatible = "renesas,hscif-r8a77980",
543 "renesas,rcar-gen3-hscif",
545 reg = <0 0xe6550000 0 0x60>;
546 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
547 clocks = <&cpg CPG_MOD 519>,
548 <&cpg CPG_CORE R8A77980_CLK_S3D1>,
550 clock-names = "fck", "brg_int", "scif_clk";
551 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
552 <&dmac2 0x33>, <&dmac2 0x32>;
553 dma-names = "tx", "rx", "tx", "rx";
554 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
559 hscif2: serial@e6560000 {
560 compatible = "renesas,hscif-r8a77980",
561 "renesas,rcar-gen3-hscif",
563 reg = <0 0xe6560000 0 0x60>;
564 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
565 clocks = <&cpg CPG_MOD 518>,
566 <&cpg CPG_CORE R8A77980_CLK_S3D1>,
568 clock-names = "fck", "brg_int", "scif_clk";
569 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
570 <&dmac2 0x35>, <&dmac2 0x34>;
571 dma-names = "tx", "rx", "tx", "rx";
572 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
577 hscif3: serial@e66a0000 {
578 compatible = "renesas,hscif-r8a77980",
579 "renesas,rcar-gen3-hscif",
581 reg = <0 0xe66a0000 0 0x60>;
582 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
583 clocks = <&cpg CPG_MOD 517>,
584 <&cpg CPG_CORE R8A77980_CLK_S3D1>,
586 clock-names = "fck", "brg_int", "scif_clk";
587 dmas = <&dmac1 0x37>, <&dmac1 0x36>,
588 <&dmac2 0x37>, <&dmac2 0x36>;
589 dma-names = "tx", "rx", "tx", "rx";
590 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
595 pcie_phy: pcie-phy@e65d0000 {
596 compatible = "renesas,r8a77980-pcie-phy";
597 reg = <0 0xe65d0000 0 0x8000>;
599 clocks = <&cpg CPG_MOD 319>;
600 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
605 canfd: can@e66c0000 {
606 compatible = "renesas,r8a77980-canfd",
607 "renesas,rcar-gen3-canfd";
608 reg = <0 0xe66c0000 0 0x8000>;
609 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
610 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
611 clocks = <&cpg CPG_MOD 914>,
612 <&cpg CPG_CORE R8A77980_CLK_CANFD>,
614 clock-names = "fck", "canfd", "can_clk";
615 assigned-clocks = <&cpg CPG_CORE R8A77980_CLK_CANFD>;
616 assigned-clock-rates = <40000000>;
617 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
630 avb: ethernet@e6800000 {
631 compatible = "renesas,etheravb-r8a77980",
632 "renesas,etheravb-rcar-gen3";
633 reg = <0 0xe6800000 0 0x800>;
634 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
635 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
636 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
637 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
638 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
639 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
640 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
641 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
642 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
643 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
644 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
645 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
646 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
647 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
648 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
649 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
650 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
651 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
652 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
653 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
654 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
655 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
656 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
657 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
658 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
659 interrupt-names = "ch0", "ch1", "ch2", "ch3",
660 "ch4", "ch5", "ch6", "ch7",
661 "ch8", "ch9", "ch10", "ch11",
662 "ch12", "ch13", "ch14", "ch15",
663 "ch16", "ch17", "ch18", "ch19",
664 "ch20", "ch21", "ch22", "ch23",
666 clocks = <&cpg CPG_MOD 812>;
667 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
670 rx-internal-delay-ps = <0>;
671 tx-internal-delay-ps = <2000>;
672 iommus = <&ipmmu_ds1 33>;
673 #address-cells = <1>;
679 compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
680 reg = <0 0xe6e30000 0 0x10>;
682 clocks = <&cpg CPG_MOD 523>;
683 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
689 compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
690 reg = <0 0xe6e31000 0 0x10>;
692 clocks = <&cpg CPG_MOD 523>;
693 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
699 compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
700 reg = <0 0xe6e32000 0 0x10>;
702 clocks = <&cpg CPG_MOD 523>;
703 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
709 compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
710 reg = <0 0xe6e33000 0 0x10>;
712 clocks = <&cpg CPG_MOD 523>;
713 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
719 compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
720 reg = <0 0xe6e34000 0 0x10>;
722 clocks = <&cpg CPG_MOD 523>;
723 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
728 scif0: serial@e6e60000 {
729 compatible = "renesas,scif-r8a77980",
730 "renesas,rcar-gen3-scif",
732 reg = <0 0xe6e60000 0 0x40>;
733 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
734 clocks = <&cpg CPG_MOD 207>,
735 <&cpg CPG_CORE R8A77980_CLK_S3D1>,
737 clock-names = "fck", "brg_int", "scif_clk";
738 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
739 <&dmac2 0x51>, <&dmac2 0x50>;
740 dma-names = "tx", "rx", "tx", "rx";
741 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
746 scif1: serial@e6e68000 {
747 compatible = "renesas,scif-r8a77980",
748 "renesas,rcar-gen3-scif",
750 reg = <0 0xe6e68000 0 0x40>;
751 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
752 clocks = <&cpg CPG_MOD 206>,
753 <&cpg CPG_CORE R8A77980_CLK_S3D1>,
755 clock-names = "fck", "brg_int", "scif_clk";
756 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
757 <&dmac2 0x53>, <&dmac2 0x52>;
758 dma-names = "tx", "rx", "tx", "rx";
759 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
764 scif3: serial@e6c50000 {
765 compatible = "renesas,scif-r8a77980",
766 "renesas,rcar-gen3-scif",
768 reg = <0 0xe6c50000 0 0x40>;
769 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
770 clocks = <&cpg CPG_MOD 204>,
771 <&cpg CPG_CORE R8A77980_CLK_S3D1>,
773 clock-names = "fck", "brg_int", "scif_clk";
774 dmas = <&dmac1 0x57>, <&dmac1 0x56>,
775 <&dmac2 0x57>, <&dmac2 0x56>;
776 dma-names = "tx", "rx", "tx", "rx";
777 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
782 scif4: serial@e6c40000 {
783 compatible = "renesas,scif-r8a77980",
784 "renesas,rcar-gen3-scif",
786 reg = <0 0xe6c40000 0 0x40>;
787 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
788 clocks = <&cpg CPG_MOD 203>,
789 <&cpg CPG_CORE R8A77980_CLK_S3D1>,
791 clock-names = "fck", "brg_int", "scif_clk";
792 dmas = <&dmac1 0x59>, <&dmac1 0x58>,
793 <&dmac2 0x59>, <&dmac2 0x58>;
794 dma-names = "tx", "rx", "tx", "rx";
795 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
801 compatible = "renesas,tpu-r8a77980", "renesas,tpu";
802 reg = <0 0xe6e80000 0 0x148>;
803 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
804 clocks = <&cpg CPG_MOD 304>;
805 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
811 msiof0: spi@e6e90000 {
812 compatible = "renesas,msiof-r8a77980",
813 "renesas,rcar-gen3-msiof";
814 reg = <0 0xe6e90000 0 0x64>;
815 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
816 clocks = <&cpg CPG_MOD 211>;
817 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
819 #address-cells = <1>;
824 msiof1: spi@e6ea0000 {
825 compatible = "renesas,msiof-r8a77980",
826 "renesas,rcar-gen3-msiof";
827 reg = <0 0xe6ea0000 0 0x0064>;
828 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
829 clocks = <&cpg CPG_MOD 210>;
830 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
832 #address-cells = <1>;
837 msiof2: spi@e6c00000 {
838 compatible = "renesas,msiof-r8a77980",
839 "renesas,rcar-gen3-msiof";
840 reg = <0 0xe6c00000 0 0x0064>;
841 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
842 clocks = <&cpg CPG_MOD 209>;
843 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
845 #address-cells = <1>;
850 msiof3: spi@e6c10000 {
851 compatible = "renesas,msiof-r8a77980",
852 "renesas,rcar-gen3-msiof";
853 reg = <0 0xe6c10000 0 0x0064>;
854 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
855 clocks = <&cpg CPG_MOD 208>;
856 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
858 #address-cells = <1>;
863 vin0: video@e6ef0000 {
864 compatible = "renesas,vin-r8a77980";
865 reg = <0 0xe6ef0000 0 0x1000>;
866 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
867 clocks = <&cpg CPG_MOD 811>;
868 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
874 #address-cells = <1>;
878 #address-cells = <1>;
883 vin0csi40: endpoint@2 {
885 remote-endpoint = <&csi40vin0>;
891 vin1: video@e6ef1000 {
892 compatible = "renesas,vin-r8a77980";
893 reg = <0 0xe6ef1000 0 0x1000>;
894 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
895 clocks = <&cpg CPG_MOD 810>;
896 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
902 #address-cells = <1>;
906 #address-cells = <1>;
911 vin1csi40: endpoint@2 {
913 remote-endpoint = <&csi40vin1>;
919 vin2: video@e6ef2000 {
920 compatible = "renesas,vin-r8a77980";
921 reg = <0 0xe6ef2000 0 0x1000>;
922 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
923 clocks = <&cpg CPG_MOD 809>;
924 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
930 #address-cells = <1>;
934 #address-cells = <1>;
939 vin2csi40: endpoint@2 {
941 remote-endpoint = <&csi40vin2>;
947 vin3: video@e6ef3000 {
948 compatible = "renesas,vin-r8a77980";
949 reg = <0 0xe6ef3000 0 0x1000>;
950 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
951 clocks = <&cpg CPG_MOD 808>;
952 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
958 #address-cells = <1>;
962 #address-cells = <1>;
967 vin3csi40: endpoint@2 {
969 remote-endpoint = <&csi40vin3>;
975 vin4: video@e6ef4000 {
976 compatible = "renesas,vin-r8a77980";
977 reg = <0 0xe6ef4000 0 0x1000>;
978 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
979 clocks = <&cpg CPG_MOD 807>;
980 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
986 #address-cells = <1>;
990 #address-cells = <1>;
995 vin4csi41: endpoint@2 {
997 remote-endpoint = <&csi41vin4>;
1003 vin5: video@e6ef5000 {
1004 compatible = "renesas,vin-r8a77980";
1005 reg = <0 0xe6ef5000 0 0x1000>;
1006 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1007 clocks = <&cpg CPG_MOD 806>;
1008 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1009 resets = <&cpg 806>;
1011 status = "disabled";
1014 #address-cells = <1>;
1018 #address-cells = <1>;
1023 vin5csi41: endpoint@2 {
1025 remote-endpoint = <&csi41vin5>;
1031 vin6: video@e6ef6000 {
1032 compatible = "renesas,vin-r8a77980";
1033 reg = <0 0xe6ef6000 0 0x1000>;
1034 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1035 clocks = <&cpg CPG_MOD 805>;
1036 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1037 resets = <&cpg 805>;
1039 status = "disabled";
1042 #address-cells = <1>;
1046 #address-cells = <1>;
1051 vin6csi41: endpoint@2 {
1053 remote-endpoint = <&csi41vin6>;
1059 vin7: video@e6ef7000 {
1060 compatible = "renesas,vin-r8a77980";
1061 reg = <0 0xe6ef7000 0 0x1000>;
1062 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1063 clocks = <&cpg CPG_MOD 804>;
1064 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1065 resets = <&cpg 804>;
1067 status = "disabled";
1070 #address-cells = <1>;
1074 #address-cells = <1>;
1079 vin7csi41: endpoint@2 {
1081 remote-endpoint = <&csi41vin7>;
1087 vin8: video@e6ef8000 {
1088 compatible = "renesas,vin-r8a77980";
1089 reg = <0 0xe6ef8000 0 0x1000>;
1090 interrupts = <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1091 clocks = <&cpg CPG_MOD 628>;
1092 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1093 resets = <&cpg 628>;
1095 status = "disabled";
1098 vin9: video@e6ef9000 {
1099 compatible = "renesas,vin-r8a77980";
1100 reg = <0 0xe6ef9000 0 0x1000>;
1101 interrupts = <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
1102 clocks = <&cpg CPG_MOD 627>;
1103 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1104 resets = <&cpg 627>;
1106 status = "disabled";
1109 vin10: video@e6efa000 {
1110 compatible = "renesas,vin-r8a77980";
1111 reg = <0 0xe6efa000 0 0x1000>;
1112 interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>;
1113 clocks = <&cpg CPG_MOD 625>;
1114 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1115 resets = <&cpg 625>;
1117 status = "disabled";
1120 vin11: video@e6efb000 {
1121 compatible = "renesas,vin-r8a77980";
1122 reg = <0 0xe6efb000 0 0x1000>;
1123 interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>;
1124 clocks = <&cpg CPG_MOD 618>;
1125 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1126 resets = <&cpg 618>;
1128 status = "disabled";
1131 vin12: video@e6efc000 {
1132 compatible = "renesas,vin-r8a77980";
1133 reg = <0 0xe6efc000 0 0x1000>;
1134 interrupts = <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>;
1135 clocks = <&cpg CPG_MOD 612>;
1136 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1137 resets = <&cpg 612>;
1139 status = "disabled";
1142 vin13: video@e6efd000 {
1143 compatible = "renesas,vin-r8a77980";
1144 reg = <0 0xe6efd000 0 0x1000>;
1145 interrupts = <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>;
1146 clocks = <&cpg CPG_MOD 608>;
1147 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1148 resets = <&cpg 608>;
1150 status = "disabled";
1153 vin14: video@e6efe000 {
1154 compatible = "renesas,vin-r8a77980";
1155 reg = <0 0xe6efe000 0 0x1000>;
1156 interrupts = <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>;
1157 clocks = <&cpg CPG_MOD 605>;
1158 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1159 resets = <&cpg 605>;
1161 status = "disabled";
1164 vin15: video@e6eff000 {
1165 compatible = "renesas,vin-r8a77980";
1166 reg = <0 0xe6eff000 0 0x1000>;
1167 interrupts = <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>;
1168 clocks = <&cpg CPG_MOD 604>;
1169 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1170 resets = <&cpg 604>;
1172 status = "disabled";
1175 dmac1: dma-controller@e7300000 {
1176 compatible = "renesas,dmac-r8a77980",
1177 "renesas,rcar-dmac";
1178 reg = <0 0xe7300000 0 0x10000>;
1179 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
1180 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
1181 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
1182 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
1183 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
1184 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
1185 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
1186 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
1187 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
1188 <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>,
1189 <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>,
1190 <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>,
1191 <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>,
1192 <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>,
1193 <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>,
1194 <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>,
1195 <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1196 interrupt-names = "error",
1197 "ch0", "ch1", "ch2", "ch3",
1198 "ch4", "ch5", "ch6", "ch7",
1199 "ch8", "ch9", "ch10", "ch11",
1200 "ch12", "ch13", "ch14", "ch15";
1201 clocks = <&cpg CPG_MOD 218>;
1202 clock-names = "fck";
1203 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1204 resets = <&cpg 218>;
1206 dma-channels = <16>;
1207 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
1208 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
1209 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
1210 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
1211 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
1212 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
1213 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
1214 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
1217 dmac2: dma-controller@e7310000 {
1218 compatible = "renesas,dmac-r8a77980",
1219 "renesas,rcar-dmac";
1220 reg = <0 0xe7310000 0 0x10000>;
1221 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
1222 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
1223 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
1224 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
1225 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
1226 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
1227 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
1228 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
1229 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
1230 <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>,
1231 <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>,
1232 <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>,
1233 <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>,
1234 <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>,
1235 <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>,
1236 <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>,
1237 <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>;
1238 interrupt-names = "error",
1239 "ch0", "ch1", "ch2", "ch3",
1240 "ch4", "ch5", "ch6", "ch7",
1241 "ch8", "ch9", "ch10", "ch11",
1242 "ch12", "ch13", "ch14", "ch15";
1243 clocks = <&cpg CPG_MOD 217>;
1244 clock-names = "fck";
1245 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1246 resets = <&cpg 217>;
1248 dma-channels = <16>;
1249 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
1250 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
1251 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
1252 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
1253 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
1254 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
1255 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
1256 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
1259 gether: ethernet@e7400000 {
1260 compatible = "renesas,gether-r8a77980";
1261 reg = <0 0xe7400000 0 0x1000>;
1262 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
1263 clocks = <&cpg CPG_MOD 813>;
1264 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1265 resets = <&cpg 813>;
1266 #address-cells = <1>;
1268 status = "disabled";
1271 ipmmu_ds1: iommu@e7740000 {
1272 compatible = "renesas,ipmmu-r8a77980";
1273 reg = <0 0xe7740000 0 0x1000>;
1274 renesas,ipmmu-main = <&ipmmu_mm 0>;
1275 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1279 ipmmu_ir: iommu@ff8b0000 {
1280 compatible = "renesas,ipmmu-r8a77980";
1281 reg = <0 0xff8b0000 0 0x1000>;
1282 renesas,ipmmu-main = <&ipmmu_mm 3>;
1283 power-domains = <&sysc R8A77980_PD_A3IR>;
1287 ipmmu_mm: iommu@e67b0000 {
1288 compatible = "renesas,ipmmu-r8a77980";
1289 reg = <0 0xe67b0000 0 0x1000>;
1290 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
1291 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
1292 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1296 ipmmu_rt: iommu@ffc80000 {
1297 compatible = "renesas,ipmmu-r8a77980";
1298 reg = <0 0xffc80000 0 0x1000>;
1299 renesas,ipmmu-main = <&ipmmu_mm 10>;
1300 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1304 ipmmu_vc0: iommu@fe990000 {
1305 compatible = "renesas,ipmmu-r8a77980";
1306 reg = <0 0xfe990000 0 0x1000>;
1307 renesas,ipmmu-main = <&ipmmu_mm 12>;
1308 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1312 ipmmu_vi0: iommu@febd0000 {
1313 compatible = "renesas,ipmmu-r8a77980";
1314 reg = <0 0xfebd0000 0 0x1000>;
1315 renesas,ipmmu-main = <&ipmmu_mm 14>;
1316 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1320 ipmmu_vip0: iommu@e7b00000 {
1321 compatible = "renesas,ipmmu-r8a77980";
1322 reg = <0 0xe7b00000 0 0x1000>;
1323 renesas,ipmmu-main = <&ipmmu_mm 4>;
1324 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1328 ipmmu_vip1: iommu@e7960000 {
1329 compatible = "renesas,ipmmu-r8a77980";
1330 reg = <0 0xe7960000 0 0x1000>;
1331 renesas,ipmmu-main = <&ipmmu_mm 11>;
1332 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1336 mmc0: mmc@ee140000 {
1337 compatible = "renesas,sdhi-r8a77980",
1338 "renesas,rcar-gen3-sdhi";
1339 reg = <0 0xee140000 0 0x2000>;
1340 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1341 clocks = <&cpg CPG_MOD 314>;
1342 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1343 resets = <&cpg 314>;
1344 max-frequency = <200000000>;
1345 iommus = <&ipmmu_ds1 32>;
1346 status = "disabled";
1350 compatible = "renesas,r8a77980-rpc-if",
1351 "renesas,rcar-gen3-rpc-if";
1352 reg = <0 0xee200000 0 0x200>,
1353 <0 0x08000000 0 0x4000000>,
1354 <0 0xee208000 0 0x100>;
1355 reg-names = "regs", "dirmap", "wbuf";
1356 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
1357 clocks = <&cpg CPG_MOD 917>;
1358 clock-names = "rpc";
1359 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1360 resets = <&cpg 917>;
1361 #address-cells = <1>;
1363 status = "disabled";
1366 gic: interrupt-controller@f1010000 {
1367 compatible = "arm,gic-400";
1368 #interrupt-cells = <3>;
1369 #address-cells = <0>;
1370 interrupt-controller;
1371 reg = <0x0 0xf1010000 0 0x1000>,
1372 <0x0 0xf1020000 0 0x20000>,
1373 <0x0 0xf1040000 0 0x20000>,
1374 <0x0 0xf1060000 0 0x20000>;
1375 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
1376 IRQ_TYPE_LEVEL_HIGH)>;
1377 clocks = <&cpg CPG_MOD 408>;
1378 clock-names = "clk";
1379 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1380 resets = <&cpg 408>;
1383 pciec: pcie@fe000000 {
1384 compatible = "renesas,pcie-r8a77980",
1385 "renesas,pcie-rcar-gen3";
1386 reg = <0 0xfe000000 0 0x80000>;
1387 #address-cells = <3>;
1389 bus-range = <0x00 0xff>;
1390 device_type = "pci";
1391 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x0100000>,
1392 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x0200000>,
1393 <0x02000000 0 0x30000000 0 0x30000000 0 0x8000000>,
1394 <0x42000000 0 0x38000000 0 0x38000000 0 0x8000000>;
1395 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
1396 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
1397 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
1398 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
1399 #interrupt-cells = <1>;
1400 interrupt-map-mask = <0 0 0 0>;
1401 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
1402 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1403 clock-names = "pcie", "pcie_bus";
1404 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1405 resets = <&cpg 319>;
1408 status = "disabled";
1411 vspd0: vsp@fea20000 {
1412 compatible = "renesas,vsp2";
1413 reg = <0 0xfea20000 0 0x5000>;
1414 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1415 clocks = <&cpg CPG_MOD 623>;
1416 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1417 resets = <&cpg 623>;
1418 renesas,fcp = <&fcpvd0>;
1421 fcpvd0: fcp@fea27000 {
1422 compatible = "renesas,fcpv";
1423 reg = <0 0xfea27000 0 0x200>;
1424 clocks = <&cpg CPG_MOD 603>;
1425 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1426 resets = <&cpg 603>;
1429 csi40: csi2@feaa0000 {
1430 compatible = "renesas,r8a77980-csi2";
1431 reg = <0 0xfeaa0000 0 0x10000>;
1432 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1433 clocks = <&cpg CPG_MOD 716>;
1434 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1435 resets = <&cpg 716>;
1436 status = "disabled";
1439 #address-cells = <1>;
1443 #address-cells = <1>;
1448 csi40vin0: endpoint@0 {
1450 remote-endpoint = <&vin0csi40>;
1452 csi40vin1: endpoint@1 {
1454 remote-endpoint = <&vin1csi40>;
1456 csi40vin2: endpoint@2 {
1458 remote-endpoint = <&vin2csi40>;
1460 csi40vin3: endpoint@3 {
1462 remote-endpoint = <&vin3csi40>;
1468 csi41: csi2@feab0000 {
1469 compatible = "renesas,r8a77980-csi2";
1470 reg = <0 0xfeab0000 0 0x10000>;
1471 interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
1472 clocks = <&cpg CPG_MOD 715>;
1473 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1474 resets = <&cpg 715>;
1475 status = "disabled";
1478 #address-cells = <1>;
1482 #address-cells = <1>;
1487 csi41vin4: endpoint@0 {
1489 remote-endpoint = <&vin4csi41>;
1491 csi41vin5: endpoint@1 {
1493 remote-endpoint = <&vin5csi41>;
1495 csi41vin6: endpoint@2 {
1497 remote-endpoint = <&vin6csi41>;
1499 csi41vin7: endpoint@3 {
1501 remote-endpoint = <&vin7csi41>;
1507 du: display@feb00000 {
1508 compatible = "renesas,du-r8a77980";
1509 reg = <0 0xfeb00000 0 0x80000>;
1510 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
1511 clocks = <&cpg CPG_MOD 724>;
1512 clock-names = "du.0";
1513 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1514 resets = <&cpg 724>;
1515 reset-names = "du.0";
1516 renesas,vsps = <&vspd0 0>;
1518 status = "disabled";
1521 #address-cells = <1>;
1526 du_out_rgb: endpoint {
1532 du_out_lvds0: endpoint {
1533 remote-endpoint = <&lvds0_in>;
1539 lvds0: lvds-encoder@feb90000 {
1540 compatible = "renesas,r8a77980-lvds";
1541 reg = <0 0xfeb90000 0 0x14>;
1542 clocks = <&cpg CPG_MOD 727>;
1543 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1544 resets = <&cpg 727>;
1545 status = "disabled";
1548 #address-cells = <1>;
1553 lvds0_in: endpoint {
1561 lvds0_out: endpoint {
1567 prr: chipid@fff00044 {
1568 compatible = "renesas,prr";
1569 reg = <0 0xfff00044 0 4>;
1575 polling-delay-passive = <250>;
1576 polling-delay = <1000>;
1577 thermal-sensors = <&tsc 0>;
1581 temperature = <95000>;
1582 hysteresis = <1000>;
1586 temperature = <120000>;
1587 hysteresis = <1000>;
1594 polling-delay-passive = <250>;
1595 polling-delay = <1000>;
1596 thermal-sensors = <&tsc 1>;
1600 temperature = <95000>;
1601 hysteresis = <1000>;
1605 temperature = <120000>;
1606 hysteresis = <1000>;
1614 compatible = "arm,armv8-timer";
1615 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
1616 IRQ_TYPE_LEVEL_LOW)>,
1617 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
1618 IRQ_TYPE_LEVEL_LOW)>,
1619 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
1620 IRQ_TYPE_LEVEL_LOW)>,
1621 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
1622 IRQ_TYPE_LEVEL_LOW)>;