arch/arm64/boot/dts/renesas/r8a774a1.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the r8a774a1 SoC
   4  *
   5  * Copyright (C) 2018 Renesas Electronics Corp.
   6  */
   7
   8 #include <dt-bindings/interrupt-controller/irq.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/clock/r8a774a1-cpg-mssr.h>
  11 #include <dt-bindings/power/r8a774a1-sysc.h>
  12
  13 / {
  14         compatible = "renesas,r8a774a1";
  15         #address-cells = <2>;
  16         #size-cells = <2>;
  17
  18         /*
  19          * The external audio clocks are configured as 0 Hz fixed frequency
  20          * clocks by default.
  21          * Boards that provide audio clocks should override them.
  22          */
  23         audio_clk_a: audio_clk_a {
  24                 compatible = "fixed-clock";
  25                 #clock-cells = <0>;
  26                 clock-frequency = <0>;
  27         };
  28
  29         audio_clk_b: audio_clk_b {
  30                 compatible = "fixed-clock";
  31                 #clock-cells = <0>;
  32                 clock-frequency = <0>;
  33         };
  34
  35         audio_clk_c: audio_clk_c {
  36                 compatible = "fixed-clock";
  37                 #clock-cells = <0>;
  38                 clock-frequency = <0>;
  39         };
  40
  41         /* External CAN clock - to be overridden by boards that provide it */
  42         can_clk: can {
  43                 compatible = "fixed-clock";
  44                 #clock-cells = <0>;
  45                 clock-frequency = <0>;
  46         };
  47
  48         cluster0_opp: opp-table-0 {
  49                 compatible = "operating-points-v2";
  50                 opp-shared;
  51
  52                 opp-500000000 {
  53                         opp-hz = /bits/ 64 <500000000>;
  54                         opp-microvolt = <820000>;
  55                         clock-latency-ns = <300000>;
  56                 };
  57                 opp-1000000000 {
  58                         opp-hz = /bits/ 64 <1000000000>;
  59                         opp-microvolt = <820000>;
  60                         clock-latency-ns = <300000>;
  61                 };
  62                 opp-1500000000 {
  63                         opp-hz = /bits/ 64 <1500000000>;
  64                         opp-microvolt = <820000>;
  65                         clock-latency-ns = <300000>;
  66                         opp-suspend;
  67                 };
  68         };
  69
  70         cluster1_opp: opp-table-1 {
  71                 compatible = "operating-points-v2";
  72                 opp-shared;
  73
  74                 opp-800000000 {
  75                         opp-hz = /bits/ 64 <800000000>;
  76                         opp-microvolt = <820000>;
  77                         clock-latency-ns = <300000>;
  78                 };
  79                 opp-1000000000 {
  80                         opp-hz = /bits/ 64 <1000000000>;
  81                         opp-microvolt = <820000>;
  82                         clock-latency-ns = <300000>;
  83                 };
  84                 opp-1200000000 {
  85                         opp-hz = /bits/ 64 <1200000000>;
  86                         opp-microvolt = <820000>;
  87                         clock-latency-ns = <300000>;
  88                 };
  89         };
  90
  91         cpus {
  92                 #address-cells = <1>;
  93                 #size-cells = <0>;
  94
  95                 cpu-map {
  96                         cluster0 {
  97                                 core0 {
  98                                         cpu = <&a57_0>;
  99                                 };
 100                                 core1 {
 101                                         cpu = <&a57_1>;
 102                                 };
 103                         };
 104
 105                         cluster1 {
 106                                 core0 {
 107                                         cpu = <&a53_0>;
 108                                 };
 109                                 core1 {
 110                                         cpu = <&a53_1>;
 111                                 };
 112                                 core2 {
 113                                         cpu = <&a53_2>;
 114                                 };
 115                                 core3 {
 116                                         cpu = <&a53_3>;
 117                                 };
 118                         };
 119                 };
 120
 121                 a57_0: cpu@0 {
 122                         compatible = "arm,cortex-a57";
 123                         reg = <0x0>;
 124                         device_type = "cpu";
 125                         power-domains = <&sysc R8A774A1_PD_CA57_CPU0>;
 126                         next-level-cache = <&L2_CA57>;
 127                         enable-method = "psci";
 128                         dynamic-power-coefficient = <854>;
 129                         clocks = <&cpg CPG_CORE R8A774A1_CLK_Z>;
 130                         operating-points-v2 = <&cluster0_opp>;
 131                         capacity-dmips-mhz = <1024>;
 132                         #cooling-cells = <2>;
 133                 };
 134
 135                 a57_1: cpu@1 {
 136                         compatible = "arm,cortex-a57";
 137                         reg = <0x1>;
 138                         device_type = "cpu";
 139                         power-domains = <&sysc R8A774A1_PD_CA57_CPU1>;
 140                         next-level-cache = <&L2_CA57>;
 141                         enable-method = "psci";
 142                         clocks = <&cpg CPG_CORE R8A774A1_CLK_Z>;
 143                         operating-points-v2 = <&cluster0_opp>;
 144                         capacity-dmips-mhz = <1024>;
 145                         #cooling-cells = <2>;
 146                 };
 147
 148                 a53_0: cpu@100 {
 149                         compatible = "arm,cortex-a53";
 150                         reg = <0x100>;
 151                         device_type = "cpu";
 152                         power-domains = <&sysc R8A774A1_PD_CA53_CPU0>;
 153                         next-level-cache = <&L2_CA53>;
 154                         enable-method = "psci";
 155                         #cooling-cells = <2>;
 156                         dynamic-power-coefficient = <277>;
 157                         clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
 158                         operating-points-v2 = <&cluster1_opp>;
 159                         capacity-dmips-mhz = <560>;
 160                 };
 161
 162                 a53_1: cpu@101 {
 163                         compatible = "arm,cortex-a53";
 164                         reg = <0x101>;
 165                         device_type = "cpu";
 166                         power-domains = <&sysc R8A774A1_PD_CA53_CPU1>;
 167                         next-level-cache = <&L2_CA53>;
 168                         enable-method = "psci";
 169                         clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
 170                         operating-points-v2 = <&cluster1_opp>;
 171                         capacity-dmips-mhz = <560>;
 172                 };
 173
 174                 a53_2: cpu@102 {
 175                         compatible = "arm,cortex-a53";
 176                         reg = <0x102>;
 177                         device_type = "cpu";
 178                         power-domains = <&sysc R8A774A1_PD_CA53_CPU2>;
 179                         next-level-cache = <&L2_CA53>;
 180                         enable-method = "psci";
 181                         clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
 182                         operating-points-v2 = <&cluster1_opp>;
 183                         capacity-dmips-mhz = <560>;
 184                 };
 185
 186                 a53_3: cpu@103 {
 187                         compatible = "arm,cortex-a53";
 188                         reg = <0x103>;
 189                         device_type = "cpu";
 190                         power-domains = <&sysc R8A774A1_PD_CA53_CPU3>;
 191                         next-level-cache = <&L2_CA53>;
 192                         enable-method = "psci";
 193                         clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
 194                         operating-points-v2 = <&cluster1_opp>;
 195                         capacity-dmips-mhz = <560>;
 196                 };
 197
 198                 L2_CA57: cache-controller-0 {
 199                         compatible = "cache";
 200                         power-domains = <&sysc R8A774A1_PD_CA57_SCU>;
 201                         cache-unified;
 202                         cache-level = <2>;
 203                 };
 204
 205                 L2_CA53: cache-controller-1 {
 206                         compatible = "cache";
 207                         power-domains = <&sysc R8A774A1_PD_CA53_SCU>;
 208                         cache-unified;
 209                         cache-level = <2>;
 210                 };
 211         };
 212
 213         extal_clk: extal {
 214                 compatible = "fixed-clock";
 215                 #clock-cells = <0>;
 216                 /* This value must be overridden by the board */
 217                 clock-frequency = <0>;
 218         };
 219
 220         extalr_clk: extalr {
 221                 compatible = "fixed-clock";
 222                 #clock-cells = <0>;
 223                 /* This value must be overridden by the board */
 224                 clock-frequency = <0>;
 225         };
 226
 227         /* External PCIe clock - can be overridden by the board */
 228         pcie_bus_clk: pcie_bus {
 229                 compatible = "fixed-clock";
 230                 #clock-cells = <0>;
 231                 clock-frequency = <0>;
 232         };
 233
 234         pmu_a53 {
 235                 compatible = "arm,cortex-a53-pmu";
 236                 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 237                                       <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
 238                                       <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
 239                                       <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 240                 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
 241         };
 242
 243         pmu_a57 {
 244                 compatible = "arm,cortex-a57-pmu";
 245                 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 246                                       <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 247                 interrupt-affinity = <&a57_0>, <&a57_1>;
 248         };
 249
 250         psci {
 251                 compatible = "arm,psci-1.0", "arm,psci-0.2";
 252                 method = "smc";
 253         };
 254
 255         /* External SCIF clock - to be overridden by boards that provide it */
 256         scif_clk: scif {
 257                 compatible = "fixed-clock";
 258                 #clock-cells = <0>;
 259                 clock-frequency = <0>;
 260         };
 261
 262         soc {
 263                 compatible = "simple-bus";
 264                 interrupt-parent = <&gic>;
 265                 #address-cells = <2>;
 266                 #size-cells = <2>;
 267                 ranges;
 268
 269                 rwdt: watchdog@e6020000 {
 270                         compatible = "renesas,r8a774a1-wdt",
 271                                      "renesas,rcar-gen3-wdt";
 272                         reg = <0 0xe6020000 0 0x0c>;
 273                         interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
 274                         clocks = <&cpg CPG_MOD 402>;
 275                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 276                         resets = <&cpg 402>;
 277                         status = "disabled";
 278                 };
 279
 280                 gpio0: gpio@e6050000 {
 281                         compatible = "renesas,gpio-r8a774a1",
 282                                      "renesas,rcar-gen3-gpio";
 283                         reg = <0 0xe6050000 0 0x50>;
 284                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 285                         #gpio-cells = <2>;
 286                         gpio-controller;
 287                         gpio-ranges = <&pfc 0 0 16>;
 288                         #interrupt-cells = <2>;
 289                         interrupt-controller;
 290                         clocks = <&cpg CPG_MOD 912>;
 291                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 292                         resets = <&cpg 912>;
 293                 };
 294
 295                 gpio1: gpio@e6051000 {
 296                         compatible = "renesas,gpio-r8a774a1",
 297                                      "renesas,rcar-gen3-gpio";
 298                         reg = <0 0xe6051000 0 0x50>;
 299                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 300                         #gpio-cells = <2>;
 301                         gpio-controller;
 302                         gpio-ranges = <&pfc 0 32 29>;
 303                         #interrupt-cells = <2>;
 304                         interrupt-controller;
 305                         clocks = <&cpg CPG_MOD 911>;
 306                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 307                         resets = <&cpg 911>;
 308                 };
 309
 310                 gpio2: gpio@e6052000 {
 311                         compatible = "renesas,gpio-r8a774a1",
 312                                      "renesas,rcar-gen3-gpio";
 313                         reg = <0 0xe6052000 0 0x50>;
 314                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 315                         #gpio-cells = <2>;
 316                         gpio-controller;
 317                         gpio-ranges = <&pfc 0 64 15>;
 318                         #interrupt-cells = <2>;
 319                         interrupt-controller;
 320                         clocks = <&cpg CPG_MOD 910>;
 321                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 322                         resets = <&cpg 910>;
 323                 };
 324
 325                 gpio3: gpio@e6053000 {
 326                         compatible = "renesas,gpio-r8a774a1",
 327                                      "renesas,rcar-gen3-gpio";
 328                         reg = <0 0xe6053000 0 0x50>;
 329                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 330                         #gpio-cells = <2>;
 331                         gpio-controller;
 332                         gpio-ranges = <&pfc 0 96 16>;
 333                         #interrupt-cells = <2>;
 334                         interrupt-controller;
 335                         clocks = <&cpg CPG_MOD 909>;
 336                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 337                         resets = <&cpg 909>;
 338                 };
 339
 340                 gpio4: gpio@e6054000 {
 341                         compatible = "renesas,gpio-r8a774a1",
 342                                      "renesas,rcar-gen3-gpio";
 343                         reg = <0 0xe6054000 0 0x50>;
 344                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 345                         #gpio-cells = <2>;
 346                         gpio-controller;
 347                         gpio-ranges = <&pfc 0 128 18>;
 348                         #interrupt-cells = <2>;
 349                         interrupt-controller;
 350                         clocks = <&cpg CPG_MOD 908>;
 351                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 352                         resets = <&cpg 908>;
 353                 };
 354
 355                 gpio5: gpio@e6055000 {
 356                         compatible = "renesas,gpio-r8a774a1",
 357                                      "renesas,rcar-gen3-gpio";
 358                         reg = <0 0xe6055000 0 0x50>;
 359                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 360                         #gpio-cells = <2>;
 361                         gpio-controller;
 362                         gpio-ranges = <&pfc 0 160 26>;
 363                         #interrupt-cells = <2>;
 364                         interrupt-controller;
 365                         clocks = <&cpg CPG_MOD 907>;
 366                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 367                         resets = <&cpg 907>;
 368                 };
 369
 370                 gpio6: gpio@e6055400 {
 371                         compatible = "renesas,gpio-r8a774a1",
 372                                      "renesas,rcar-gen3-gpio";
 373                         reg = <0 0xe6055400 0 0x50>;
 374                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 375                         #gpio-cells = <2>;
 376                         gpio-controller;
 377                         gpio-ranges = <&pfc 0 192 32>;
 378                         #interrupt-cells = <2>;
 379                         interrupt-controller;
 380                         clocks = <&cpg CPG_MOD 906>;
 381                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 382                         resets = <&cpg 906>;
 383                 };
 384
 385                 gpio7: gpio@e6055800 {
 386                         compatible = "renesas,gpio-r8a774a1",
 387                                      "renesas,rcar-gen3-gpio";
 388                         reg = <0 0xe6055800 0 0x50>;
 389                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 390                         #gpio-cells = <2>;
 391                         gpio-controller;
 392                         gpio-ranges = <&pfc 0 224 4>;
 393                         #interrupt-cells = <2>;
 394                         interrupt-controller;
 395                         clocks = <&cpg CPG_MOD 905>;
 396                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 397                         resets = <&cpg 905>;
 398                 };
 399
 400                 pfc: pinctrl@e6060000 {
 401                         compatible = "renesas,pfc-r8a774a1";
 402                         reg = <0 0xe6060000 0 0x50c>;
 403                 };
 404
 405                 cmt0: timer@e60f0000 {
 406                         compatible = "renesas,r8a774a1-cmt0",
 407                                      "renesas,rcar-gen3-cmt0";
 408                         reg = <0 0xe60f0000 0 0x1004>;
 409                         interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
 410                                      <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
 411                         clocks = <&cpg CPG_MOD 303>;
 412                         clock-names = "fck";
 413                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 414                         resets = <&cpg 303>;
 415                         status = "disabled";
 416                 };
 417
 418                 cmt1: timer@e6130000 {
 419                         compatible = "renesas,r8a774a1-cmt1",
 420                                      "renesas,rcar-gen3-cmt1";
 421                         reg = <0 0xe6130000 0 0x1004>;
 422                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
 423                                      <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
 424                                      <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
 425                                      <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
 426                                      <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
 427                                      <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
 428                                      <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
 429                                      <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
 430                         clocks = <&cpg CPG_MOD 302>;
 431                         clock-names = "fck";
 432                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 433                         resets = <&cpg 302>;
 434                         status = "disabled";
 435                 };
 436
 437                 cmt2: timer@e6140000 {
 438                         compatible = "renesas,r8a774a1-cmt1",
 439                                      "renesas,rcar-gen3-cmt1";
 440                         reg = <0 0xe6140000 0 0x1004>;
 441                         interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
 442                                      <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
 443                                      <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
 444                                      <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
 445                                      <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
 446                                      <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
 447                                      <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
 448                                      <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
 449                         clocks = <&cpg CPG_MOD 301>;
 450                         clock-names = "fck";
 451                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 452                         resets = <&cpg 301>;
 453                         status = "disabled";
 454                 };
 455
 456                 cmt3: timer@e6148000 {
 457                         compatible = "renesas,r8a774a1-cmt1",
 458                                      "renesas,rcar-gen3-cmt1";
 459                         reg = <0 0xe6148000 0 0x1004>;
 460                         interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
 461                                      <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
 462                                      <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
 463                                      <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
 464                                      <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
 465                                      <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
 466                                      <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
 467                                      <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
 468                         clocks = <&cpg CPG_MOD 300>;
 469                         clock-names = "fck";
 470                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 471                         resets = <&cpg 300>;
 472                         status = "disabled";
 473                 };
 474
 475                 cpg: clock-controller@e6150000 {
 476                         compatible = "renesas,r8a774a1-cpg-mssr";
 477                         reg = <0 0xe6150000 0 0x0bb0>;
 478                         clocks = <&extal_clk>, <&extalr_clk>;
 479                         clock-names = "extal", "extalr";
 480                         #clock-cells = <2>;
 481                         #power-domain-cells = <0>;
 482                         #reset-cells = <1>;
 483                 };
 484
 485                 rst: reset-controller@e6160000 {
 486                         compatible = "renesas,r8a774a1-rst";
 487                         reg = <0 0xe6160000 0 0x018c>;
 488                 };
 489
 490                 sysc: system-controller@e6180000 {
 491                         compatible = "renesas,r8a774a1-sysc";
 492                         reg = <0 0xe6180000 0 0x0400>;
 493                         #power-domain-cells = <1>;
 494                 };
 495
 496                 tsc: thermal@e6198000 {
 497                         compatible = "renesas,r8a774a1-thermal";
 498                         reg = <0 0xe6198000 0 0x100>,
 499                               <0 0xe61a0000 0 0x100>,
 500                               <0 0xe61a8000 0 0x100>;
 501                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
 502                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 503                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 504                         clocks = <&cpg CPG_MOD 522>;
 505                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 506                         resets = <&cpg 522>;
 507                         #thermal-sensor-cells = <1>;
 508                 };
 509
 510                 intc_ex: interrupt-controller@e61c0000 {
 511                         compatible = "renesas,intc-ex-r8a774a1", "renesas,irqc";
 512                         #interrupt-cells = <2>;
 513                         interrupt-controller;
 514                         reg = <0 0xe61c0000 0 0x200>;
 515                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 516                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 517                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 518                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 519                                      <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
 520                                      <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 521                         clocks = <&cpg CPG_MOD 407>;
 522                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 523                         resets = <&cpg 407>;
 524                 };
 525
 526                 tmu0: timer@e61e0000 {
 527                         compatible = "renesas,tmu-r8a774a1", "renesas,tmu";
 528                         reg = <0 0xe61e0000 0 0x30>;
 529                         interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
 530                                      <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
 531                                      <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
 532                         interrupt-names = "tuni0", "tuni1", "tuni2";
 533                         clocks = <&cpg CPG_MOD 125>;
 534                         clock-names = "fck";
 535                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 536                         resets = <&cpg 125>;
 537                         status = "disabled";
 538                 };
 539
 540                 tmu1: timer@e6fc0000 {
 541                         compatible = "renesas,tmu-r8a774a1", "renesas,tmu";
 542                         reg = <0 0xe6fc0000 0 0x30>;
 543                         interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
 544                                      <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
 545                                      <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
 546                                      <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
 547                         interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
 548                         clocks = <&cpg CPG_MOD 124>;
 549                         clock-names = "fck";
 550                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 551                         resets = <&cpg 124>;
 552                         status = "disabled";
 553                 };
 554
 555                 tmu2: timer@e6fd0000 {
 556                         compatible = "renesas,tmu-r8a774a1", "renesas,tmu";
 557                         reg = <0 0xe6fd0000 0 0x30>;
 558                         interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
 559                                      <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
 560                                      <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
 561                                      <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
 562                         interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
 563                         clocks = <&cpg CPG_MOD 123>;
 564                         clock-names = "fck";
 565                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 566                         resets = <&cpg 123>;
 567                         status = "disabled";
 568                 };
 569
 570                 tmu3: timer@e6fe0000 {
 571                         compatible = "renesas,tmu-r8a774a1", "renesas,tmu";
 572                         reg = <0 0xe6fe0000 0 0x30>;
 573                         interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
 574                                      <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
 575                                      <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
 576                         interrupt-names = "tuni0", "tuni1", "tuni2";
 577                         clocks = <&cpg CPG_MOD 122>;
 578                         clock-names = "fck";
 579                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 580                         resets = <&cpg 122>;
 581                         status = "disabled";
 582                 };
 583
 584                 tmu4: timer@ffc00000 {
 585                         compatible = "renesas,tmu-r8a774a1", "renesas,tmu";
 586                         reg = <0 0xffc00000 0 0x30>;
 587                         interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
 588                                      <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
 589                                      <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
 590                         interrupt-names = "tuni0", "tuni1", "tuni2";
 591                         clocks = <&cpg CPG_MOD 121>;
 592                         clock-names = "fck";
 593                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 594                         resets = <&cpg 121>;
 595                         status = "disabled";
 596                 };
 597
 598                 i2c0: i2c@e6500000 {
 599                         #address-cells = <1>;
 600                         #size-cells = <0>;
 601                         compatible = "renesas,i2c-r8a774a1",
 602                                      "renesas,rcar-gen3-i2c";
 603                         reg = <0 0xe6500000 0 0x40>;
 604                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 605                         clocks = <&cpg CPG_MOD 931>;
 606                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 607                         resets = <&cpg 931>;
 608                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
 609                                <&dmac2 0x91>, <&dmac2 0x90>;
 610                         dma-names = "tx", "rx", "tx", "rx";
 611                         i2c-scl-internal-delay-ns = <110>;
 612                         status = "disabled";
 613                 };
 614
 615                 i2c1: i2c@e6508000 {
 616                         #address-cells = <1>;
 617                         #size-cells = <0>;
 618                         compatible = "renesas,i2c-r8a774a1",
 619                                      "renesas,rcar-gen3-i2c";
 620                         reg = <0 0xe6508000 0 0x40>;
 621                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 622                         clocks = <&cpg CPG_MOD 930>;
 623                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 624                         resets = <&cpg 930>;
 625                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
 626                                <&dmac2 0x93>, <&dmac2 0x92>;
 627                         dma-names = "tx", "rx", "tx", "rx";
 628                         i2c-scl-internal-delay-ns = <6>;
 629                         status = "disabled";
 630                 };
 631
 632                 i2c2: i2c@e6510000 {
 633                         #address-cells = <1>;
 634                         #size-cells = <0>;
 635                         compatible = "renesas,i2c-r8a774a1",
 636                                      "renesas,rcar-gen3-i2c";
 637                         reg = <0 0xe6510000 0 0x40>;
 638                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 639                         clocks = <&cpg CPG_MOD 929>;
 640                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 641                         resets = <&cpg 929>;
 642                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
 643                                <&dmac2 0x95>, <&dmac2 0x94>;
 644                         dma-names = "tx", "rx", "tx", "rx";
 645                         i2c-scl-internal-delay-ns = <6>;
 646                         status = "disabled";
 647                 };
 648
 649                 i2c3: i2c@e66d0000 {
 650                         #address-cells = <1>;
 651                         #size-cells = <0>;
 652                         compatible = "renesas,i2c-r8a774a1",
 653                                      "renesas,rcar-gen3-i2c";
 654                         reg = <0 0xe66d0000 0 0x40>;
 655                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 656                         clocks = <&cpg CPG_MOD 928>;
 657                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 658                         resets = <&cpg 928>;
 659                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 660                         dma-names = "tx", "rx";
 661                         i2c-scl-internal-delay-ns = <110>;
 662                         status = "disabled";
 663                 };
 664
 665                 i2c4: i2c@e66d8000 {
 666                         #address-cells = <1>;
 667                         #size-cells = <0>;
 668                         compatible = "renesas,i2c-r8a774a1",
 669                                      "renesas,rcar-gen3-i2c";
 670                         reg = <0 0xe66d8000 0 0x40>;
 671                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 672                         clocks = <&cpg CPG_MOD 927>;
 673                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 674                         resets = <&cpg 927>;
 675                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 676                         dma-names = "tx", "rx";
 677                         i2c-scl-internal-delay-ns = <110>;
 678                         status = "disabled";
 679                 };
 680
 681                 i2c5: i2c@e66e0000 {
 682                         #address-cells = <1>;
 683                         #size-cells = <0>;
 684                         compatible = "renesas,i2c-r8a774a1",
 685                                      "renesas,rcar-gen3-i2c";
 686                         reg = <0 0xe66e0000 0 0x40>;
 687                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 688                         clocks = <&cpg CPG_MOD 919>;
 689                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 690                         resets = <&cpg 919>;
 691                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 692                         dma-names = "tx", "rx";
 693                         i2c-scl-internal-delay-ns = <110>;
 694                         status = "disabled";
 695                 };
 696
 697                 i2c6: i2c@e66e8000 {
 698                         #address-cells = <1>;
 699                         #size-cells = <0>;
 700                         compatible = "renesas,i2c-r8a774a1",
 701                                      "renesas,rcar-gen3-i2c";
 702                         reg = <0 0xe66e8000 0 0x40>;
 703                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 704                         clocks = <&cpg CPG_MOD 918>;
 705                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 706                         resets = <&cpg 918>;
 707                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 708                         dma-names = "tx", "rx";
 709                         i2c-scl-internal-delay-ns = <6>;
 710                         status = "disabled";
 711                 };
 712
 713                 iic_pmic: i2c@e60b0000 {
 714                         #address-cells = <1>;
 715                         #size-cells = <0>;
 716                         compatible = "renesas,iic-r8a774a1",
 717                                      "renesas,rcar-gen3-iic",
 718                                      "renesas,rmobile-iic";
 719                         reg = <0 0xe60b0000 0 0x425>;
 720                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 721                         clocks = <&cpg CPG_MOD 926>;
 722                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 723                         resets = <&cpg 926>;
 724                         dmas = <&dmac0 0x11>, <&dmac0 0x10>;
 725                         dma-names = "tx", "rx";
 726                         status = "disabled";
 727                 };
 728
 729                 hscif0: serial@e6540000 {
 730                         compatible = "renesas,hscif-r8a774a1",
 731                                      "renesas,rcar-gen3-hscif",
 732                                      "renesas,hscif";
 733                         reg = <0 0xe6540000 0 0x60>;
 734                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 735                         clocks = <&cpg CPG_MOD 520>,
 736                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
 737                                  <&scif_clk>;
 738                         clock-names = "fck", "brg_int", "scif_clk";
 739                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
 740                                <&dmac2 0x31>, <&dmac2 0x30>;
 741                         dma-names = "tx", "rx", "tx", "rx";
 742                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 743                         resets = <&cpg 520>;
 744                         status = "disabled";
 745                 };
 746
 747                 hscif1: serial@e6550000 {
 748                         compatible = "renesas,hscif-r8a774a1",
 749                                      "renesas,rcar-gen3-hscif",
 750                                      "renesas,hscif";
 751                         reg = <0 0xe6550000 0 0x60>;
 752                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 753                         clocks = <&cpg CPG_MOD 519>,
 754                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
 755                                  <&scif_clk>;
 756                         clock-names = "fck", "brg_int", "scif_clk";
 757                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
 758                                <&dmac2 0x33>, <&dmac2 0x32>;
 759                         dma-names = "tx", "rx", "tx", "rx";
 760                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 761                         resets = <&cpg 519>;
 762                         status = "disabled";
 763                 };
 764
 765                 hscif2: serial@e6560000 {
 766                         compatible = "renesas,hscif-r8a774a1",
 767                                      "renesas,rcar-gen3-hscif",
 768                                      "renesas,hscif";
 769                         reg = <0 0xe6560000 0 0x60>;
 770                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 771                         clocks = <&cpg CPG_MOD 518>,
 772                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
 773                                  <&scif_clk>;
 774                         clock-names = "fck", "brg_int", "scif_clk";
 775                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
 776                                <&dmac2 0x35>, <&dmac2 0x34>;
 777                         dma-names = "tx", "rx", "tx", "rx";
 778                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 779                         resets = <&cpg 518>;
 780                         status = "disabled";
 781                 };
 782
 783                 hscif3: serial@e66a0000 {
 784                         compatible = "renesas,hscif-r8a774a1",
 785                                      "renesas,rcar-gen3-hscif",
 786                                      "renesas,hscif";
 787                         reg = <0 0xe66a0000 0 0x60>;
 788                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 789                         clocks = <&cpg CPG_MOD 517>,
 790                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
 791                                  <&scif_clk>;
 792                         clock-names = "fck", "brg_int", "scif_clk";
 793                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 794                         dma-names = "tx", "rx";
 795                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 796                         resets = <&cpg 517>;
 797                         status = "disabled";
 798                 };
 799
 800                 hscif4: serial@e66b0000 {
 801                         compatible = "renesas,hscif-r8a774a1",
 802                                      "renesas,rcar-gen3-hscif",
 803                                      "renesas,hscif";
 804                         reg = <0 0xe66b0000 0 0x60>;
 805                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 806                         clocks = <&cpg CPG_MOD 516>,
 807                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
 808                                  <&scif_clk>;
 809                         clock-names = "fck", "brg_int", "scif_clk";
 810                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 811                         dma-names = "tx", "rx";
 812                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 813                         resets = <&cpg 516>;
 814                         status = "disabled";
 815                 };
 816
 817                 hsusb: usb@e6590000 {
 818                         compatible = "renesas,usbhs-r8a774a1",
 819                                      "renesas,rcar-gen3-usbhs";
 820                         reg = <0 0xe6590000 0 0x200>;
 821                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 822                         clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
 823                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
 824                                <&usb_dmac1 0>, <&usb_dmac1 1>;
 825                         dma-names = "ch0", "ch1", "ch2", "ch3";
 826                         renesas,buswait = <11>;
 827                         phys = <&usb2_phy0 3>;
 828                         phy-names = "usb";
 829                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 830                         resets = <&cpg 704>, <&cpg 703>;
 831                         status = "disabled";
 832                 };
 833
 834                 usb2_clksel: clock-controller@e6590630 {
 835                         compatible = "renesas,r8a774a1-rcar-usb2-clock-sel",
 836                                      "renesas,rcar-gen3-usb2-clock-sel";
 837                         reg = <0 0xe6590630 0 0x02>;
 838                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>,
 839                                  <&usb_extal_clk>, <&usb3s0_clk>;
 840                         clock-names = "ehci_ohci", "hs-usb-if",
 841                                       "usb_extal", "usb_xtal";
 842                         #clock-cells = <0>;
 843                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 844                         resets = <&cpg 703>, <&cpg 704>;
 845                         reset-names = "ehci_ohci", "hs-usb-if";
 846                         status = "disabled";
 847                 };
 848
 849                 usb_dmac0: dma-controller@e65a0000 {
 850                         compatible = "renesas,r8a774a1-usb-dmac",
 851                                      "renesas,usb-dmac";
 852                         reg = <0 0xe65a0000 0 0x100>;
 853                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
 854                                      <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 855                         interrupt-names = "ch0", "ch1";
 856                         clocks = <&cpg CPG_MOD 330>;
 857                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 858                         resets = <&cpg 330>;
 859                         #dma-cells = <1>;
 860                         dma-channels = <2>;
 861                 };
 862
 863                 usb_dmac1: dma-controller@e65b0000 {
 864                         compatible = "renesas,r8a774a1-usb-dmac",
 865                                      "renesas,usb-dmac";
 866                         reg = <0 0xe65b0000 0 0x100>;
 867                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
 868                                      <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 869                         interrupt-names = "ch0", "ch1";
 870                         clocks = <&cpg CPG_MOD 331>;
 871                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 872                         resets = <&cpg 331>;
 873                         #dma-cells = <1>;
 874                         dma-channels = <2>;
 875                 };
 876
 877                 usb3_phy0: usb-phy@e65ee000 {
 878                         compatible = "renesas,r8a774a1-usb3-phy",
 879                                      "renesas,rcar-gen3-usb3-phy";
 880                         reg = <0 0xe65ee000 0 0x90>;
 881                         clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
 882                                  <&usb_extal_clk>;
 883                         clock-names = "usb3-if", "usb3s_clk", "usb_extal";
 884                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 885                         resets = <&cpg 328>;
 886                         #phy-cells = <0>;
 887                         status = "disabled";
 888                 };
 889
 890                 dmac0: dma-controller@e6700000 {
 891                         compatible = "renesas,dmac-r8a774a1",
 892                                      "renesas,rcar-dmac";
 893                         reg = <0 0xe6700000 0 0x10000>;
 894                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
 895                                      <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
 896                                      <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
 897                                      <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
 898                                      <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
 899                                      <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
 900                                      <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
 901                                      <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
 902                                      <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
 903                                      <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
 904                                      <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
 905                                      <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
 906                                      <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
 907                                      <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
 908                                      <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
 909                                      <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
 910                                      <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 911                         interrupt-names = "error",
 912                                         "ch0", "ch1", "ch2", "ch3",
 913                                         "ch4", "ch5", "ch6", "ch7",
 914                                         "ch8", "ch9", "ch10", "ch11",
 915                                         "ch12", "ch13", "ch14", "ch15";
 916                         clocks = <&cpg CPG_MOD 219>;
 917                         clock-names = "fck";
 918                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 919                         resets = <&cpg 219>;
 920                         #dma-cells = <1>;
 921                         dma-channels = <16>;
 922                         iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
 923                                <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
 924                                <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
 925                                <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
 926                                <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
 927                                <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
 928                                <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
 929                                <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
 930                 };
 931
 932                 dmac1: dma-controller@e7300000 {
 933                         compatible = "renesas,dmac-r8a774a1",
 934                                      "renesas,rcar-dmac";
 935                         reg = <0 0xe7300000 0 0x10000>;
 936                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
 937                                      <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
 938                                      <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
 939                                      <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
 940                                      <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
 941                                      <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
 942                                      <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
 943                                      <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
 944                                      <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
 945                                      <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
 946                                      <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
 947                                      <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
 948                                      <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
 949                                      <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
 950                                      <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
 951                                      <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
 952                                      <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 953                         interrupt-names = "error",
 954                                         "ch0", "ch1", "ch2", "ch3",
 955                                         "ch4", "ch5", "ch6", "ch7",
 956                                         "ch8", "ch9", "ch10", "ch11",
 957                                         "ch12", "ch13", "ch14", "ch15";
 958                         clocks = <&cpg CPG_MOD 218>;
 959                         clock-names = "fck";
 960                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 961                         resets = <&cpg 218>;
 962                         #dma-cells = <1>;
 963                         dma-channels = <16>;
 964                         iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
 965                                <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
 966                                <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
 967                                <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
 968                                <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
 969                                <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
 970                                <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
 971                                <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
 972                 };
 973
 974                 dmac2: dma-controller@e7310000 {
 975                         compatible = "renesas,dmac-r8a774a1",
 976                                      "renesas,rcar-dmac";
 977                         reg = <0 0xe7310000 0 0x10000>;
 978                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
 979                                      <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
 980                                      <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
 981                                      <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
 982                                      <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
 983                                      <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
 984                                      <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
 985                                      <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
 986                                      <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
 987                                      <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
 988                                      <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
 989                                      <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
 990                                      <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
 991                                      <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
 992                                      <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
 993                                      <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
 994                                      <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 995                         interrupt-names = "error",
 996                                         "ch0", "ch1", "ch2", "ch3",
 997                                         "ch4", "ch5", "ch6", "ch7",
 998                                         "ch8", "ch9", "ch10", "ch11",
 999                                         "ch12", "ch13", "ch14", "ch15";
1000                         clocks = <&cpg CPG_MOD 217>;
1001                         clock-names = "fck";
1002                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1003                         resets = <&cpg 217>;
1004                         #dma-cells = <1>;
1005                         dma-channels = <16>;
1006                         iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
1007                                <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
1008                                <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
1009                                <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
1010                                <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
1011                                <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
1012                                <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
1013                                <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
1014                 };
1015
1016                 ipmmu_ds0: iommu@e6740000 {
1017                         compatible = "renesas,ipmmu-r8a774a1";
1018                         reg = <0 0xe6740000 0 0x1000>;
1019                         renesas,ipmmu-main = <&ipmmu_mm 0>;
1020                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1021                         #iommu-cells = <1>;
1022                 };
1023
1024                 ipmmu_ds1: iommu@e7740000 {
1025                         compatible = "renesas,ipmmu-r8a774a1";
1026                         reg = <0 0xe7740000 0 0x1000>;
1027                         renesas,ipmmu-main = <&ipmmu_mm 1>;
1028                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1029                         #iommu-cells = <1>;
1030                 };
1031
1032                 ipmmu_hc: iommu@e6570000 {
1033                         compatible = "renesas,ipmmu-r8a774a1";
1034                         reg = <0 0xe6570000 0 0x1000>;
1035                         renesas,ipmmu-main = <&ipmmu_mm 2>;
1036                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1037                         #iommu-cells = <1>;
1038                 };
1039
1040                 ipmmu_mm: iommu@e67b0000 {
1041                         compatible = "renesas,ipmmu-r8a774a1";
1042                         reg = <0 0xe67b0000 0 0x1000>;
1043                         interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
1044                                      <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
1045                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1046                         #iommu-cells = <1>;
1047                 };
1048
1049                 ipmmu_mp: iommu@ec670000 {
1050                         compatible = "renesas,ipmmu-r8a774a1";
1051                         reg = <0 0xec670000 0 0x1000>;
1052                         renesas,ipmmu-main = <&ipmmu_mm 4>;
1053                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1054                         #iommu-cells = <1>;
1055                 };
1056
1057                 ipmmu_pv0: iommu@fd800000 {
1058                         compatible = "renesas,ipmmu-r8a774a1";
1059                         reg = <0 0xfd800000 0 0x1000>;
1060                         renesas,ipmmu-main = <&ipmmu_mm 5>;
1061                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1062                         #iommu-cells = <1>;
1063                 };
1064
1065                 ipmmu_pv1: iommu@fd950000 {
1066                         compatible = "renesas,ipmmu-r8a774a1";
1067                         reg = <0 0xfd950000 0 0x1000>;
1068                         renesas,ipmmu-main = <&ipmmu_mm 6>;
1069                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1070                         #iommu-cells = <1>;
1071                 };
1072
1073                 ipmmu_vc0: iommu@fe6b0000 {
1074                         compatible = "renesas,ipmmu-r8a774a1";
1075                         reg = <0 0xfe6b0000 0 0x1000>;
1076                         renesas,ipmmu-main = <&ipmmu_mm 8>;
1077                         power-domains = <&sysc R8A774A1_PD_A3VC>;
1078                         #iommu-cells = <1>;
1079                 };
1080
1081                 ipmmu_vi0: iommu@febd0000 {
1082                         compatible = "renesas,ipmmu-r8a774a1";
1083                         reg = <0 0xfebd0000 0 0x1000>;
1084                         renesas,ipmmu-main = <&ipmmu_mm 9>;
1085                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1086                         #iommu-cells = <1>;
1087                 };
1088
1089                 avb: ethernet@e6800000 {
1090                         compatible = "renesas,etheravb-r8a774a1",
1091                                      "renesas,etheravb-rcar-gen3";
1092                         reg = <0 0xe6800000 0 0x800>;
1093                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
1094                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
1095                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
1096                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
1097                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
1098                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
1099                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
1100                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
1101                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
1102                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
1103                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
1104                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
1105                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
1106                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
1107                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
1108                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
1109                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
1110                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
1111                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
1112                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
1113                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
1114                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
1115                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
1116                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
1117                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
1118                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
1119                                           "ch4", "ch5", "ch6", "ch7",
1120                                           "ch8", "ch9", "ch10", "ch11",
1121                                           "ch12", "ch13", "ch14", "ch15",
1122                                           "ch16", "ch17", "ch18", "ch19",
1123                                           "ch20", "ch21", "ch22", "ch23",
1124                                           "ch24";
1125                         clocks = <&cpg CPG_MOD 812>;
1126                         clock-names = "fck";
1127                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1128                         resets = <&cpg 812>;
1129                         phy-mode = "rgmii";
1130                         rx-internal-delay-ps = <0>;
1131                         tx-internal-delay-ps = <0>;
1132                         iommus = <&ipmmu_ds0 16>;
1133                         #address-cells = <1>;
1134                         #size-cells = <0>;
1135                         status = "disabled";
1136                 };
1137
1138                 can0: can@e6c30000 {
1139                         compatible = "renesas,can-r8a774a1",
1140                                      "renesas,rcar-gen3-can";
1141                         reg = <0 0xe6c30000 0 0x1000>;
1142                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1143                         clocks = <&cpg CPG_MOD 916>,
1144                                  <&cpg CPG_CORE R8A774A1_CLK_CANFD>,
1145                                  <&can_clk>;
1146                         clock-names = "clkp1", "clkp2", "can_clk";
1147                         assigned-clocks = <&cpg CPG_CORE R8A774A1_CLK_CANFD>;
1148                         assigned-clock-rates = <40000000>;
1149                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1150                         resets = <&cpg 916>;
1151                         status = "disabled";
1152                 };
1153
1154                 can1: can@e6c38000 {
1155                         compatible = "renesas,can-r8a774a1",
1156                                      "renesas,rcar-gen3-can";
1157                         reg = <0 0xe6c38000 0 0x1000>;
1158                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1159                         clocks = <&cpg CPG_MOD 915>,
1160                                  <&cpg CPG_CORE R8A774A1_CLK_CANFD>,
1161                                  <&can_clk>;
1162                         clock-names = "clkp1", "clkp2", "can_clk";
1163                         assigned-clocks = <&cpg CPG_CORE R8A774A1_CLK_CANFD>;
1164                         assigned-clock-rates = <40000000>;
1165                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1166                         resets = <&cpg 915>;
1167                         status = "disabled";
1168                 };
1169
1170                 canfd: can@e66c0000 {
1171                         compatible = "renesas,r8a774a1-canfd",
1172                                      "renesas,rcar-gen3-canfd";
1173                         reg = <0 0xe66c0000 0 0x8000>;
1174                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1175                                      <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1176                         interrupt-names = "ch_int", "g_int";
1177                         clocks = <&cpg CPG_MOD 914>,
1178                                  <&cpg CPG_CORE R8A774A1_CLK_CANFD>,
1179                                  <&can_clk>;
1180                         clock-names = "fck", "canfd", "can_clk";
1181                         assigned-clocks = <&cpg CPG_CORE R8A774A1_CLK_CANFD>;
1182                         assigned-clock-rates = <40000000>;
1183                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1184                         resets = <&cpg 914>;
1185                         status = "disabled";
1186
1187                         channel0 {
1188                                 status = "disabled";
1189                         };
1190
1191                         channel1 {
1192                                 status = "disabled";
1193                         };
1194                 };
1195
1196                 pwm0: pwm@e6e30000 {
1197                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1198                         reg = <0 0xe6e30000 0 0x8>;
1199                         #pwm-cells = <2>;
1200                         clocks = <&cpg CPG_MOD 523>;
1201                         resets = <&cpg 523>;
1202                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1203                         status = "disabled";
1204                 };
1205
1206                 pwm1: pwm@e6e31000 {
1207                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1208                         reg = <0 0xe6e31000 0 0x8>;
1209                         #pwm-cells = <2>;
1210                         clocks = <&cpg CPG_MOD 523>;
1211                         resets = <&cpg 523>;
1212                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1213                         status = "disabled";
1214                 };
1215
1216                 pwm2: pwm@e6e32000 {
1217                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1218                         reg = <0 0xe6e32000 0 0x8>;
1219                         #pwm-cells = <2>;
1220                         clocks = <&cpg CPG_MOD 523>;
1221                         resets = <&cpg 523>;
1222                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1223                         status = "disabled";
1224                 };
1225
1226                 pwm3: pwm@e6e33000 {
1227                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1228                         reg = <0 0xe6e33000 0 0x8>;
1229                         #pwm-cells = <2>;
1230                         clocks = <&cpg CPG_MOD 523>;
1231                         resets = <&cpg 523>;
1232                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1233                         status = "disabled";
1234                 };
1235
1236                 pwm4: pwm@e6e34000 {
1237                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1238                         reg = <0 0xe6e34000 0 0x8>;
1239                         #pwm-cells = <2>;
1240                         clocks = <&cpg CPG_MOD 523>;
1241                         resets = <&cpg 523>;
1242                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1243                         status = "disabled";
1244                 };
1245
1246                 pwm5: pwm@e6e35000 {
1247                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1248                         reg = <0 0xe6e35000 0 0x8>;
1249                         #pwm-cells = <2>;
1250                         clocks = <&cpg CPG_MOD 523>;
1251                         resets = <&cpg 523>;
1252                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1253                         status = "disabled";
1254                 };
1255
1256                 pwm6: pwm@e6e36000 {
1257                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1258                         reg = <0 0xe6e36000 0 0x8>;
1259                         #pwm-cells = <2>;
1260                         clocks = <&cpg CPG_MOD 523>;
1261                         resets = <&cpg 523>;
1262                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1263                         status = "disabled";
1264                 };
1265
1266                 scif0: serial@e6e60000 {
1267                         compatible = "renesas,scif-r8a774a1",
1268                                      "renesas,rcar-gen3-scif", "renesas,scif";
1269                         reg = <0 0xe6e60000 0 0x40>;
1270                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1271                         clocks = <&cpg CPG_MOD 207>,
1272                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
1273                                  <&scif_clk>;
1274                         clock-names = "fck", "brg_int", "scif_clk";
1275                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1276                                <&dmac2 0x51>, <&dmac2 0x50>;
1277                         dma-names = "tx", "rx", "tx", "rx";
1278                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1279                         resets = <&cpg 207>;
1280                         status = "disabled";
1281                 };
1282
1283                 scif1: serial@e6e68000 {
1284                         compatible = "renesas,scif-r8a774a1",
1285                                      "renesas,rcar-gen3-scif", "renesas,scif";
1286                         reg = <0 0xe6e68000 0 0x40>;
1287                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1288                         clocks = <&cpg CPG_MOD 206>,
1289                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
1290                                  <&scif_clk>;
1291                         clock-names = "fck", "brg_int", "scif_clk";
1292                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1293                                <&dmac2 0x53>, <&dmac2 0x52>;
1294                         dma-names = "tx", "rx", "tx", "rx";
1295                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1296                         resets = <&cpg 206>;
1297                         status = "disabled";
1298                 };
1299
1300                 scif2: serial@e6e88000 {
1301                         compatible = "renesas,scif-r8a774a1",
1302                                      "renesas,rcar-gen3-scif", "renesas,scif";
1303                         reg = <0 0xe6e88000 0 0x40>;
1304                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1305                         clocks = <&cpg CPG_MOD 310>,
1306                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
1307                                  <&scif_clk>;
1308                         clock-names = "fck", "brg_int", "scif_clk";
1309                         dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1310                                <&dmac2 0x13>, <&dmac2 0x12>;
1311                         dma-names = "tx", "rx", "tx", "rx";
1312                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1313                         resets = <&cpg 310>;
1314                         status = "disabled";
1315                 };
1316
1317                 scif3: serial@e6c50000 {
1318                         compatible = "renesas,scif-r8a774a1",
1319                                      "renesas,rcar-gen3-scif", "renesas,scif";
1320                         reg = <0 0xe6c50000 0 0x40>;
1321                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1322                         clocks = <&cpg CPG_MOD 204>,
1323                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
1324                                  <&scif_clk>;
1325                         clock-names = "fck", "brg_int", "scif_clk";
1326                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1327                         dma-names = "tx", "rx";
1328                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1329                         resets = <&cpg 204>;
1330                         status = "disabled";
1331                 };
1332
1333                 scif4: serial@e6c40000 {
1334                         compatible = "renesas,scif-r8a774a1",
1335                                      "renesas,rcar-gen3-scif", "renesas,scif";
1336                         reg = <0 0xe6c40000 0 0x40>;
1337                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1338                         clocks = <&cpg CPG_MOD 203>,
1339                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
1340                                  <&scif_clk>;
1341                         clock-names = "fck", "brg_int", "scif_clk";
1342                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1343                         dma-names = "tx", "rx";
1344                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1345                         resets = <&cpg 203>;
1346                         status = "disabled";
1347                 };
1348
1349                 scif5: serial@e6f30000 {
1350                         compatible = "renesas,scif-r8a774a1",
1351                                      "renesas,rcar-gen3-scif", "renesas,scif";
1352                         reg = <0 0xe6f30000 0 0x40>;
1353                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1354                         clocks = <&cpg CPG_MOD 202>,
1355                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
1356                                  <&scif_clk>;
1357                         clock-names = "fck", "brg_int", "scif_clk";
1358                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1359                                <&dmac2 0x5b>, <&dmac2 0x5a>;
1360                         dma-names = "tx", "rx", "tx", "rx";
1361                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1362                         resets = <&cpg 202>;
1363                         status = "disabled";
1364                 };
1365
1366                 msiof0: spi@e6e90000 {
1367                         compatible = "renesas,msiof-r8a774a1",
1368                                      "renesas,rcar-gen3-msiof";
1369                         reg = <0 0xe6e90000 0 0x0064>;
1370                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1371                         clocks = <&cpg CPG_MOD 211>;
1372                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1373                                <&dmac2 0x41>, <&dmac2 0x40>;
1374                         dma-names = "tx", "rx", "tx", "rx";
1375                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1376                         resets = <&cpg 211>;
1377                         #address-cells = <1>;
1378                         #size-cells = <0>;
1379                         status = "disabled";
1380                 };
1381
1382                 msiof1: spi@e6ea0000 {
1383                         compatible = "renesas,msiof-r8a774a1",
1384                                      "renesas,rcar-gen3-msiof";
1385                         reg = <0 0xe6ea0000 0 0x0064>;
1386                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1387                         clocks = <&cpg CPG_MOD 210>;
1388                         dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1389                                <&dmac2 0x43>, <&dmac2 0x42>;
1390                         dma-names = "tx", "rx", "tx", "rx";
1391                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1392                         resets = <&cpg 210>;
1393                         #address-cells = <1>;
1394                         #size-cells = <0>;
1395                         status = "disabled";
1396                 };
1397
1398                 msiof2: spi@e6c00000 {
1399                         compatible = "renesas,msiof-r8a774a1",
1400                                      "renesas,rcar-gen3-msiof";
1401                         reg = <0 0xe6c00000 0 0x0064>;
1402                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1403                         clocks = <&cpg CPG_MOD 209>;
1404                         dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1405                         dma-names = "tx", "rx";
1406                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1407                         resets = <&cpg 209>;
1408                         #address-cells = <1>;
1409                         #size-cells = <0>;
1410                         status = "disabled";
1411                 };
1412
1413                 msiof3: spi@e6c10000 {
1414                         compatible = "renesas,msiof-r8a774a1",
1415                                      "renesas,rcar-gen3-msiof";
1416                         reg = <0 0xe6c10000 0 0x0064>;
1417                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1418                         clocks = <&cpg CPG_MOD 208>;
1419                         dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1420                         dma-names = "tx", "rx";
1421                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1422                         resets = <&cpg 208>;
1423                         #address-cells = <1>;
1424                         #size-cells = <0>;
1425                         status = "disabled";
1426                 };
1427
1428                 vin0: video@e6ef0000 {
1429                         compatible = "renesas,vin-r8a774a1";
1430                         reg = <0 0xe6ef0000 0 0x1000>;
1431                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1432                         clocks = <&cpg CPG_MOD 811>;
1433                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1434                         resets = <&cpg 811>;
1435                         renesas,id = <0>;
1436                         status = "disabled";
1437
1438                         ports {
1439                                 #address-cells = <1>;
1440                                 #size-cells = <0>;
1441
1442                                 port@1 {
1443                                         #address-cells = <1>;
1444                                         #size-cells = <0>;
1445
1446                                         reg = <1>;
1447
1448                                         vin0csi20: endpoint@0 {
1449                                                 reg = <0>;
1450                                                 remote-endpoint = <&csi20vin0>;
1451                                         };
1452                                         vin0csi40: endpoint@2 {
1453                                                 reg = <2>;
1454                                                 remote-endpoint = <&csi40vin0>;
1455                                         };
1456                                 };
1457                         };
1458                 };
1459
1460                 vin1: video@e6ef1000 {
1461                         compatible = "renesas,vin-r8a774a1";
1462                         reg = <0 0xe6ef1000 0 0x1000>;
1463                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1464                         clocks = <&cpg CPG_MOD 810>;
1465                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1466                         resets = <&cpg 810>;
1467                         renesas,id = <1>;
1468                         status = "disabled";
1469
1470                         ports {
1471                                 #address-cells = <1>;
1472                                 #size-cells = <0>;
1473
1474                                 port@1 {
1475                                         #address-cells = <1>;
1476                                         #size-cells = <0>;
1477
1478                                         reg = <1>;
1479
1480                                         vin1csi20: endpoint@0 {
1481                                                 reg = <0>;
1482                                                 remote-endpoint = <&csi20vin1>;
1483                                         };
1484                                         vin1csi40: endpoint@2 {
1485                                                 reg = <2>;
1486                                                 remote-endpoint = <&csi40vin1>;
1487                                         };
1488                                 };
1489                         };
1490                 };
1491
1492                 vin2: video@e6ef2000 {
1493                         compatible = "renesas,vin-r8a774a1";
1494                         reg = <0 0xe6ef2000 0 0x1000>;
1495                         interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1496                         clocks = <&cpg CPG_MOD 809>;
1497                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1498                         resets = <&cpg 809>;
1499                         renesas,id = <2>;
1500                         status = "disabled";
1501
1502                         ports {
1503                                 #address-cells = <1>;
1504                                 #size-cells = <0>;
1505
1506                                 port@1 {
1507                                         #address-cells = <1>;
1508                                         #size-cells = <0>;
1509
1510                                         reg = <1>;
1511
1512                                         vin2csi20: endpoint@0 {
1513                                                 reg = <0>;
1514                                                 remote-endpoint = <&csi20vin2>;
1515                                         };
1516                                         vin2csi40: endpoint@2 {
1517                                                 reg = <2>;
1518                                                 remote-endpoint = <&csi40vin2>;
1519                                         };
1520                                 };
1521                         };
1522                 };
1523
1524                 vin3: video@e6ef3000 {
1525                         compatible = "renesas,vin-r8a774a1";
1526                         reg = <0 0xe6ef3000 0 0x1000>;
1527                         interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1528                         clocks = <&cpg CPG_MOD 808>;
1529                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1530                         resets = <&cpg 808>;
1531                         renesas,id = <3>;
1532                         status = "disabled";
1533
1534                         ports {
1535                                 #address-cells = <1>;
1536                                 #size-cells = <0>;
1537
1538                                 port@1 {
1539                                         #address-cells = <1>;
1540                                         #size-cells = <0>;
1541
1542                                         reg = <1>;
1543
1544                                         vin3csi20: endpoint@0 {
1545                                                 reg = <0>;
1546                                                 remote-endpoint = <&csi20vin3>;
1547                                         };
1548                                         vin3csi40: endpoint@2 {
1549                                                 reg = <2>;
1550                                                 remote-endpoint = <&csi40vin3>;
1551                                         };
1552                                 };
1553                         };
1554                 };
1555
1556                 vin4: video@e6ef4000 {
1557                         compatible = "renesas,vin-r8a774a1";
1558                         reg = <0 0xe6ef4000 0 0x1000>;
1559                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1560                         clocks = <&cpg CPG_MOD 807>;
1561                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1562                         resets = <&cpg 807>;
1563                         renesas,id = <4>;
1564                         status = "disabled";
1565
1566                         ports {
1567                                 #address-cells = <1>;
1568                                 #size-cells = <0>;
1569
1570                                 port@1 {
1571                                         #address-cells = <1>;
1572                                         #size-cells = <0>;
1573
1574                                         reg = <1>;
1575
1576                                         vin4csi20: endpoint@0 {
1577                                                 reg = <0>;
1578                                                 remote-endpoint = <&csi20vin4>;
1579                                         };
1580                                         vin4csi40: endpoint@2 {
1581                                                 reg = <2>;
1582                                                 remote-endpoint = <&csi40vin4>;
1583                                         };
1584                                 };
1585                         };
1586                 };
1587
1588                 vin5: video@e6ef5000 {
1589                         compatible = "renesas,vin-r8a774a1";
1590                         reg = <0 0xe6ef5000 0 0x1000>;
1591                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1592                         clocks = <&cpg CPG_MOD 806>;
1593                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1594                         resets = <&cpg 806>;
1595                         renesas,id = <5>;
1596                         status = "disabled";
1597
1598                         ports {
1599                                 #address-cells = <1>;
1600                                 #size-cells = <0>;
1601
1602                                 port@1 {
1603                                         #address-cells = <1>;
1604                                         #size-cells = <0>;
1605
1606                                         reg = <1>;
1607
1608                                         vin5csi20: endpoint@0 {
1609                                                 reg = <0>;
1610                                                 remote-endpoint = <&csi20vin5>;
1611                                         };
1612                                         vin5csi40: endpoint@2 {
1613                                                 reg = <2>;
1614                                                 remote-endpoint = <&csi40vin5>;
1615                                         };
1616                                 };
1617                         };
1618                 };
1619
1620                 vin6: video@e6ef6000 {
1621                         compatible = "renesas,vin-r8a774a1";
1622                         reg = <0 0xe6ef6000 0 0x1000>;
1623                         interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1624                         clocks = <&cpg CPG_MOD 805>;
1625                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1626                         resets = <&cpg 805>;
1627                         renesas,id = <6>;
1628                         status = "disabled";
1629
1630                         ports {
1631                                 #address-cells = <1>;
1632                                 #size-cells = <0>;
1633
1634                                 port@1 {
1635                                         #address-cells = <1>;
1636                                         #size-cells = <0>;
1637
1638                                         reg = <1>;
1639
1640                                         vin6csi20: endpoint@0 {
1641                                                 reg = <0>;
1642                                                 remote-endpoint = <&csi20vin6>;
1643                                         };
1644                                         vin6csi40: endpoint@2 {
1645                                                 reg = <2>;
1646                                                 remote-endpoint = <&csi40vin6>;
1647                                         };
1648                                 };
1649                         };
1650                 };
1651
1652                 vin7: video@e6ef7000 {
1653                         compatible = "renesas,vin-r8a774a1";
1654                         reg = <0 0xe6ef7000 0 0x1000>;
1655                         interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1656                         clocks = <&cpg CPG_MOD 804>;
1657                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1658                         resets = <&cpg 804>;
1659                         renesas,id = <7>;
1660                         status = "disabled";
1661
1662                         ports {
1663                                 #address-cells = <1>;
1664                                 #size-cells = <0>;
1665
1666                                 port@1 {
1667                                         #address-cells = <1>;
1668                                         #size-cells = <0>;
1669
1670                                         reg = <1>;
1671
1672                                         vin7csi20: endpoint@0 {
1673                                                 reg = <0>;
1674                                                 remote-endpoint = <&csi20vin7>;
1675                                         };
1676                                         vin7csi40: endpoint@2 {
1677                                                 reg = <2>;
1678                                                 remote-endpoint = <&csi40vin7>;
1679                                         };
1680                                 };
1681                         };
1682                 };
1683
1684                 rcar_sound: sound@ec500000 {
1685                         /*
1686                          * #sound-dai-cells is required if simple-card
1687                          *
1688                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1689                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1690                          */
1691                         /*
1692                          * #clock-cells is required for audio_clkout0/1/2/3
1693                          *
1694                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
1695                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
1696                          */
1697                         compatible = "renesas,rcar_sound-r8a774a1", "renesas,rcar_sound-gen3";
1698                         reg = <0 0xec500000 0 0x1000>, /* SCU */
1699                               <0 0xec5a0000 0 0x100>,  /* ADG */
1700                               <0 0xec540000 0 0x1000>, /* SSIU */
1701                               <0 0xec541000 0 0x280>,  /* SSI */
1702                               <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
1703                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1704
1705                         clocks = <&cpg CPG_MOD 1005>,
1706                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1707                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1708                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1709                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1710                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1711                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1712                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1713                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1714                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1715                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1716                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1717                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1718                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1719                                  <&audio_clk_a>, <&audio_clk_b>,
1720                                  <&audio_clk_c>,
1721                                  <&cpg CPG_MOD 922>;
1722                         clock-names = "ssi-all",
1723                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1724                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1725                                       "ssi.1", "ssi.0",
1726                                       "src.9", "src.8", "src.7", "src.6",
1727                                       "src.5", "src.4", "src.3", "src.2",
1728                                       "src.1", "src.0",
1729                                       "mix.1", "mix.0",
1730                                       "ctu.1", "ctu.0",
1731                                       "dvc.0", "dvc.1",
1732                                       "clk_a", "clk_b", "clk_c", "clk_i";
1733                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1734                         resets = <&cpg 1005>,
1735                                  <&cpg 1006>, <&cpg 1007>,
1736                                  <&cpg 1008>, <&cpg 1009>,
1737                                  <&cpg 1010>, <&cpg 1011>,
1738                                  <&cpg 1012>, <&cpg 1013>,
1739                                  <&cpg 1014>, <&cpg 1015>;
1740                         reset-names = "ssi-all",
1741                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1742                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1743                                       "ssi.1", "ssi.0";
1744                         status = "disabled";
1745
1746                         rcar_sound,ctu {
1747                                 ctu00: ctu-0 { };
1748                                 ctu01: ctu-1 { };
1749                                 ctu02: ctu-2 { };
1750                                 ctu03: ctu-3 { };
1751                                 ctu10: ctu-4 { };
1752                                 ctu11: ctu-5 { };
1753                                 ctu12: ctu-6 { };
1754                                 ctu13: ctu-7 { };
1755                         };
1756
1757                         rcar_sound,dvc {
1758                                 dvc0: dvc-0 {
1759                                         dmas = <&audma1 0xbc>;
1760                                         dma-names = "tx";
1761                                 };
1762                                 dvc1: dvc-1 {
1763                                         dmas = <&audma1 0xbe>;
1764                                         dma-names = "tx";
1765                                 };
1766                         };
1767
1768                         rcar_sound,mix {
1769                                 mix0: mix-0 { };
1770                                 mix1: mix-1 { };
1771                         };
1772
1773                         rcar_sound,src {
1774                                 src0: src-0 {
1775                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1776                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1777                                         dma-names = "rx", "tx";
1778                                 };
1779                                 src1: src-1 {
1780                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1781                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1782                                         dma-names = "rx", "tx";
1783                                 };
1784                                 src2: src-2 {
1785                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1786                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1787                                         dma-names = "rx", "tx";
1788                                 };
1789                                 src3: src-3 {
1790                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1791                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1792                                         dma-names = "rx", "tx";
1793                                 };
1794                                 src4: src-4 {
1795                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1796                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1797                                         dma-names = "rx", "tx";
1798                                 };
1799                                 src5: src-5 {
1800                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1801                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1802                                         dma-names = "rx", "tx";
1803                                 };
1804                                 src6: src-6 {
1805                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1806                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1807                                         dma-names = "rx", "tx";
1808                                 };
1809                                 src7: src-7 {
1810                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1811                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1812                                         dma-names = "rx", "tx";
1813                                 };
1814                                 src8: src-8 {
1815                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1816                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1817                                         dma-names = "rx", "tx";
1818                                 };
1819                                 src9: src-9 {
1820                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1821                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1822                                         dma-names = "rx", "tx";
1823                                 };
1824                         };
1825
1826                         rcar_sound,ssi {
1827                                 ssi0: ssi-0 {
1828                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1829                                         dmas = <&audma0 0x01>, <&audma1 0x02>;
1830                                         dma-names = "rx", "tx";
1831                                 };
1832                                 ssi1: ssi-1 {
1833                                         interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1834                                         dmas = <&audma0 0x03>, <&audma1 0x04>;
1835                                         dma-names = "rx", "tx";
1836                                 };
1837                                 ssi2: ssi-2 {
1838                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1839                                         dmas = <&audma0 0x05>, <&audma1 0x06>;
1840                                         dma-names = "rx", "tx";
1841                                 };
1842                                 ssi3: ssi-3 {
1843                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1844                                         dmas = <&audma0 0x07>, <&audma1 0x08>;
1845                                         dma-names = "rx", "tx";
1846                                 };
1847                                 ssi4: ssi-4 {
1848                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1849                                         dmas = <&audma0 0x09>, <&audma1 0x0a>;
1850                                         dma-names = "rx", "tx";
1851                                 };
1852                                 ssi5: ssi-5 {
1853                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1854                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>;
1855                                         dma-names = "rx", "tx";
1856                                 };
1857                                 ssi6: ssi-6 {
1858                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1859                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>;
1860                                         dma-names = "rx", "tx";
1861                                 };
1862                                 ssi7: ssi-7 {
1863                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1864                                         dmas = <&audma0 0x0f>, <&audma1 0x10>;
1865                                         dma-names = "rx", "tx";
1866                                 };
1867                                 ssi8: ssi-8 {
1868                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1869                                         dmas = <&audma0 0x11>, <&audma1 0x12>;
1870                                         dma-names = "rx", "tx";
1871                                 };
1872                                 ssi9: ssi-9 {
1873                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1874                                         dmas = <&audma0 0x13>, <&audma1 0x14>;
1875                                         dma-names = "rx", "tx";
1876                                 };
1877                         };
1878
1879                         rcar_sound,ssiu {
1880                                 ssiu00: ssiu-0 {
1881                                         dmas = <&audma0 0x15>, <&audma1 0x16>;
1882                                         dma-names = "rx", "tx";
1883                                 };
1884                                 ssiu01: ssiu-1 {
1885                                         dmas = <&audma0 0x35>, <&audma1 0x36>;
1886                                         dma-names = "rx", "tx";
1887                                 };
1888                                 ssiu02: ssiu-2 {
1889                                         dmas = <&audma0 0x37>, <&audma1 0x38>;
1890                                         dma-names = "rx", "tx";
1891                                 };
1892                                 ssiu03: ssiu-3 {
1893                                         dmas = <&audma0 0x47>, <&audma1 0x48>;
1894                                         dma-names = "rx", "tx";
1895                                 };
1896                                 ssiu04: ssiu-4 {
1897                                         dmas = <&audma0 0x3F>, <&audma1 0x40>;
1898                                         dma-names = "rx", "tx";
1899                                 };
1900                                 ssiu05: ssiu-5 {
1901                                         dmas = <&audma0 0x43>, <&audma1 0x44>;
1902                                         dma-names = "rx", "tx";
1903                                 };
1904                                 ssiu06: ssiu-6 {
1905                                         dmas = <&audma0 0x4F>, <&audma1 0x50>;
1906                                         dma-names = "rx", "tx";
1907                                 };
1908                                 ssiu07: ssiu-7 {
1909                                         dmas = <&audma0 0x53>, <&audma1 0x54>;
1910                                         dma-names = "rx", "tx";
1911                                 };
1912                                 ssiu10: ssiu-8 {
1913                                         dmas = <&audma0 0x49>, <&audma1 0x4a>;
1914                                         dma-names = "rx", "tx";
1915                                 };
1916                                 ssiu11: ssiu-9 {
1917                                         dmas = <&audma0 0x4B>, <&audma1 0x4C>;
1918                                         dma-names = "rx", "tx";
1919                                 };
1920                                 ssiu12: ssiu-10 {
1921                                         dmas = <&audma0 0x57>, <&audma1 0x58>;
1922                                         dma-names = "rx", "tx";
1923                                 };
1924                                 ssiu13: ssiu-11 {
1925                                         dmas = <&audma0 0x59>, <&audma1 0x5A>;
1926                                         dma-names = "rx", "tx";
1927                                 };
1928                                 ssiu14: ssiu-12 {
1929                                         dmas = <&audma0 0x5F>, <&audma1 0x60>;
1930                                         dma-names = "rx", "tx";
1931                                 };
1932                                 ssiu15: ssiu-13 {
1933                                         dmas = <&audma0 0xC3>, <&audma1 0xC4>;
1934                                         dma-names = "rx", "tx";
1935                                 };
1936                                 ssiu16: ssiu-14 {
1937                                         dmas = <&audma0 0xC7>, <&audma1 0xC8>;
1938                                         dma-names = "rx", "tx";
1939                                 };
1940                                 ssiu17: ssiu-15 {
1941                                         dmas = <&audma0 0xCB>, <&audma1 0xCC>;
1942                                         dma-names = "rx", "tx";
1943                                 };
1944                                 ssiu20: ssiu-16 {
1945                                         dmas = <&audma0 0x63>, <&audma1 0x64>;
1946                                         dma-names = "rx", "tx";
1947                                 };
1948                                 ssiu21: ssiu-17 {
1949                                         dmas = <&audma0 0x67>, <&audma1 0x68>;
1950                                         dma-names = "rx", "tx";
1951                                 };
1952                                 ssiu22: ssiu-18 {
1953                                         dmas = <&audma0 0x6B>, <&audma1 0x6C>;
1954                                         dma-names = "rx", "tx";
1955                                 };
1956                                 ssiu23: ssiu-19 {
1957                                         dmas = <&audma0 0x6D>, <&audma1 0x6E>;
1958                                         dma-names = "rx", "tx";
1959                                 };
1960                                 ssiu24: ssiu-20 {
1961                                         dmas = <&audma0 0xCF>, <&audma1 0xCE>;
1962                                         dma-names = "rx", "tx";
1963                                 };
1964                                 ssiu25: ssiu-21 {
1965                                         dmas = <&audma0 0xEB>, <&audma1 0xEC>;
1966                                         dma-names = "rx", "tx";
1967                                 };
1968                                 ssiu26: ssiu-22 {
1969                                         dmas = <&audma0 0xED>, <&audma1 0xEE>;
1970                                         dma-names = "rx", "tx";
1971                                 };
1972                                 ssiu27: ssiu-23 {
1973                                         dmas = <&audma0 0xEF>, <&audma1 0xF0>;
1974                                         dma-names = "rx", "tx";
1975                                 };
1976                                 ssiu30: ssiu-24 {
1977                                         dmas = <&audma0 0x6f>, <&audma1 0x70>;
1978                                         dma-names = "rx", "tx";
1979                                 };
1980                                 ssiu31: ssiu-25 {
1981                                         dmas = <&audma0 0x21>, <&audma1 0x22>;
1982                                         dma-names = "rx", "tx";
1983                                 };
1984                                 ssiu32: ssiu-26 {
1985                                         dmas = <&audma0 0x23>, <&audma1 0x24>;
1986                                         dma-names = "rx", "tx";
1987                                 };
1988                                 ssiu33: ssiu-27 {
1989                                         dmas = <&audma0 0x25>, <&audma1 0x26>;
1990                                         dma-names = "rx", "tx";
1991                                 };
1992                                 ssiu34: ssiu-28 {
1993                                         dmas = <&audma0 0x27>, <&audma1 0x28>;
1994                                         dma-names = "rx", "tx";
1995                                 };
1996                                 ssiu35: ssiu-29 {
1997                                         dmas = <&audma0 0x29>, <&audma1 0x2A>;
1998                                         dma-names = "rx", "tx";
1999                                 };
2000                                 ssiu36: ssiu-30 {
2001                                         dmas = <&audma0 0x2B>, <&audma1 0x2C>;
2002                                         dma-names = "rx", "tx";
2003                                 };
2004                                 ssiu37: ssiu-31 {
2005                                         dmas = <&audma0 0x2D>, <&audma1 0x2E>;
2006                                         dma-names = "rx", "tx";
2007                                 };
2008                                 ssiu40: ssiu-32 {
2009                                         dmas = <&audma0 0x71>, <&audma1 0x72>;
2010                                         dma-names = "rx", "tx";
2011                                 };
2012                                 ssiu41: ssiu-33 {
2013                                         dmas = <&audma0 0x17>, <&audma1 0x18>;
2014                                         dma-names = "rx", "tx";
2015                                 };
2016                                 ssiu42: ssiu-34 {
2017                                         dmas = <&audma0 0x19>, <&audma1 0x1A>;
2018                                         dma-names = "rx", "tx";
2019                                 };
2020                                 ssiu43: ssiu-35 {
2021                                         dmas = <&audma0 0x1B>, <&audma1 0x1C>;
2022                                         dma-names = "rx", "tx";
2023                                 };
2024                                 ssiu44: ssiu-36 {
2025                                         dmas = <&audma0 0x1D>, <&audma1 0x1E>;
2026                                         dma-names = "rx", "tx";
2027                                 };
2028                                 ssiu45: ssiu-37 {
2029                                         dmas = <&audma0 0x1F>, <&audma1 0x20>;
2030                                         dma-names = "rx", "tx";
2031                                 };
2032                                 ssiu46: ssiu-38 {
2033                                         dmas = <&audma0 0x31>, <&audma1 0x32>;
2034                                         dma-names = "rx", "tx";
2035                                 };
2036                                 ssiu47: ssiu-39 {
2037                                         dmas = <&audma0 0x33>, <&audma1 0x34>;
2038                                         dma-names = "rx", "tx";
2039                                 };
2040                                 ssiu50: ssiu-40 {
2041                                         dmas = <&audma0 0x73>, <&audma1 0x74>;
2042                                         dma-names = "rx", "tx";
2043                                 };
2044                                 ssiu60: ssiu-41 {
2045                                         dmas = <&audma0 0x75>, <&audma1 0x76>;
2046                                         dma-names = "rx", "tx";
2047                                 };
2048                                 ssiu70: ssiu-42 {
2049                                         dmas = <&audma0 0x79>, <&audma1 0x7a>;
2050                                         dma-names = "rx", "tx";
2051                                 };
2052                                 ssiu80: ssiu-43 {
2053                                         dmas = <&audma0 0x7b>, <&audma1 0x7c>;
2054                                         dma-names = "rx", "tx";
2055                                 };
2056                                 ssiu90: ssiu-44 {
2057                                         dmas = <&audma0 0x7d>, <&audma1 0x7e>;
2058                                         dma-names = "rx", "tx";
2059                                 };
2060                                 ssiu91: ssiu-45 {
2061                                         dmas = <&audma0 0x7F>, <&audma1 0x80>;
2062                                         dma-names = "rx", "tx";
2063                                 };
2064                                 ssiu92: ssiu-46 {
2065                                         dmas = <&audma0 0x81>, <&audma1 0x82>;
2066                                         dma-names = "rx", "tx";
2067                                 };
2068                                 ssiu93: ssiu-47 {
2069                                         dmas = <&audma0 0x83>, <&audma1 0x84>;
2070                                         dma-names = "rx", "tx";
2071                                 };
2072                                 ssiu94: ssiu-48 {
2073                                         dmas = <&audma0 0xA3>, <&audma1 0xA4>;
2074                                         dma-names = "rx", "tx";
2075                                 };
2076                                 ssiu95: ssiu-49 {
2077                                         dmas = <&audma0 0xA5>, <&audma1 0xA6>;
2078                                         dma-names = "rx", "tx";
2079                                 };
2080                                 ssiu96: ssiu-50 {
2081                                         dmas = <&audma0 0xA7>, <&audma1 0xA8>;
2082                                         dma-names = "rx", "tx";
2083                                 };
2084                                 ssiu97: ssiu-51 {
2085                                         dmas = <&audma0 0xA9>, <&audma1 0xAA>;
2086                                         dma-names = "rx", "tx";
2087                                 };
2088                         };
2089                 };
2090
2091                 audma0: dma-controller@ec700000 {
2092                         compatible = "renesas,dmac-r8a774a1",
2093                                      "renesas,rcar-dmac";
2094                         reg = <0 0xec700000 0 0x10000>;
2095                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
2096                                      <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
2097                                      <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
2098                                      <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
2099                                      <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
2100                                      <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
2101                                      <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
2102                                      <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
2103                                      <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
2104                                      <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
2105                                      <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
2106                                      <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
2107                                      <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
2108                                      <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
2109                                      <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
2110                                      <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
2111                                      <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
2112                         interrupt-names = "error",
2113                                         "ch0", "ch1", "ch2", "ch3",
2114                                         "ch4", "ch5", "ch6", "ch7",
2115                                         "ch8", "ch9", "ch10", "ch11",
2116                                         "ch12", "ch13", "ch14", "ch15";
2117                         clocks = <&cpg CPG_MOD 502>;
2118                         clock-names = "fck";
2119                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2120                         resets = <&cpg 502>;
2121                         #dma-cells = <1>;
2122                         dma-channels = <16>;
2123                         iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
2124                                <&ipmmu_mp 2>, <&ipmmu_mp 3>,
2125                                <&ipmmu_mp 4>, <&ipmmu_mp 5>,
2126                                <&ipmmu_mp 6>, <&ipmmu_mp 7>,
2127                                <&ipmmu_mp 8>, <&ipmmu_mp 9>,
2128                                <&ipmmu_mp 10>, <&ipmmu_mp 11>,
2129                                <&ipmmu_mp 12>, <&ipmmu_mp 13>,
2130                                <&ipmmu_mp 14>, <&ipmmu_mp 15>;
2131                 };
2132
2133                 audma1: dma-controller@ec720000 {
2134                         compatible = "renesas,dmac-r8a774a1",
2135                                      "renesas,rcar-dmac";
2136                         reg = <0 0xec720000 0 0x10000>;
2137                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
2138                                      <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
2139                                      <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
2140                                      <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
2141                                      <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
2142                                      <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
2143                                      <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
2144                                      <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
2145                                      <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
2146                                      <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
2147                                      <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
2148                                      <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
2149                                      <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
2150                                      <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
2151                                      <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
2152                                      <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
2153                                      <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
2154                         interrupt-names = "error",
2155                                         "ch0", "ch1", "ch2", "ch3",
2156                                         "ch4", "ch5", "ch6", "ch7",
2157                                         "ch8", "ch9", "ch10", "ch11",
2158                                         "ch12", "ch13", "ch14", "ch15";
2159                         clocks = <&cpg CPG_MOD 501>;
2160                         clock-names = "fck";
2161                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2162                         resets = <&cpg 501>;
2163                         #dma-cells = <1>;
2164                         dma-channels = <16>;
2165                         iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>,
2166                                <&ipmmu_mp 18>, <&ipmmu_mp 19>,
2167                                <&ipmmu_mp 20>, <&ipmmu_mp 21>,
2168                                <&ipmmu_mp 22>, <&ipmmu_mp 23>,
2169                                <&ipmmu_mp 24>, <&ipmmu_mp 25>,
2170                                <&ipmmu_mp 26>, <&ipmmu_mp 27>,
2171                                <&ipmmu_mp 28>, <&ipmmu_mp 29>,
2172                                <&ipmmu_mp 30>, <&ipmmu_mp 31>;
2173                 };
2174
2175                 xhci0: usb@ee000000 {
2176                         compatible = "renesas,xhci-r8a774a1",
2177                                      "renesas,rcar-gen3-xhci";
2178                         reg = <0 0xee000000 0 0xc00>;
2179                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2180                         clocks = <&cpg CPG_MOD 328>;
2181                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2182                         resets = <&cpg 328>;
2183                         status = "disabled";
2184                 };
2185
2186                 usb3_peri0: usb@ee020000 {
2187                         compatible = "renesas,r8a774a1-usb3-peri",
2188                                      "renesas,rcar-gen3-usb3-peri";
2189                         reg = <0 0xee020000 0 0x400>;
2190                         interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2191                         clocks = <&cpg CPG_MOD 328>;
2192                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2193                         resets = <&cpg 328>;
2194                         status = "disabled";
2195                 };
2196
2197                 ohci0: usb@ee080000 {
2198                         compatible = "generic-ohci";
2199                         reg = <0 0xee080000 0 0x100>;
2200                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2201                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2202                         phys = <&usb2_phy0 1>;
2203                         phy-names = "usb";
2204                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2205                         resets = <&cpg 703>, <&cpg 704>;
2206                         status = "disabled";
2207                 };
2208
2209                 ohci1: usb@ee0a0000 {
2210                         compatible = "generic-ohci";
2211                         reg = <0 0xee0a0000 0 0x100>;
2212                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2213                         clocks = <&cpg CPG_MOD 702>;
2214                         phys = <&usb2_phy1 1>;
2215                         phy-names = "usb";
2216                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2217                         resets = <&cpg 702>;
2218                         status = "disabled";
2219                 };
2220
2221                 ehci0: usb@ee080100 {
2222                         compatible = "generic-ehci";
2223                         reg = <0 0xee080100 0 0x100>;
2224                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2225                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2226                         phys = <&usb2_phy0 2>;
2227                         phy-names = "usb";
2228                         companion = <&ohci0>;
2229                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2230                         resets = <&cpg 703>, <&cpg 704>;
2231                         status = "disabled";
2232                 };
2233
2234                 ehci1: usb@ee0a0100 {
2235                         compatible = "generic-ehci";
2236                         reg = <0 0xee0a0100 0 0x100>;
2237                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2238                         clocks = <&cpg CPG_MOD 702>;
2239                         phys = <&usb2_phy1 2>;
2240                         phy-names = "usb";
2241                         companion = <&ohci1>;
2242                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2243                         resets = <&cpg 702>;
2244                         status = "disabled";
2245                 };
2246
2247                 usb2_phy0: usb-phy@ee080200 {
2248                         compatible = "renesas,usb2-phy-r8a774a1",
2249                                      "renesas,rcar-gen3-usb2-phy";
2250                         reg = <0 0xee080200 0 0x700>;
2251                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2252                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2253                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2254                         resets = <&cpg 703>, <&cpg 704>;
2255                         #phy-cells = <1>;
2256                         status = "disabled";
2257                 };
2258
2259                 usb2_phy1: usb-phy@ee0a0200 {
2260                         compatible = "renesas,usb2-phy-r8a774a1",
2261                                      "renesas,rcar-gen3-usb2-phy";
2262                         reg = <0 0xee0a0200 0 0x700>;
2263                         clocks = <&cpg CPG_MOD 702>;
2264                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2265                         resets = <&cpg 702>;
2266                         #phy-cells = <1>;
2267                         status = "disabled";
2268                 };
2269
2270                 sdhi0: mmc@ee100000 {
2271                         compatible = "renesas,sdhi-r8a774a1",
2272                                      "renesas,rcar-gen3-sdhi";
2273                         reg = <0 0xee100000 0 0x2000>;
2274                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2275                         clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A774A1_CLK_SD0H>;
2276                         clock-names = "core", "clkh";
2277                         max-frequency = <200000000>;
2278                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2279                         resets = <&cpg 314>;
2280                         status = "disabled";
2281                 };
2282
2283                 sdhi1: mmc@ee120000 {
2284                         compatible = "renesas,sdhi-r8a774a1",
2285                                      "renesas,rcar-gen3-sdhi";
2286                         reg = <0 0xee120000 0 0x2000>;
2287                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2288                         clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A774A1_CLK_SD1H>;
2289                         clock-names = "core", "clkh";
2290                         max-frequency = <200000000>;
2291                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2292                         resets = <&cpg 313>;
2293                         status = "disabled";
2294                 };
2295
2296                 sdhi2: mmc@ee140000 {
2297                         compatible = "renesas,sdhi-r8a774a1",
2298                                      "renesas,rcar-gen3-sdhi";
2299                         reg = <0 0xee140000 0 0x2000>;
2300                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2301                         clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A774A1_CLK_SD2H>;
2302                         clock-names = "core", "clkh";
2303                         max-frequency = <200000000>;
2304                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2305                         resets = <&cpg 312>;
2306                         status = "disabled";
2307                 };
2308
2309                 sdhi3: mmc@ee160000 {
2310                         compatible = "renesas,sdhi-r8a774a1",
2311                                      "renesas,rcar-gen3-sdhi";
2312                         reg = <0 0xee160000 0 0x2000>;
2313                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2314                         clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A774A1_CLK_SD3H>;
2315                         clock-names = "core", "clkh";
2316                         max-frequency = <200000000>;
2317                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2318                         resets = <&cpg 311>;
2319                         status = "disabled";
2320                 };
2321
2322                 rpc: spi@ee200000 {
2323                         compatible = "renesas,r8a774a1-rpc-if",
2324                                      "renesas,rcar-gen3-rpc-if";
2325                         reg = <0 0xee200000 0 0x200>,
2326                               <0 0x08000000 0 0x4000000>,
2327                               <0 0xee208000 0 0x100>;
2328                         reg-names = "regs", "dirmap", "wbuf";
2329                         interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
2330                         clocks = <&cpg CPG_MOD 917>;
2331                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2332                         resets = <&cpg 917>;
2333                         #address-cells = <1>;
2334                         #size-cells = <0>;
2335                         status = "disabled";
2336                 };
2337
2338                 gic: interrupt-controller@f1010000 {
2339                         compatible = "arm,gic-400";
2340                         #interrupt-cells = <3>;
2341                         #address-cells = <0>;
2342                         interrupt-controller;
2343                         reg = <0x0 0xf1010000 0 0x1000>,
2344                               <0x0 0xf1020000 0 0x20000>,
2345                               <0x0 0xf1040000 0 0x20000>,
2346                               <0x0 0xf1060000 0 0x20000>;
2347                         interrupts = <GIC_PPI 9
2348                                         (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
2349                         clocks = <&cpg CPG_MOD 408>;
2350                         clock-names = "clk";
2351                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2352                         resets = <&cpg 408>;
2353                 };
2354
2355                 pciec0: pcie@fe000000 {
2356                         compatible = "renesas,pcie-r8a774a1",
2357                                      "renesas,pcie-rcar-gen3";
2358                         reg = <0 0xfe000000 0 0x80000>;
2359                         #address-cells = <3>;
2360                         #size-cells = <2>;
2361                         bus-range = <0x00 0xff>;
2362                         device_type = "pci";
2363                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
2364                                  <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
2365                                  <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
2366                                  <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2367                         /* Map all possible DDR/IOMMU as inbound ranges */
2368                         dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
2369                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2370                                 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2371                                 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2372                         #interrupt-cells = <1>;
2373                         interrupt-map-mask = <0 0 0 0>;
2374                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2375                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2376                         clock-names = "pcie", "pcie_bus";
2377                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2378                         resets = <&cpg 319>;
2379                         iommu-map = <0 &ipmmu_hc 0 1>;
2380                         iommu-map-mask = <0>;
2381                         status = "disabled";
2382                 };
2383
2384                 pciec1: pcie@ee800000 {
2385                         compatible = "renesas,pcie-r8a774a1",
2386                                      "renesas,pcie-rcar-gen3";
2387                         reg = <0 0xee800000 0 0x80000>;
2388                         #address-cells = <3>;
2389                         #size-cells = <2>;
2390                         bus-range = <0x00 0xff>;
2391                         device_type = "pci";
2392                         ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
2393                                  <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
2394                                  <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
2395                                  <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2396                         /* Map all possible DDR/IOMMU as inbound ranges */
2397                         dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
2398                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2399                                 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2400                                 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2401                         #interrupt-cells = <1>;
2402                         interrupt-map-mask = <0 0 0 0>;
2403                         interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2404                         clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2405                         clock-names = "pcie", "pcie_bus";
2406                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2407                         resets = <&cpg 318>;
2408                         iommu-map = <0 &ipmmu_hc 1 1>;
2409                         iommu-map-mask = <0>;
2410                         status = "disabled";
2411                 };
2412
2413                 pciec0_ep: pcie-ep@fe000000 {
2414                         compatible = "renesas,r8a774a1-pcie-ep",
2415                                      "renesas,rcar-gen3-pcie-ep";
2416                         reg = <0x0 0xfe000000 0 0x80000>,
2417                               <0x0 0xfe100000 0 0x100000>,
2418                               <0x0 0xfe200000 0 0x200000>,
2419                               <0x0 0x30000000 0 0x8000000>,
2420                               <0x0 0x38000000 0 0x8000000>;
2421                         reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
2422                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2423                                      <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2424                                      <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2425                         clocks = <&cpg CPG_MOD 319>;
2426                         clock-names = "pcie";
2427                         resets = <&cpg 319>;
2428                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2429                         status = "disabled";
2430                 };
2431
2432                 pciec1_ep: pcie-ep@ee800000 {
2433                         compatible = "renesas,r8a774a1-pcie-ep",
2434                                      "renesas,rcar-gen3-pcie-ep";
2435                         reg = <0x0 0xee800000 0 0x80000>,
2436                               <0x0 0xee900000 0 0x100000>,
2437                               <0x0 0xeea00000 0 0x200000>,
2438                               <0x0 0xc0000000 0 0x8000000>,
2439                               <0x0 0xc8000000 0 0x8000000>;
2440                         reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
2441                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2442                                      <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2443                                      <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2444                         clocks = <&cpg CPG_MOD 318>;
2445                         clock-names = "pcie";
2446                         resets = <&cpg 318>;
2447                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2448                         status = "disabled";
2449                 };
2450
2451                 fdp1@fe940000 {
2452                         compatible = "renesas,fdp1";
2453                         reg = <0 0xfe940000 0 0x2400>;
2454                         interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2455                         clocks = <&cpg CPG_MOD 119>;
2456                         power-domains = <&sysc R8A774A1_PD_A3VC>;
2457                         resets = <&cpg 119>;
2458                         renesas,fcp = <&fcpf0>;
2459                 };
2460
2461                 fcpf0: fcp@fe950000 {
2462                         compatible = "renesas,fcpf";
2463                         reg = <0 0xfe950000 0 0x200>;
2464                         clocks = <&cpg CPG_MOD 615>;
2465                         power-domains = <&sysc R8A774A1_PD_A3VC>;
2466                         resets = <&cpg 615>;
2467                 };
2468
2469                 fcpvb0: fcp@fe96f000 {
2470                         compatible = "renesas,fcpv";
2471                         reg = <0 0xfe96f000 0 0x200>;
2472                         clocks = <&cpg CPG_MOD 607>;
2473                         power-domains = <&sysc R8A774A1_PD_A3VC>;
2474                         resets = <&cpg 607>;
2475                 };
2476
2477                 fcpvd0: fcp@fea27000 {
2478                         compatible = "renesas,fcpv";
2479                         reg = <0 0xfea27000 0 0x200>;
2480                         clocks = <&cpg CPG_MOD 603>;
2481                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2482                         resets = <&cpg 603>;
2483                         iommus = <&ipmmu_vi0 8>;
2484                 };
2485
2486                 fcpvd1: fcp@fea2f000 {
2487                         compatible = "renesas,fcpv";
2488                         reg = <0 0xfea2f000 0 0x200>;
2489                         clocks = <&cpg CPG_MOD 602>;
2490                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2491                         resets = <&cpg 602>;
2492                         iommus = <&ipmmu_vi0 9>;
2493                 };
2494
2495                 fcpvd2: fcp@fea37000 {
2496                         compatible = "renesas,fcpv";
2497                         reg = <0 0xfea37000 0 0x200>;
2498                         clocks = <&cpg CPG_MOD 601>;
2499                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2500                         resets = <&cpg 601>;
2501                         iommus = <&ipmmu_vi0 10>;
2502                 };
2503
2504                 fcpvi0: fcp@fe9af000 {
2505                         compatible = "renesas,fcpv";
2506                         reg = <0 0xfe9af000 0 0x200>;
2507                         clocks = <&cpg CPG_MOD 611>;
2508                         power-domains = <&sysc R8A774A1_PD_A3VC>;
2509                         resets = <&cpg 611>;
2510                         iommus = <&ipmmu_vc0 19>;
2511                 };
2512
2513                 vspb: vsp@fe960000 {
2514                         compatible = "renesas,vsp2";
2515                         reg = <0 0xfe960000 0 0x8000>;
2516                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2517                         clocks = <&cpg CPG_MOD 626>;
2518                         power-domains = <&sysc R8A774A1_PD_A3VC>;
2519                         resets = <&cpg 626>;
2520
2521                         renesas,fcp = <&fcpvb0>;
2522                 };
2523
2524                 vspd0: vsp@fea20000 {
2525                         compatible = "renesas,vsp2";
2526                         reg = <0 0xfea20000 0 0x5000>;
2527                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2528                         clocks = <&cpg CPG_MOD 623>;
2529                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2530                         resets = <&cpg 623>;
2531
2532                         renesas,fcp = <&fcpvd0>;
2533                 };
2534
2535                 vspd1: vsp@fea28000 {
2536                         compatible = "renesas,vsp2";
2537                         reg = <0 0xfea28000 0 0x5000>;
2538                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2539                         clocks = <&cpg CPG_MOD 622>;
2540                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2541                         resets = <&cpg 622>;
2542
2543                         renesas,fcp = <&fcpvd1>;
2544                 };
2545
2546                 vspd2: vsp@fea30000 {
2547                         compatible = "renesas,vsp2";
2548                         reg = <0 0xfea30000 0 0x5000>;
2549                         interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
2550                         clocks = <&cpg CPG_MOD 621>;
2551                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2552                         resets = <&cpg 621>;
2553
2554                         renesas,fcp = <&fcpvd2>;
2555                 };
2556
2557                 vspi0: vsp@fe9a0000 {
2558                         compatible = "renesas,vsp2";
2559                         reg = <0 0xfe9a0000 0 0x8000>;
2560                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2561                         clocks = <&cpg CPG_MOD 631>;
2562                         power-domains = <&sysc R8A774A1_PD_A3VC>;
2563                         resets = <&cpg 631>;
2564
2565                         renesas,fcp = <&fcpvi0>;
2566                 };
2567
2568                 csi20: csi2@fea80000 {
2569                         compatible = "renesas,r8a774a1-csi2";
2570                         reg = <0 0xfea80000 0 0x10000>;
2571                         interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2572                         clocks = <&cpg CPG_MOD 714>;
2573                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2574                         resets = <&cpg 714>;
2575                         status = "disabled";
2576
2577                         ports {
2578                                 #address-cells = <1>;
2579                                 #size-cells = <0>;
2580
2581                                 port@0 {
2582                                         reg = <0>;
2583                                 };
2584
2585                                 port@1 {
2586                                         #address-cells = <1>;
2587                                         #size-cells = <0>;
2588
2589                                         reg = <1>;
2590
2591                                         csi20vin0: endpoint@0 {
2592                                                 reg = <0>;
2593                                                 remote-endpoint = <&vin0csi20>;
2594                                         };
2595                                         csi20vin1: endpoint@1 {
2596                                                 reg = <1>;
2597                                                 remote-endpoint = <&vin1csi20>;
2598                                         };
2599                                         csi20vin2: endpoint@2 {
2600                                                 reg = <2>;
2601                                                 remote-endpoint = <&vin2csi20>;
2602                                         };
2603                                         csi20vin3: endpoint@3 {
2604                                                 reg = <3>;
2605                                                 remote-endpoint = <&vin3csi20>;
2606                                         };
2607                                         csi20vin4: endpoint@4 {
2608                                                 reg = <4>;
2609                                                 remote-endpoint = <&vin4csi20>;
2610                                         };
2611                                         csi20vin5: endpoint@5 {
2612                                                 reg = <5>;
2613                                                 remote-endpoint = <&vin5csi20>;
2614                                         };
2615                                         csi20vin6: endpoint@6 {
2616                                                 reg = <6>;
2617                                                 remote-endpoint = <&vin6csi20>;
2618                                         };
2619                                         csi20vin7: endpoint@7 {
2620                                                 reg = <7>;
2621                                                 remote-endpoint = <&vin7csi20>;
2622                                         };
2623                                 };
2624                         };
2625                 };
2626
2627                 csi40: csi2@feaa0000 {
2628                         compatible = "renesas,r8a774a1-csi2";
2629                         reg = <0 0xfeaa0000 0 0x10000>;
2630                         interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2631                         clocks = <&cpg CPG_MOD 716>;
2632                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2633                         resets = <&cpg 716>;
2634                         status = "disabled";
2635
2636                         ports {
2637                                 #address-cells = <1>;
2638                                 #size-cells = <0>;
2639
2640                                 port@0 {
2641                                         reg = <0>;
2642                                 };
2643
2644                                 port@1 {
2645                                         #address-cells = <1>;
2646                                         #size-cells = <0>;
2647
2648                                         reg = <1>;
2649
2650                                         csi40vin0: endpoint@0 {
2651                                                 reg = <0>;
2652                                                 remote-endpoint = <&vin0csi40>;
2653                                         };
2654                                         csi40vin1: endpoint@1 {
2655                                                 reg = <1>;
2656                                                 remote-endpoint = <&vin1csi40>;
2657                                         };
2658                                         csi40vin2: endpoint@2 {
2659                                                 reg = <2>;
2660                                                 remote-endpoint = <&vin2csi40>;
2661                                         };
2662                                         csi40vin3: endpoint@3 {
2663                                                 reg = <3>;
2664                                                 remote-endpoint = <&vin3csi40>;
2665                                         };
2666                                         csi40vin4: endpoint@4 {
2667                                                 reg = <4>;
2668                                                 remote-endpoint = <&vin4csi40>;
2669                                         };
2670                                         csi40vin5: endpoint@5 {
2671                                                 reg = <5>;
2672                                                 remote-endpoint = <&vin5csi40>;
2673                                         };
2674                                         csi40vin6: endpoint@6 {
2675                                                 reg = <6>;
2676                                                 remote-endpoint = <&vin6csi40>;
2677                                         };
2678                                         csi40vin7: endpoint@7 {
2679                                                 reg = <7>;
2680                                                 remote-endpoint = <&vin7csi40>;
2681                                         };
2682                                 };
2683
2684                         };
2685                 };
2686
2687                 hdmi0: hdmi@fead0000 {
2688                         compatible = "renesas,r8a774a1-hdmi",
2689                                      "renesas,rcar-gen3-hdmi";
2690                         reg = <0 0xfead0000 0 0x10000>;
2691                         interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2692                         clocks = <&cpg CPG_MOD 729>,
2693                                  <&cpg CPG_CORE R8A774A1_CLK_HDMI>;
2694                         clock-names = "iahb", "isfr";
2695                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2696                         resets = <&cpg 729>;
2697                         status = "disabled";
2698
2699                         ports {
2700                                 #address-cells = <1>;
2701                                 #size-cells = <0>;
2702                                 port@0 {
2703                                         reg = <0>;
2704                                         dw_hdmi0_in: endpoint {
2705                                                 remote-endpoint = <&du_out_hdmi0>;
2706                                         };
2707                                 };
2708                                 port@1 {
2709                                         reg = <1>;
2710                                 };
2711                                 port@2 {
2712                                         /* HDMI sound */
2713                                         reg = <2>;
2714                                 };
2715                         };
2716                 };
2717
2718                 du: display@feb00000 {
2719                         compatible = "renesas,du-r8a774a1";
2720                         reg = <0 0xfeb00000 0 0x70000>;
2721                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2722                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2723                                      <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
2724                         clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
2725                                  <&cpg CPG_MOD 722>;
2726                         clock-names = "du.0", "du.1", "du.2";
2727                         resets = <&cpg 724>, <&cpg 722>;
2728                         reset-names = "du.0", "du.2";
2729                         status = "disabled";
2730
2731                         renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>;
2732
2733                         ports {
2734                                 #address-cells = <1>;
2735                                 #size-cells = <0>;
2736
2737                                 port@0 {
2738                                         reg = <0>;
2739                                 };
2740                                 port@1 {
2741                                         reg = <1>;
2742                                         du_out_hdmi0: endpoint {
2743                                                 remote-endpoint = <&dw_hdmi0_in>;
2744                                         };
2745                                 };
2746                                 port@2 {
2747                                         reg = <2>;
2748                                         du_out_lvds0: endpoint {
2749                                                 remote-endpoint = <&lvds0_in>;
2750                                         };
2751                                 };
2752                         };
2753                 };
2754
2755                 lvds0: lvds@feb90000 {
2756                         compatible = "renesas,r8a774a1-lvds";
2757                         reg = <0 0xfeb90000 0 0x14>;
2758                         clocks = <&cpg CPG_MOD 727>;
2759                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2760                         resets = <&cpg 727>;
2761                         status = "disabled";
2762
2763                         ports {
2764                                 #address-cells = <1>;
2765                                 #size-cells = <0>;
2766
2767                                 port@0 {
2768                                         reg = <0>;
2769                                         lvds0_in: endpoint {
2770                                                 remote-endpoint = <&du_out_lvds0>;
2771                                         };
2772                                 };
2773                                 port@1 {
2774                                         reg = <1>;
2775                                 };
2776                         };
2777                 };
2778
2779                 prr: chipid@fff00044 {
2780                         compatible = "renesas,prr";
2781                         reg = <0 0xfff00044 0 4>;
2782                 };
2783         };
2784
2785         thermal-zones {
2786                 sensor1_thermal: sensor1-thermal {
2787                         polling-delay-passive = <250>;
2788                         polling-delay = <1000>;
2789                         thermal-sensors = <&tsc 0>;
2790                         sustainable-power = <3874>;
2791
2792                         trips {
2793                                 sensor1_crit: sensor1-crit {
2794                                         temperature = <120000>;
2795                                         hysteresis = <1000>;
2796                                         type = "critical";
2797                                 };
2798                         };
2799                 };
2800
2801                 sensor2_thermal: sensor2-thermal {
2802                         polling-delay-passive = <250>;
2803                         polling-delay = <1000>;
2804                         thermal-sensors = <&tsc 1>;
2805                         sustainable-power = <3874>;
2806
2807                         trips {
2808                                 sensor2_crit: sensor2-crit {
2809                                         temperature = <120000>;
2810                                         hysteresis = <1000>;
2811                                         type = "critical";
2812                                 };
2813                         };
2814                 };
2815
2816                 sensor3_thermal: sensor3-thermal {
2817                         polling-delay-passive = <250>;
2818                         polling-delay = <1000>;
2819                         thermal-sensors = <&tsc 2>;
2820                         sustainable-power = <3874>;
2821
2822                         cooling-maps {
2823                                 map0 {
2824                                         trip = <&target>;
2825                                         cooling-device = <&a57_0 0 2>;
2826                                         contribution = <1024>;
2827                                 };
2828                                 map1 {
2829                                         trip = <&target>;
2830                                         cooling-device = <&a53_0 0 2>;
2831                                         contribution = <1024>;
2832                                 };
2833                         };
2834                         trips {
2835                                 target: trip-point1 {
2836                                         temperature = <100000>;
2837                                         hysteresis = <1000>;
2838                                         type = "passive";
2839                                 };
2840
2841                                 sensor3_crit: sensor3-crit {
2842                                         temperature = <120000>;
2843                                         hysteresis = <1000>;
2844                                         type = "critical";
2845                                 };
2846                         };
2847                 };
2848         };
2849
2850         timer {
2851                 compatible = "arm,armv8-timer";
2852                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2853                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2854                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2855                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
2856         };
2857
2858         /* External USB clocks - can be overridden by the board */
2859         usb3s0_clk: usb3s0 {
2860                 compatible = "fixed-clock";
2861                 #clock-cells = <0>;
2862                 clock-frequency = <0>;
2863         };
2864
2865         usb_extal_clk: usb_extal {
2866                 compatible = "fixed-clock";
2867                 #clock-cells = <0>;
2868                 clock-frequency = <0>;
2869         };
2870 };