1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Cheza device tree source (common between revisions)
5 * Copyright 2018 Google LLC.
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
10 #include "sdm845.dtsi"
12 /* PMICs depend on spmi_bus label and so must come after SoC */
13 #include "pm8005.dtsi"
14 #include "pm8998.dtsi"
18 bluetooth0 = &bluetooth;
25 stdout-path = "serial0:115200n8";
28 backlight: backlight {
29 compatible = "pwm-backlight";
30 pwms = <&cros_ec_pwm 0>;
31 enable-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
32 power-supply = <&ppvar_sys>;
33 pinctrl-names = "default";
34 pinctrl-0 = <&ap_edp_bklten>;
37 /* FIXED REGULATORS - parents above children */
39 /* This is the top level supply and variable voltage */
40 ppvar_sys: ppvar-sys-regulator {
41 compatible = "regulator-fixed";
42 regulator-name = "ppvar_sys";
47 /* This divides ppvar_sys by 2, so voltage is variable */
48 src_vph_pwr: src-vph-pwr-regulator {
49 compatible = "regulator-fixed";
50 regulator-name = "src_vph_pwr";
52 /* EC turns on with switchcap_on_l; always on for AP */
56 vin-supply = <&ppvar_sys>;
59 pp5000_a: pp5000-a-regulator {
60 compatible = "regulator-fixed";
61 regulator-name = "pp5000_a";
63 /* EC turns on with en_pp5000_a; always on for AP */
66 regulator-min-microvolt = <5000000>;
67 regulator-max-microvolt = <5000000>;
69 vin-supply = <&ppvar_sys>;
72 src_vreg_bob: src-vreg-bob-regulator {
73 compatible = "regulator-fixed";
74 regulator-name = "src_vreg_bob";
76 /* EC turns on with vbob_en; always on for AP */
79 regulator-min-microvolt = <3600000>;
80 regulator-max-microvolt = <3600000>;
82 vin-supply = <&ppvar_sys>;
85 pp3300_dx_edp: pp3300-dx-edp-regulator {
86 compatible = "regulator-fixed";
87 regulator-name = "pp3300_dx_edp";
89 regulator-min-microvolt = <3300000>;
90 regulator-max-microvolt = <3300000>;
92 gpio = <&tlmm 43 GPIO_ACTIVE_HIGH>;
94 pinctrl-names = "default";
95 pinctrl-0 = <&en_pp3300_dx_edp>;
99 * Apparently RPMh does not provide support for PM8998 S4 because it
100 * is always-on; model it as a fixed regulator.
102 src_pp1800_s4a: pm8998-smps4 {
103 compatible = "regulator-fixed";
104 regulator-name = "src_pp1800_s4a";
106 regulator-min-microvolt = <1800000>;
107 regulator-max-microvolt = <1800000>;
112 vin-supply = <&src_vph_pwr>;
115 /* BOARD-SPECIFIC TOP LEVEL NODES */
118 compatible = "gpio-keys";
119 pinctrl-names = "default";
120 pinctrl-0 = <&pen_eject_odl>;
123 label = "Pen Insert";
124 /* Insert = low, eject = high */
125 gpios = <&tlmm 119 GPIO_ACTIVE_LOW>;
126 linux,code = <SW_PEN_INSERTED>;
127 linux,input-type = <EV_SW>;
133 compatible ="innolux,p120zdg-bf1";
134 power-supply = <&pp3300_dx_edp>;
135 backlight = <&backlight>;
140 panel_in_edp: endpoint {
141 remote-endpoint = <&sn65dsi86_out>;
149 * Reserved memory changes
151 * Putting this all together (out of order with the rest of the file) to keep
152 * all modifications to the memory map (from sdm845.dtsi) in one place.
156 * Our mpss_region is 8MB bigger than the default one and that conflicts
157 * with venus_mem and cdsp_mem.
159 * For venus_mem we'll delete and re-create at a different address.
161 * cdsp_mem isn't used on cheza right now so we won't bother re-creating it; but
162 * that also means we need to delete cdsp_pas.
164 /delete-node/ &venus_mem;
165 /delete-node/ &cdsp_mem;
166 /delete-node/ &cdsp_pas;
167 /delete-node/ &gpu_mem;
169 /* Increase the size from 120 MB to 128 MB */
171 reg = <0 0x8e000000 0 0x8000000>;
174 /* Increase the size from 2MB to 8MB */
176 reg = <0 0x88f00000 0 0x800000>;
181 venus_mem: memory@96000000 {
182 reg = <0 0x96000000 0 0x500000>;
190 pinctrl-names = "default";
191 pinctrl-0 = <&qspi_clk &qspi_cs0 &qspi_data01>;
194 compatible = "jedec,spi-nor";
198 * In theory chip supports up to 104 MHz and controller up
199 * to 80 MHz, but above 25 MHz wasn't reliable so we'll use
200 * that for now. b:117440651
202 spi-max-frequency = <25000000>;
203 spi-tx-bus-width = <2>;
204 spi-rx-bus-width = <2>;
210 pm8998-rpmh-regulators {
211 compatible = "qcom,pm8998-rpmh-regulators";
214 vdd-s1-supply = <&src_vph_pwr>;
215 vdd-s2-supply = <&src_vph_pwr>;
216 vdd-s3-supply = <&src_vph_pwr>;
217 vdd-s4-supply = <&src_vph_pwr>;
218 vdd-s5-supply = <&src_vph_pwr>;
219 vdd-s6-supply = <&src_vph_pwr>;
220 vdd-s7-supply = <&src_vph_pwr>;
221 vdd-s8-supply = <&src_vph_pwr>;
222 vdd-s9-supply = <&src_vph_pwr>;
223 vdd-s10-supply = <&src_vph_pwr>;
224 vdd-s11-supply = <&src_vph_pwr>;
225 vdd-s12-supply = <&src_vph_pwr>;
226 vdd-s13-supply = <&src_vph_pwr>;
227 vdd-l1-l27-supply = <&src_pp1025_s7a>;
228 vdd-l2-l8-l17-supply = <&src_pp1350_s3a>;
229 vdd-l3-l11-supply = <&src_pp1025_s7a>;
230 vdd-l4-l5-supply = <&src_pp1025_s7a>;
231 vdd-l6-supply = <&src_vph_pwr>;
232 vdd-l7-l12-l14-l15-supply = <&src_pp2040_s5a>;
233 vdd-l9-supply = <&src_pp2040_s5a>;
234 vdd-l10-l23-l25-supply = <&src_vreg_bob>;
235 vdd-l13-l19-l21-supply = <&src_vreg_bob>;
236 vdd-l16-l28-supply = <&src_vreg_bob>;
237 vdd-l18-l22-supply = <&src_vreg_bob>;
238 vdd-l20-l24-supply = <&src_vreg_bob>;
239 vdd-l26-supply = <&src_pp1350_s3a>;
240 vin-lvs-1-2-supply = <&src_pp1800_s4a>;
242 src_pp1125_s2a: smps2 {
243 regulator-min-microvolt = <1100000>;
244 regulator-max-microvolt = <1100000>;
247 src_pp1350_s3a: smps3 {
248 regulator-min-microvolt = <1352000>;
249 regulator-max-microvolt = <1352000>;
252 src_pp2040_s5a: smps5 {
253 regulator-min-microvolt = <1904000>;
254 regulator-max-microvolt = <2040000>;
257 src_pp1025_s7a: smps7 {
258 regulator-min-microvolt = <900000>;
259 regulator-max-microvolt = <1028000>;
280 src_pp875_l1a: ldo1 {
281 regulator-min-microvolt = <880000>;
282 regulator-max-microvolt = <880000>;
283 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
287 src_pp1200_l2a: ldo2 {
288 regulator-min-microvolt = <1200000>;
289 regulator-max-microvolt = <1200000>;
290 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
296 pp1000_l3a_sdr845: ldo3 {
297 regulator-min-microvolt = <1000000>;
298 regulator-max-microvolt = <1000000>;
299 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
305 src_pp800_l5a: ldo5 {
306 regulator-min-microvolt = <800000>;
307 regulator-max-microvolt = <800000>;
308 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
312 src_pp1800_l6a: ldo6 {
313 regulator-min-microvolt = <1856000>;
314 regulator-max-microvolt = <1856000>;
315 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
318 pp1800_l7a_wcn3990: ldo7 {
319 regulator-min-microvolt = <1800000>;
320 regulator-max-microvolt = <1800000>;
321 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
324 src_pp1200_l8a: ldo8 {
325 regulator-min-microvolt = <1200000>;
326 regulator-max-microvolt = <1248000>;
327 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
331 src_pp1800_l9a: ldo9 {
332 regulator-min-microvolt = <1800000>;
333 regulator-max-microvolt = <1800000>;
334 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
337 src_pp1800_l10a: ldo10 {
338 regulator-min-microvolt = <1800000>;
339 regulator-max-microvolt = <1800000>;
340 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
343 pp1000_l11a_sdr845: ldo11 {
344 regulator-min-microvolt = <1000000>;
345 regulator-max-microvolt = <1048000>;
346 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
356 src_pp1800_l12a: ldo12 {
357 regulator-min-microvolt = <1800000>;
358 regulator-max-microvolt = <1800000>;
359 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
363 src_pp2950_l13a: ldo13 {
364 regulator-min-microvolt = <1800000>;
365 regulator-max-microvolt = <2960000>;
366 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
369 src_pp1800_l14a: ldo14 {
370 regulator-min-microvolt = <1800000>;
371 regulator-max-microvolt = <1800000>;
372 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
375 src_pp1800_l15a: ldo15 {
376 regulator-min-microvolt = <1800000>;
377 regulator-max-microvolt = <1800000>;
378 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
382 regulator-min-microvolt = <2704000>;
383 regulator-max-microvolt = <2704000>;
384 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
387 src_pp1300_l17a: ldo17 {
388 regulator-min-microvolt = <1304000>;
389 regulator-max-microvolt = <1304000>;
390 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
394 regulator-min-microvolt = <2704000>;
395 regulator-max-microvolt = <2960000>;
396 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
400 * NOTE: this rail should have been called
401 * src_pp3300_l19a in the schematic
403 src_pp3000_l19a: ldo19 {
404 regulator-min-microvolt = <3304000>;
405 regulator-max-microvolt = <3304000>;
407 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
410 src_pp2950_l20a: ldo20 {
411 regulator-min-microvolt = <2704000>;
412 regulator-max-microvolt = <2960000>;
413 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
416 src_pp2950_l21a: ldo21 {
417 regulator-min-microvolt = <2704000>;
418 regulator-max-microvolt = <2960000>;
419 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
423 src_pp3300_l22a: ldo22 {
424 regulator-min-microvolt = <3304000>;
425 regulator-max-microvolt = <3304000>;
426 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
428 * HACK: Should add a usb hub node and driver
429 * to turn this on and off at suspend/resume time
435 pp3300_l23a_ch1_wcn3990: ldo23 {
436 regulator-min-microvolt = <3000000>;
437 regulator-max-microvolt = <3312000>;
438 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
442 src_pp3075_l24a: ldo24 {
443 regulator-min-microvolt = <3088000>;
444 regulator-max-microvolt = <3088000>;
445 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
448 pp3300_l25a_ch0_wcn3990: ldo25 {
449 regulator-min-microvolt = <3304000>;
450 regulator-max-microvolt = <3304000>;
451 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
468 src_pp1200_l26a: ldo26 {
469 regulator-min-microvolt = <1200000>;
470 regulator-max-microvolt = <1200000>;
471 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
475 src_pp3300_l28a: ldo28 {
476 regulator-min-microvolt = <3304000>;
477 regulator-max-microvolt = <3304000>;
478 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
481 src_pp1800_lvs1: lvs1 {
482 regulator-min-microvolt = <1800000>;
483 regulator-max-microvolt = <1800000>;
486 src_pp1800_lvs2: lvs2 {
487 regulator-min-microvolt = <1800000>;
488 regulator-max-microvolt = <1800000>;
492 pm8005-rpmh-regulators {
493 compatible = "qcom,pm8005-rpmh-regulators";
496 vdd-s1-supply = <&src_vph_pwr>;
497 vdd-s2-supply = <&src_vph_pwr>;
498 vdd-s3-supply = <&src_vph_pwr>;
499 vdd-s4-supply = <&src_vph_pwr>;
501 src_pp600_s3c: smps3 {
502 regulator-min-microvolt = <600000>;
503 regulator-max-microvolt = <600000>;
510 vdda-supply = <&vdda_mipi_dsi0_1p2>;
515 remote-endpoint = <&sn65dsi86_in>;
516 data-lanes = <0 1 2 3>;
524 vdds-supply = <&vdda_mipi_dsi0_pll>;
527 edp_brij_i2c: &i2c3 {
529 clock-frequency = <400000>;
531 sn65dsi86_bridge: bridge@2d {
532 compatible = "ti,sn65dsi86";
534 pinctrl-names = "default";
535 pinctrl-0 = <&edp_brij_en &edp_brij_irq>;
537 interrupt-parent = <&tlmm>;
538 interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
540 enable-gpios = <&tlmm 102 GPIO_ACTIVE_HIGH>;
542 vpll-supply = <&src_pp1800_s4a>;
543 vccio-supply = <&src_pp1800_s4a>;
544 vcca-supply = <&src_pp1200_l2a>;
545 vcc-supply = <&src_pp1200_l2a>;
547 clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
548 clock-names = "refclk";
553 #address-cells = <1>;
558 sn65dsi86_in: endpoint {
559 remote-endpoint = <&dsi0_out>;
565 sn65dsi86_out: endpoint {
566 remote-endpoint = <&panel_in_edp>;
575 clock-frequency = <400000>;
578 compatible = "wacom,w9013", "hid-over-i2c";
580 pinctrl-names = "default";
581 pinctrl-0 = <&pen_irq_l>, <&pen_pdct_l>, <&pen_rst_l>;
583 vdd-supply = <&pp3300_dx_pen>;
584 vddl-supply = <&pp1800_dx_pen>;
585 post-power-on-delay-ms = <100>;
587 interrupt-parent = <&tlmm>;
588 interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
590 hid-descr-addr = <0x1>;
596 clock-frequency = <400000>;
601 clock-frequency = <400000>;
604 compatible = "elan,ekth3500";
606 pinctrl-names = "default";
607 pinctrl-0 = <&ts_int_l &ts_reset_l>;
609 interrupt-parent = <&tlmm>;
610 interrupts = <125 IRQ_TYPE_LEVEL_LOW>;
612 vcc33-supply = <&src_pp3300_l28a>;
614 reset-gpios = <&tlmm 118 GPIO_ACTIVE_LOW>;
640 * Cheza fw does not properly program the GPU aperture to allow the
641 * GPU to update the SMMU pagetables for context switches. Work
642 * around this by dropping the "qcom,adreno-smmu" compat string.
645 compatible = "qcom,sdm845-smmu-v2", "qcom,smmu-v2";
651 iommus = <&apps_smmu 0x781 0x0>,
652 <&apps_smmu 0x724 0x3>;
661 iommus = <&apps_smmu 0x0 0x3>;
666 iommus = <&apps_smmu 0x6c0 0x3>;
672 pinctrl-names = "default";
673 pinctrl-0 = <&sdc2_clk &sdc2_cmd &sdc2_data &sd_cd_odl>;
675 vmmc-supply = <&src_pp2950_l21a>;
676 vqmmc-supply = <&vddpx_2>;
678 cd-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
689 compatible = "google,cr50";
691 pinctrl-names = "default";
692 pinctrl-0 = <&h1_ap_int_odl>;
693 spi-max-frequency = <800000>;
694 interrupt-parent = <&tlmm>;
695 interrupts = <129 IRQ_TYPE_EDGE_RISING>;
703 compatible = "google,cros-ec-spi";
705 interrupt-parent = <&tlmm>;
706 interrupts = <122 IRQ_TYPE_LEVEL_LOW>;
707 pinctrl-names = "default";
708 pinctrl-0 = <&ec_ap_int_l>;
709 spi-max-frequency = <3000000>;
712 compatible = "google,cros-ec-pwm";
716 i2c_tunnel: i2c-tunnel {
717 compatible = "google,cros-ec-i2c-tunnel";
718 google,remote-bus = <0>;
719 #address-cells = <1>;
725 #include <arm/cros-ec-keyboard.dtsi>
726 #include <arm/cros-ec-sbs.dtsi>
731 bluetooth: wcn3990-bt {
732 compatible = "qcom,wcn3990-bt";
733 vddio-supply = <&src_pp1800_s4a>;
734 vddxo-supply = <&pp1800_l7a_wcn3990>;
735 vddrf-supply = <&src_pp1300_l17a>;
736 vddch0-supply = <&pp3300_l25a_ch0_wcn3990>;
737 max-speed = <3200000>;
748 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
750 vcc-supply = <&src_pp2950_l20a>;
751 vcc-max-microamp = <600000>;
757 vdda-phy-supply = <&vdda_ufs1_core>;
758 vdda-pll-supply = <&vdda_ufs1_1p2>;
764 /* We'll use this as USB 2.0 only */
765 qcom,select-utmi-as-pipe-clk;
770 * The hardware design intends this port to be hooked up in peripheral
771 * mode, so we'll hardcode it here. Some details:
772 * - SDM845 expects only a single Type C connector so it has only one
773 * native Type C port but cheza has two Type C connectors.
774 * - The only source of DP is the single native Type C port.
775 * - On cheza we want to be able to hook DP up to _either_ of the
776 * two Type C connectors and want to be able to achieve 4 lanes of DP.
777 * - When you configure a Type C port for 4 lanes of DP you lose USB3.
778 * - In order to make everything work, the native Type C port is always
779 * configured as 4-lanes DP so it's always available.
780 * - The extra USB3 port on SDM845 goes to a USB 3 hub which is then
781 * sent to the two Type C connectors.
782 * - The extra USB2 lines from the native Type C port are always
783 * setup as "peripheral" so that we can mux them over to one connector
784 * or the other if someone needs the connector configured as a gadget
785 * (but they only get USB2 speeds).
787 * All the hardware muxes would allow us to hook things up in different
788 * ways to some potential benefit for static configurations (you could
789 * achieve extra USB2 bandwidth by using two different ports for the
790 * two connectors or possibly even get USB3 peripheral mode), but in
791 * each case you end up forcing to disconnect/reconnect an in-use
792 * USB session in some cases depending on what you hotplug into the
793 * other connector. Thus hardcoding this as peripheral makes sense.
795 dr_mode = "peripheral";
798 * We always need the high speed pins as 4-lanes DP in case someone
799 * hotplugs a DP peripheral. Thus limit this port to a max of high
802 maximum-speed = "high-speed";
805 * We don't need the usb3-phy since we run in highspeed mode always, so
806 * re-define these properties removing the superspeed USB PHY reference.
808 phys = <&usb_1_hsphy>;
809 phy-names = "usb2-phy";
815 vdd-supply = <&vdda_usb1_ss_core>;
816 vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
817 vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
819 qcom,imp-res-offset-value = <8>;
820 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
821 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
822 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
830 /* We have this hooked up to a hub and we always use in host mode */
837 vdd-supply = <&vdda_usb2_ss_core>;
838 vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
839 vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
841 qcom,imp-res-offset-value = <8>;
842 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
848 vdda-phy-supply = <&vdda_usb2_ss_1p2>;
849 vdda-pll-supply = <&vdda_usb2_ss_core>;
855 vdd-0.8-cx-mx-supply = <&src_pp800_l5a >;
856 vdd-1.8-xo-supply = <&pp1800_l7a_wcn3990>;
857 vdd-1.3-rfa-supply = <&src_pp1300_l17a>;
858 vdd-3.3-ch0-supply = <&pp3300_l25a_ch0_wcn3990>;
861 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
879 pins = "gpio91", "gpio92";
881 /* High-Z when no transfers; nice to park the lines */
888 pins = "gpio41", "gpio42";
889 drive-strength = <2>;
891 /* Has external pullup */
898 pins = "gpio31", "gpio32";
899 drive-strength = <2>;
901 /* Has external pullup */
908 pins = "gpio49", "gpio50";
909 drive-strength = <2>;
911 /* Has external pullup */
918 pins = "gpio33", "gpio34";
919 drive-strength = <2>;
921 /* Has external pullup */
928 pins = "gpio0", "gpio1", "gpio2", "gpio3";
929 drive-strength = <2>;
936 pins = "gpio85", "gpio86", "gpio87", "gpio88";
937 drive-strength = <2>;
944 pins = "gpio53", "gpio54", "gpio55", "gpio56";
945 drive-strength = <2>;
951 /* Change pinmux to all 4 pins since CTS and RTS are connected */
953 pins = "gpio45", "gpio46",
959 * Configure a pull-down on 45 (CTS) to match the pull of
960 * the Bluetooth module.
967 /* We'll drive 46 (RTS) and 47 (TX), so no pull */
968 pins = "gpio46", "gpio47";
969 drive-strength = <2>;
975 * Configure a pull-up on 48 (RX). This is needed to avoid
976 * garbage data when the TX pin of the Bluetooth module is
977 * in tri-state (module powered off or not driving the
988 drive-strength = <2>;
994 drive-strength = <2>;
999 /* PINCTRL - board-specific pinctrl */
1001 gpio-line-names = "",
1009 reg = <ADC5_AMUX_THM1_100K_PU>;
1014 reg = <ADC5_AMUX_THM2_100K_PU>;
1015 label = "quiet_temp";
1019 reg = <ADC5_AMUX_THM3_100K_PU>;
1020 label = "lte_temp_1";
1024 reg = <ADC5_AMUX_THM4_100K_PU>;
1025 label = "lte_temp_2";
1029 reg = <ADC5_AMUX_THM5_100K_PU>;
1030 label = "charger_temp";
1035 gpio-line-names = "",
1065 * pinctrl settings for pins that have no real owners.
1067 pinctrl-names = "default", "sleep";
1068 pinctrl-0 = <&bios_flash_wp_r_l>,
1069 <&ap_suspend_l_deassert>;
1071 pinctrl-1 = <&bios_flash_wp_r_l>,
1072 <&ap_suspend_l_assert>;
1075 * Hogs prevent usermode from changing the value. A GPIO can be both
1076 * here and in the pinctrl section.
1080 gpios = <126 GPIO_ACTIVE_LOW>;
1084 ap_edp_bklten: ap-edp-bklten {
1092 drive-strength = <2>;
1097 bios_flash_wp_r_l: bios-flash-wp-r-l {
1110 ec_ap_int_l: ec-ap-int-l {
1123 edp_brij_en: edp-brij-en {
1131 drive-strength = <2>;
1136 edp_brij_irq: edp-brij-irq {
1144 drive-strength = <2>;
1149 en_pp3300_dx_edp: en-pp3300-dx-edp {
1157 drive-strength = <2>;
1162 h1_ap_int_odl: h1-ap-int-odl {
1175 pen_eject_odl: pen-eject-odl {
1183 pen_irq_l: pen-irq-l {
1192 /* Has external pullup */
1197 pen_pdct_l: pen-pdct-l {
1206 /* Has external pullup */
1211 pen_rst_l: pen-rst-l {
1220 drive-strength = <2>;
1223 * The pen driver doesn't currently support
1224 * driving this reset line. By specifying
1225 * output-high here we're relying on the fact
1226 * that this pin has a default pulldown at boot
1227 * (which makes sure the pen was in reset if it
1228 * was powered) and then we set it high here to
1229 * take it out of reset. Better would be if the
1230 * pen driver could control this and we could
1231 * remove "output-high" here.
1237 sdc2_clk: sdc2-clk {
1243 * It seems that mmc_test reports errors if drive
1244 * strength is not 16.
1246 drive-strength = <16>;
1250 sdc2_cmd: sdc2-cmd {
1254 drive-strength = <16>;
1258 sdc2_data: sdc2-data {
1262 drive-strength = <16>;
1266 sd_cd_odl: sd-cd-odl {
1278 ts_int_l: ts-int-l {
1290 ts_reset_l: ts-reset-l {
1299 drive-strength = <2>;
1303 ap_suspend_l_assert: ap_suspend_l_assert {
1308 drive-strength = <2>;
1313 ap_suspend_l_deassert: ap_suspend_l_deassert {
1318 drive-strength = <2>;
1328 iommus = <&apps_smmu 0x10b2 0x0>;