arch/arm64/boot/dts/qcom/sa8295p-adp.dts

   1 // SPDX-License-Identifier: BSD-3-Clause
   2 /*
   3  * Copyright (c) 2021, The Linux Foundation. All rights reserved.
   4  * Copyright (c) 2022, Linaro Limited
   5  */
   6
   7 /dts-v1/;
   8
   9 #include <dt-bindings/gpio/gpio.h>
  10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
  11 #include <dt-bindings/spmi/spmi.h>
  12
  13 #include "sa8540p.dtsi"
  14 #include "sa8540p-pmics.dtsi"
  15
  16 / {
  17         model = "Qualcomm SA8295P ADP";
  18         compatible = "qcom,sa8295p-adp", "qcom,sa8540p";
  19
  20         aliases {
  21                 serial0 = &uart17;
  22         };
  23
  24         chosen {
  25                 stdout-path = "serial0:115200n8";
  26         };
  27
  28         dp2-connector {
  29                 compatible = "dp-connector";
  30                 label = "DP2";
  31                 type = "mini";
  32
  33                 hpd-gpios = <&tlmm 20 GPIO_ACTIVE_HIGH>;
  34
  35                 port {
  36                         dp2_connector_in: endpoint {
  37                                 remote-endpoint = <&mdss1_dp0_phy_out>;
  38                         };
  39                 };
  40         };
  41
  42         dp3-connector {
  43                 compatible = "dp-connector";
  44                 label = "DP3";
  45                 type = "mini";
  46
  47                 hpd-gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>;
  48
  49                 port {
  50                         dp3_connector_in: endpoint {
  51                                 remote-endpoint = <&mdss1_dp1_phy_out>;
  52                         };
  53                 };
  54         };
  55
  56         edp0-connector {
  57                 compatible = "dp-connector";
  58                 label = "EDP0";
  59                 type = "mini";
  60
  61                 hpd-gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
  62
  63                 port {
  64                         edp0_connector_in: endpoint {
  65                                 remote-endpoint = <&mdss0_dp2_phy_out>;
  66                         };
  67                 };
  68         };
  69
  70         edp1-connector {
  71                 compatible = "dp-connector";
  72                 label = "EDP1";
  73                 type = "mini";
  74
  75                 hpd-gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
  76
  77                 port {
  78                         edp1_connector_in: endpoint {
  79                                 remote-endpoint = <&mdss0_dp3_phy_out>;
  80                         };
  81                 };
  82         };
  83
  84         edp2-connector {
  85                 compatible = "dp-connector";
  86                 label = "EDP2";
  87                 type = "mini";
  88
  89                 hpd-gpios = <&tlmm 7 GPIO_ACTIVE_HIGH>;
  90
  91                 port {
  92                         edp2_connector_in: endpoint {
  93                                 remote-endpoint = <&mdss1_dp2_phy_out>;
  94                         };
  95                 };
  96         };
  97
  98         edp3-connector {
  99                 compatible = "dp-connector";
 100                 label = "EDP3";
 101                 type = "mini";
 102
 103                 hpd-gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>;
 104
 105                 port {
 106                         edp3_connector_in: endpoint {
 107                                 remote-endpoint = <&mdss1_dp3_phy_out>;
 108                         };
 109                 };
 110         };
 111
 112         reserved-memory {
 113                 gpu_mem: gpu-mem@8bf00000 {
 114                         reg = <0 0x8bf00000 0 0x2000>;
 115                         no-map;
 116                 };
 117         };
 118 };
 119
 120 &apps_rsc {
 121         regulators-0 {
 122                 compatible = "qcom,pm8150-rpmh-regulators";
 123                 qcom,pmic-id = "a";
 124
 125                 vreg_l3a: ldo3 {
 126                         regulator-name = "vreg_l3a";
 127                         regulator-min-microvolt = <1200000>;
 128                         regulator-max-microvolt = <1208000>;
 129                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 130                 };
 131
 132                 vreg_l5a: ldo5 {
 133                         regulator-name = "vreg_l5a";
 134                         regulator-min-microvolt = <912000>;
 135                         regulator-max-microvolt = <912000>;
 136                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 137                 };
 138
 139                 vreg_l7a: ldo7 {
 140                         regulator-name = "vreg_l7a";
 141                         regulator-min-microvolt = <1800000>;
 142                         regulator-max-microvolt = <1800000>;
 143                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 144                 };
 145
 146                 vreg_l13a: ldo13 {
 147                         regulator-name = "vreg_l13a";
 148                         regulator-min-microvolt = <3072000>;
 149                         regulator-max-microvolt = <3072000>;
 150                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 151                 };
 152
 153                 vreg_l11a: ldo11 {
 154                         regulator-name = "vreg_l11a";
 155                         regulator-min-microvolt = <880000>;
 156                         regulator-max-microvolt = <880000>;
 157                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 158                 };
 159         };
 160
 161         regulators-1 {
 162                 compatible = "qcom,pm8150-rpmh-regulators";
 163                 qcom,pmic-id = "c";
 164
 165                 vreg_l1c: ldo1 {
 166                         regulator-name = "vreg_l1c";
 167                         regulator-min-microvolt = <912000>;
 168                         regulator-max-microvolt = <912000>;
 169                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 170                 };
 171
 172                 vreg_l2c: ldo2 {
 173                         regulator-name = "vreg_l2c";
 174                         regulator-min-microvolt = <3072000>;
 175                         regulator-max-microvolt = <3072000>;
 176                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 177                 };
 178
 179                 vreg_l3c: ldo3 {
 180                         regulator-name = "vreg_l3c";
 181                         regulator-min-microvolt = <1200000>;
 182                         regulator-max-microvolt = <1200000>;
 183                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 184                         regulator-allow-set-load;
 185                         regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
 186                                                    RPMH_REGULATOR_MODE_HPM>;
 187                 };
 188
 189                 vreg_l4c: ldo4 {
 190                         regulator-name = "vreg_l4c";
 191                         regulator-min-microvolt = <1200000>;
 192                         regulator-max-microvolt = <1208000>;
 193                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 194                 };
 195
 196                 vreg_l6c: ldo6 {
 197                         regulator-name = "vreg_l6c";
 198                         regulator-min-microvolt = <1200000>;
 199                         regulator-max-microvolt = <1200000>;
 200                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 201                         regulator-allow-set-load;
 202                         regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
 203                                                    RPMH_REGULATOR_MODE_HPM>;
 204                 };
 205
 206                 vreg_l7c: ldo7 {
 207                         regulator-name = "vreg_l7c";
 208                         regulator-min-microvolt = <1800000>;
 209                         regulator-max-microvolt = <1800000>;
 210                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 211                 };
 212
 213                 vreg_l10c: ldo10 {
 214                         regulator-name = "vreg_l10c";
 215                         regulator-min-microvolt = <2504000>;
 216                         regulator-max-microvolt = <2504000>;
 217                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 218                         regulator-allow-set-load;
 219                         regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
 220                                                    RPMH_REGULATOR_MODE_HPM>;
 221                 };
 222
 223                 vreg_l17c: ldo17 {
 224                         regulator-name = "vreg_l17c";
 225                         regulator-min-microvolt = <2504000>;
 226                         regulator-max-microvolt = <2504000>;
 227                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 228                         regulator-allow-set-load;
 229                         regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
 230                                                    RPMH_REGULATOR_MODE_HPM>;
 231                 };
 232         };
 233
 234         regulators-2 {
 235                 compatible = "qcom,pm8150-rpmh-regulators";
 236                 qcom,pmic-id = "g";
 237
 238                 vreg_l3g: ldo3 {
 239                         regulator-name = "vreg_l3g";
 240                         regulator-min-microvolt = <1200000>;
 241                         regulator-max-microvolt = <1200000>;
 242                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 243                 };
 244
 245                 vreg_l7g: ldo7 {
 246                         regulator-name = "vreg_l7g";
 247                         regulator-min-microvolt = <1800000>;
 248                         regulator-max-microvolt = <1800000>;
 249                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 250                 };
 251
 252                 vreg_l8g: ldo8 {
 253                         regulator-name = "vreg_l8g";
 254                         regulator-min-microvolt = <912000>;
 255                         regulator-max-microvolt = <912000>;
 256                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 257                 };
 258
 259                 vreg_l11g: ldo11 {
 260                         regulator-name = "vreg_l11g";
 261                         regulator-min-microvolt = <912000>;
 262                         regulator-max-microvolt = <912000>;
 263                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 264                 };
 265         };
 266 };
 267
 268 &dispcc0 {
 269         status = "okay";
 270 };
 271
 272 &dispcc1 {
 273         status = "okay";
 274 };
 275
 276 &i2c12 {
 277         pinctrl-0 = <&qup1_i2c4_state>;
 278         pinctrl-names = "default";
 279
 280         status = "okay";
 281
 282         vdd_gfx: regulator@39 {
 283                 compatible = "maxim,max20411";
 284                 reg = <0x39>;
 285
 286                 regulator-min-microvolt = <800000>;
 287                 regulator-max-microvolt = <800000>;
 288
 289                 enable-gpios = <&pmm8540a_gpios 2 GPIO_ACTIVE_HIGH>;
 290
 291                 pinctrl-0 = <&max20411_en>;
 292                 pinctrl-names = "default";
 293         };
 294 };
 295
 296 &gpucc {
 297         vdd-gfx-supply = <&vdd_gfx>;
 298         status = "okay";
 299 };
 300
 301 &gmu {
 302         status = "okay";
 303 };
 304
 305 &gpu {
 306         status = "okay";
 307
 308         zap-shader {
 309                 memory-region = <&gpu_mem>;
 310                 firmware-name = "qcom/sa8295p/a690_zap.mbn";
 311         };
 312 };
 313
 314 &gpu_smmu {
 315         status = "okay";
 316 };
 317
 318 &mdss0 {
 319         status = "okay";
 320 };
 321
 322 &mdss0_dp2 {
 323         data-lanes = <0 1 2 3>;
 324
 325         status = "okay";
 326
 327         ports {
 328                 port@1 {
 329                         reg = <1>;
 330                         mdss0_dp2_phy_out: endpoint {
 331                                 remote-endpoint = <&edp0_connector_in>;
 332                         };
 333                 };
 334         };
 335 };
 336
 337 &mdss0_dp2_phy {
 338         vdda-phy-supply = <&vreg_l8g>;
 339         vdda-pll-supply = <&vreg_l3g>;
 340
 341         status = "okay";
 342 };
 343
 344 &mdss0_dp3 {
 345         data-lanes = <0 1 2 3>;
 346
 347         status = "okay";
 348
 349         ports {
 350                 port@1 {
 351                         reg = <1>;
 352                         mdss0_dp3_phy_out: endpoint {
 353                                 remote-endpoint = <&edp1_connector_in>;
 354                         };
 355                 };
 356         };
 357 };
 358
 359 &mdss0_dp3_phy {
 360         vdda-phy-supply = <&vreg_l8g>;
 361         vdda-pll-supply = <&vreg_l3g>;
 362
 363         status = "okay";
 364 };
 365
 366 &mdss1 {
 367         status = "okay";
 368 };
 369
 370 &mdss1_dp0 {
 371         data-lanes = <0 1 2 3>;
 372
 373         status = "okay";
 374
 375         ports {
 376                 port@1 {
 377                         reg = <1>;
 378                         mdss1_dp0_phy_out: endpoint {
 379                                 remote-endpoint = <&dp2_connector_in>;
 380                         };
 381                 };
 382         };
 383 };
 384
 385 &mdss1_dp0_phy {
 386         vdda-phy-supply = <&vreg_l11g>;
 387         vdda-pll-supply = <&vreg_l3g>;
 388
 389         status = "okay";
 390 };
 391
 392 &mdss1_dp1 {
 393         data-lanes = <0 1 2 3>;
 394
 395         status = "okay";
 396
 397         ports {
 398                 port@1 {
 399                         reg = <1>;
 400                         mdss1_dp1_phy_out: endpoint {
 401                                 remote-endpoint = <&dp3_connector_in>;
 402                         };
 403                 };
 404         };
 405 };
 406
 407 &mdss1_dp1_phy {
 408         vdda-phy-supply = <&vreg_l11g>;
 409         vdda-pll-supply = <&vreg_l3g>;
 410
 411         status = "okay";
 412 };
 413
 414 &mdss1_dp2 {
 415         data-lanes = <0 1 2 3>;
 416
 417         status = "okay";
 418
 419         ports {
 420                 port@1 {
 421                         reg = <1>;
 422                         mdss1_dp2_phy_out: endpoint {
 423                                 remote-endpoint = <&edp2_connector_in>;
 424                         };
 425                 };
 426         };
 427 };
 428
 429 &mdss1_dp2_phy {
 430         vdda-phy-supply = <&vreg_l11g>;
 431         vdda-pll-supply = <&vreg_l3g>;
 432
 433         status = "okay";
 434 };
 435
 436 &mdss1_dp3 {
 437         data-lanes = <0 1 2 3>;
 438
 439         status = "okay";
 440
 441         ports {
 442                 port@1 {
 443                         reg = <1>;
 444                         mdss1_dp3_phy_out: endpoint {
 445                                 remote-endpoint = <&edp3_connector_in>;
 446                         };
 447                 };
 448         };
 449 };
 450
 451 &mdss1_dp3_phy {
 452         vdda-phy-supply = <&vreg_l11g>;
 453         vdda-pll-supply = <&vreg_l3g>;
 454
 455         status = "okay";
 456 };
 457
 458 &pcie2a {
 459         perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>;
 460         wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>;
 461
 462         pinctrl-names = "default";
 463         pinctrl-0 = <&pcie2a_default>;
 464
 465         status = "okay";
 466 };
 467
 468 &pcie2a_phy {
 469         vdda-phy-supply = <&vreg_l11a>;
 470         vdda-pll-supply = <&vreg_l3a>;
 471
 472         status = "okay";
 473 };
 474
 475 &pcie3a {
 476         num-lanes = <2>;
 477
 478         perst-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>;
 479         wake-gpios = <&tlmm 56 GPIO_ACTIVE_LOW>;
 480
 481         pinctrl-names = "default";
 482         pinctrl-0 = <&pcie3a_default>;
 483
 484         status = "okay";
 485 };
 486
 487 &pcie3a_phy {
 488         vdda-phy-supply = <&vreg_l11a>;
 489         vdda-pll-supply = <&vreg_l3a>;
 490
 491         status = "okay";
 492 };
 493
 494 &pcie3b {
 495         perst-gpios = <&tlmm 153 GPIO_ACTIVE_LOW>;
 496         wake-gpios = <&tlmm 130 GPIO_ACTIVE_LOW>;
 497
 498         pinctrl-names = "default";
 499         pinctrl-0 = <&pcie3b_default>;
 500
 501         status = "okay";
 502 };
 503
 504 &pcie3b_phy {
 505         vdda-phy-supply = <&vreg_l11a>;
 506         vdda-pll-supply = <&vreg_l3a>;
 507
 508         status = "okay";
 509 };
 510
 511 &pcie4 {
 512         perst-gpios = <&tlmm 141 GPIO_ACTIVE_LOW>;
 513         wake-gpios = <&tlmm 139 GPIO_ACTIVE_LOW>;
 514
 515         pinctrl-names = "default";
 516         pinctrl-0 = <&pcie4_default>;
 517
 518         status = "okay";
 519 };
 520
 521 &pcie4_phy {
 522         vdda-phy-supply = <&vreg_l11a>;
 523         vdda-pll-supply = <&vreg_l3a>;
 524
 525         status = "okay";
 526 };
 527
 528 &qup1 {
 529         status = "okay";
 530 };
 531
 532 &qup2 {
 533         status = "okay";
 534 };
 535
 536 &remoteproc_adsp {
 537         firmware-name = "qcom/sa8540p/adsp.mbn";
 538         status = "okay";
 539 };
 540
 541 &remoteproc_nsp0 {
 542         firmware-name = "qcom/sa8540p/cdsp.mbn";
 543         status = "okay";
 544 };
 545
 546 &remoteproc_nsp1 {
 547         firmware-name = "qcom/sa8540p/cdsp1.mbn";
 548         status = "okay";
 549 };
 550
 551 &uart17 {
 552         compatible = "qcom,geni-debug-uart";
 553         status = "okay";
 554 };
 555
 556 &ufs_mem_hc {
 557         reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>;
 558
 559         vcc-supply = <&vreg_l17c>;
 560         vcc-max-microamp = <800000>;
 561         vccq-supply = <&vreg_l6c>;
 562         vccq-max-microamp = <900000>;
 563
 564         status = "okay";
 565 };
 566
 567 &ufs_mem_phy {
 568         vdda-phy-supply = <&vreg_l8g>;
 569         vdda-pll-supply = <&vreg_l3g>;
 570
 571         status = "okay";
 572 };
 573
 574 &ufs_card_hc {
 575         reset-gpios = <&tlmm 229 GPIO_ACTIVE_LOW>;
 576
 577         vcc-supply = <&vreg_l10c>;
 578         vcc-max-microamp = <800000>;
 579         vccq-supply = <&vreg_l3c>;
 580         vccq-max-microamp = <900000>;
 581
 582         status = "okay";
 583 };
 584
 585 &ufs_card_phy {
 586         vdda-phy-supply = <&vreg_l8g>;
 587         vdda-pll-supply = <&vreg_l3g>;
 588
 589         status = "okay";
 590 };
 591
 592 &usb_0 {
 593         status = "okay";
 594 };
 595
 596 &usb_0_dwc3 {
 597         /* TODO: Define USB-C connector properly */
 598         dr_mode = "peripheral";
 599 };
 600
 601 &usb_0_hsphy {
 602         vdda-pll-supply = <&vreg_l5a>;
 603         vdda18-supply = <&vreg_l7a>;
 604         vdda33-supply = <&vreg_l13a>;
 605
 606         status = "okay";
 607 };
 608
 609 &usb_0_qmpphy {
 610         vdda-phy-supply = <&vreg_l3a>;
 611         vdda-pll-supply = <&vreg_l5a>;
 612
 613         status = "okay";
 614 };
 615
 616 &usb_1 {
 617         status = "okay";
 618 };
 619
 620 &usb_1_dwc3 {
 621         /* TODO: Define USB-C connector properly */
 622         dr_mode = "host";
 623 };
 624
 625 &usb_1_hsphy {
 626         vdda-pll-supply = <&vreg_l1c>;
 627         vdda18-supply = <&vreg_l7c>;
 628         vdda33-supply = <&vreg_l2c>;
 629
 630         status = "okay";
 631 };
 632
 633 &usb_1_qmpphy {
 634         vdda-phy-supply = <&vreg_l4c>;
 635         vdda-pll-supply = <&vreg_l1c>;
 636
 637         status = "okay";
 638 };
 639
 640 &usb_2_hsphy0 {
 641         vdda-pll-supply = <&vreg_l5a>;
 642         vdda18-supply = <&vreg_l7g>;
 643         vdda33-supply = <&vreg_l13a>;
 644
 645         status = "okay";
 646 };
 647
 648 &usb_2_hsphy1 {
 649         vdda-pll-supply = <&vreg_l5a>;
 650         vdda18-supply = <&vreg_l7g>;
 651         vdda33-supply = <&vreg_l13a>;
 652
 653         status = "okay";
 654 };
 655
 656 &usb_2_hsphy2 {
 657         vdda-pll-supply = <&vreg_l5a>;
 658         vdda18-supply = <&vreg_l7g>;
 659         vdda33-supply = <&vreg_l13a>;
 660
 661         status = "okay";
 662 };
 663
 664 &usb_2_hsphy3 {
 665         vdda-pll-supply = <&vreg_l5a>;
 666         vdda18-supply = <&vreg_l7g>;
 667         vdda33-supply = <&vreg_l13a>;
 668
 669         status = "okay";
 670 };
 671
 672 &usb_2_qmpphy0 {
 673         vdda-phy-supply = <&vreg_l3a>;
 674         vdda-pll-supply = <&vreg_l5a>;
 675
 676         status = "okay";
 677 };
 678
 679 &usb_2_qmpphy1 {
 680         vdda-phy-supply = <&vreg_l3a>;
 681         vdda-pll-supply = <&vreg_l5a>;
 682
 683         status = "okay";
 684 };
 685
 686 &xo_board_clk {
 687         clock-frequency = <38400000>;
 688 };
 689
 690 /* PINCTRL */
 691
 692 &pmm8540a_gpios {
 693         max20411_en: max20411-en-state {
 694                 pins = "gpio2";
 695                 function = "normal";
 696                 output-enable;
 697         };
 698 };
 699
 700 &tlmm {
 701         pcie2a_default: pcie2a-default-state {
 702                 clkreq-n-pins {
 703                         pins = "gpio142";
 704                         function = "pcie2a_clkreq";
 705                         drive-strength = <2>;
 706                         bias-pull-up;
 707                 };
 708
 709                 perst-n-pins {
 710                         pins = "gpio143";
 711                         function = "gpio";
 712                         drive-strength = <2>;
 713                         bias-pull-down;
 714                 };
 715
 716                 wake-n-pins {
 717                         pins = "gpio145";
 718                         function = "gpio";
 719                         drive-strength = <2>;
 720                         bias-pull-up;
 721                 };
 722         };
 723
 724         pcie3a_default: pcie3a-default-state {
 725                 clkreq-n-pins {
 726                         pins = "gpio150";
 727                         function = "pcie3a_clkreq";
 728                         drive-strength = <2>;
 729                         bias-pull-up;
 730                 };
 731
 732                 perst-n-pins {
 733                         pins = "gpio151";
 734                         function = "gpio";
 735                         drive-strength = <2>;
 736                         bias-pull-down;
 737                 };
 738
 739                 wake-n-pins {
 740                         pins = "gpio56";
 741                         function = "gpio";
 742                         drive-strength = <2>;
 743                         bias-pull-up;
 744                 };
 745         };
 746
 747         pcie3b_default: pcie3b-default-state {
 748                 clkreq-n-pins {
 749                         pins = "gpio152";
 750                         function = "pcie3b_clkreq";
 751                         drive-strength = <2>;
 752                         bias-pull-up;
 753                 };
 754
 755                 perst-n-pins {
 756                         pins = "gpio153";
 757                         function = "gpio";
 758                         drive-strength = <2>;
 759                         bias-pull-down;
 760                 };
 761
 762                 wake-n-pins {
 763                         pins = "gpio130";
 764                         function = "gpio";
 765                         drive-strength = <2>;
 766                         bias-pull-up;
 767                 };
 768         };
 769
 770         pcie4_default: pcie4-default-state {
 771                 clkreq-n-pins {
 772                         pins = "gpio140";
 773                         function = "pcie4_clkreq";
 774                         drive-strength = <2>;
 775                         bias-pull-up;
 776                 };
 777
 778                 perst-n-pins {
 779                         pins = "gpio141";
 780                         function = "gpio";
 781                         drive-strength = <2>;
 782                         bias-pull-down;
 783                 };
 784
 785                 wake-n-pins {
 786                         pins = "gpio139";
 787                         function = "gpio";
 788                         drive-strength = <2>;
 789                         bias-pull-up;
 790                 };
 791         };
 792
 793         qup1_i2c4_state: qup1-i2c4-state {
 794                 pins = "gpio0", "gpio1";
 795                 function = "qup12";
 796                 drive-strength = <2>;
 797                 bias-pull-up;
 798         };
 799 };