1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2019 BayLibre, SAS.
4 * Author: Fabien Parent <fparent@baylibre.com>
7 #include <dt-bindings/gpio/gpio.h>
12 ethernet0 = ðernet;
16 stdout-path = "serial0:921600n8";
20 optee: optee@4fd00000 {
21 compatible = "linaro,optee-tz";
27 compatible = "gpio-keys";
28 pinctrl-names = "default";
29 pinctrl-0 = <&gpio_keys_default>;
32 gpios = <&pio 42 GPIO_ACTIVE_LOW>;
36 debounce-interval = <15>;
40 gpios = <&pio 43 GPIO_ACTIVE_LOW>;
41 label = "volume_down";
44 debounce-interval = <15>;
51 pinctrl-names = "default";
52 pinctrl-0 = <&i2c0_pins_a>;
56 compatible = "ti,tca6416";
58 reset-gpios = <&pio 65 GPIO_ACTIVE_LOW>;
59 pinctrl-names = "default";
60 pinctrl-0 = <&tca6416_pins>;
69 line-name = "eint20_mux_sel0";
76 line-name = "expcon_mux_sel1";
83 line-name = "mrg_di_mux_sel2";
86 sd-sdio-mux-sel3-hog {
90 line-name = "sd_sdio_mux_sel3";
93 sd-sdio-mux-ctrl7-hog {
97 line-name = "sd_sdio_mux_ctrl7";
104 line-name = "hw_id0";
111 line-name = "hw_id1";
118 line-name = "hw_id2";
125 line-name = "fg_int_n";
132 line-name = "usba_pwr_en";
139 line-name = "wifi_3v3_pg";
146 line-name = "cam_rst";
153 line-name = "cam_pwdn";
160 pinctrl-names = "default";
161 pinctrl-0 = <&i2c2_pins_a>;
170 pinctrl-names = "default";
171 pinctrl-0 = <ðernet_pins_default>;
172 phy-handle = <ð_phy>;
174 mac-address = [00 00 00 00 00 00];
178 #address-cells = <1>;
181 eth_phy: ethernet-phy@0 {
189 dr_mode = "peripheral";
193 compatible = "usb-c-connector";
203 gpio_keys_default: gpiodefault {
205 pinmux = <MT8516_PIN_42_KPCOL0__FUNC_GPIO42>,
206 <MT8516_PIN_43_KPCOL1__FUNC_GPIO43>;
212 i2c0_pins_a: i2c0@0 {
214 pinmux = <MT8516_PIN_58_SDA0__FUNC_SDA0_0>,
215 <MT8516_PIN_59_SCL0__FUNC_SCL0_0>;
220 i2c2_pins_a: i2c2@0 {
222 pinmux = <MT8516_PIN_60_SDA2__FUNC_SDA2_0>,
223 <MT8516_PIN_61_SCL2__FUNC_SCL2_0>;
228 tca6416_pins: pinmux_tca6416_pins {
230 pinmux = <MT8516_PIN_65_UTXD1__FUNC_GPIO65>;
235 pinmux = <MT8516_PIN_64_URXD1__FUNC_GPIO64>;
241 ethernet_pins_default: ethernet {
243 pinmux = <MT8516_PIN_0_EINT0__FUNC_EXT_TXD0>,
244 <MT8516_PIN_1_EINT1__FUNC_EXT_TXD1>,
245 <MT8516_PIN_5_EINT5__FUNC_EXT_RXER>,
246 <MT8516_PIN_6_EINT6__FUNC_EXT_RXC>,
247 <MT8516_PIN_7_EINT7__FUNC_EXT_RXDV>,
248 <MT8516_PIN_8_EINT8__FUNC_EXT_RXD0>,
249 <MT8516_PIN_9_EINT9__FUNC_EXT_RXD1>,
250 <MT8516_PIN_12_EINT12__FUNC_EXT_TXEN>,
251 <MT8516_PIN_38_MRG_DI__FUNC_EXT_MDIO>,
252 <MT8516_PIN_39_MRG_DO__FUNC_EXT_MDC>;