2 * Copyright (c) 2016 Endless Computers, Inc.
3 * Author: Carlo Caione <carlo@endlessm.com>
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
10 * a) This library is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of the
13 * License, or (at your option) any later version.
15 * This library is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
22 * b) Permission is hereby granted, free of charge, to any person
23 * obtaining a copy of this software and associated documentation
24 * files (the "Software"), to deal in the Software without
25 * restriction, including without limitation the rights to use,
26 * copy, modify, merge, publish, distribute, sublicense, and/or
27 * sell copies of the Software, and to permit persons to whom the
28 * Software is furnished to do so, subject to the following
31 * The above copyright notice and this permission notice shall be
32 * included in all copies or substantial portions of the Software.
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
36 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
38 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
39 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
41 * OTHER DEALINGS IN THE SOFTWARE.
44 #include "meson-gx.dtsi"
45 #include <dt-bindings/clock/gxbb-clkc.h>
46 #include <dt-bindings/gpio/meson-gxl-gpio.h>
49 compatible = "amlogic,meson-gxl";
53 reg = <0x0 0xc9410000 0x0 0x10000
54 0x0 0xc8834540 0x0 0x4>;
56 clocks = <&clkc CLKID_ETH>,
57 <&clkc CLKID_FCLK_DIV2>,
59 clock-names = "stmmaceth", "clkin0", "clkin1";
64 compatible = "snps,dwmac-mdio";
69 pinctrl_aobus: pinctrl@14 {
70 compatible = "amlogic,meson-gxl-aobus-pinctrl";
76 reg = <0x0 0x00014 0x0 0x8>,
77 <0x0 0x0002c 0x0 0x4>,
78 <0x0 0x00024 0x0 0x8>;
79 reg-names = "mux", "pull", "gpio";
84 uart_ao_a_pins: uart_ao_a {
86 groups = "uart_tx_ao_a", "uart_rx_ao_a";
91 remote_input_ao_pins: remote_input_ao {
93 groups = "remote_input_ao";
94 function = "remote_input_ao";
101 pinctrl_periphs: pinctrl@4b0 {
102 compatible = "amlogic,meson-gxl-periphs-pinctrl";
103 #address-cells = <2>;
108 reg = <0x0 0x004b0 0x0 0x28>,
109 <0x0 0x004e8 0x0 0x14>,
110 <0x0 0x00120 0x0 0x14>,
111 <0x0 0x00430 0x0 0x40>;
112 reg-names = "mux", "pull", "pull-enable", "gpio";
119 groups = "emmc_nand_d07",
127 sdcard_pins: sdcard {
129 groups = "sdcard_d0",
151 sdio_irq_pins: sdio_irq {
158 uart_a_pins: uart_a {
160 groups = "uart_tx_a",
166 uart_b_pins: uart_b {
168 groups = "uart_tx_b",
174 uart_c_pins: uart_c {
176 groups = "uart_tx_c",
184 groups = "i2c_sck_a",
192 groups = "i2c_sck_b",
200 groups = "i2c_sck_c",
235 compatible = "mdio-mux-mmioreg", "mdio-mux";
236 #address-cells = <1>;
238 reg = <0x0 0x55c 0x0 0x4>;
239 mux-mask = <0xffffffff>;
240 mdio-parent-bus = <&mdio0>;
242 internal_mdio: mdio@e40908ff {
244 #address-cells = <1>;
247 internal_phy: ethernet-phy@8 {
248 compatible = "ethernet-phy-id0181.4400", "ethernet-phy-ieee802.3-c22";
254 external_mdio: mdio@2009087f {
256 #address-cells = <1>;
263 clkc: clock-controller@0 {
264 compatible = "amlogic,gxl-clkc", "amlogic,gxbb-clkc";
266 reg = <0x0 0x0 0x0 0x3db>;
271 clocks = <&clkc CLKID_I2C>;
275 clocks = <&clkc CLKID_I2C>;
279 clocks = <&clkc CLKID_I2C>;
283 clocks = <&clkc CLKID_SD_EMMC_A>,
285 <&clkc CLKID_FCLK_DIV2>;
286 clock-names = "core", "clkin0", "clkin1";
290 clocks = <&clkc CLKID_SD_EMMC_B>,
292 <&clkc CLKID_FCLK_DIV2>;
293 clock-names = "core", "clkin0", "clkin1";
297 clocks = <&clkc CLKID_SD_EMMC_C>,
299 <&clkc CLKID_FCLK_DIV2>;
300 clock-names = "core", "clkin0", "clkin1";
304 compatible = "amlogic,meson-gxl-vpu", "amlogic,meson-gx-vpu";