1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mm/dma-mapping.c
5 * Copyright (C) 2000-2004 Russell King
7 * DMA uncached mapping support.
9 #include <linux/module.h>
11 #include <linux/genalloc.h>
12 #include <linux/gfp.h>
13 #include <linux/errno.h>
14 #include <linux/list.h>
15 #include <linux/init.h>
16 #include <linux/device.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/dma-contiguous.h>
19 #include <linux/highmem.h>
20 #include <linux/memblock.h>
21 #include <linux/slab.h>
22 #include <linux/iommu.h>
24 #include <linux/vmalloc.h>
25 #include <linux/sizes.h>
26 #include <linux/cma.h>
28 #include <asm/memory.h>
29 #include <asm/highmem.h>
30 #include <asm/cacheflush.h>
31 #include <asm/tlbflush.h>
32 #include <asm/mach/arch.h>
33 #include <asm/dma-iommu.h>
34 #include <asm/mach/map.h>
35 #include <asm/system_info.h>
36 #include <asm/dma-contiguous.h>
41 struct arm_dma_alloc_args {
51 struct arm_dma_free_args {
62 struct arm_dma_allocator {
63 void *(*alloc)(struct arm_dma_alloc_args *args,
64 struct page **ret_page);
65 void (*free)(struct arm_dma_free_args *args);
68 struct arm_dma_buffer {
69 struct list_head list;
71 struct arm_dma_allocator *allocator;
74 static LIST_HEAD(arm_dma_bufs);
75 static DEFINE_SPINLOCK(arm_dma_bufs_lock);
77 static struct arm_dma_buffer *arm_dma_buffer_find(void *virt)
79 struct arm_dma_buffer *buf, *found = NULL;
82 spin_lock_irqsave(&arm_dma_bufs_lock, flags);
83 list_for_each_entry(buf, &arm_dma_bufs, list) {
84 if (buf->virt == virt) {
90 spin_unlock_irqrestore(&arm_dma_bufs_lock, flags);
95 * The DMA API is built upon the notion of "buffer ownership". A buffer
96 * is either exclusively owned by the CPU (and therefore may be accessed
97 * by it) or exclusively owned by the DMA device. These helper functions
98 * represent the transitions between these two ownership states.
100 * Note, however, that on later ARMs, this notion does not work due to
101 * speculative prefetches. We model our approach on the assumption that
102 * the CPU does do speculative prefetches, which means we clean caches
103 * before transfers and delay cache invalidation until transfer completion.
106 static void __dma_page_cpu_to_dev(struct page *, unsigned long,
107 size_t, enum dma_data_direction);
108 static void __dma_page_dev_to_cpu(struct page *, unsigned long,
109 size_t, enum dma_data_direction);
112 * arm_dma_map_page - map a portion of a page for streaming DMA
113 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
114 * @page: page that buffer resides in
115 * @offset: offset into page for start of buffer
116 * @size: size of buffer to map
117 * @dir: DMA transfer direction
119 * Ensure that any data held in the cache is appropriately discarded
122 * The device owns this memory once this call has completed. The CPU
123 * can regain ownership by calling dma_unmap_page().
125 static dma_addr_t arm_dma_map_page(struct device *dev, struct page *page,
126 unsigned long offset, size_t size, enum dma_data_direction dir,
129 if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
130 __dma_page_cpu_to_dev(page, offset, size, dir);
131 return pfn_to_dma(dev, page_to_pfn(page)) + offset;
134 static dma_addr_t arm_coherent_dma_map_page(struct device *dev, struct page *page,
135 unsigned long offset, size_t size, enum dma_data_direction dir,
138 return pfn_to_dma(dev, page_to_pfn(page)) + offset;
142 * arm_dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
143 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
144 * @handle: DMA address of buffer
145 * @size: size of buffer (same as passed to dma_map_page)
146 * @dir: DMA transfer direction (same as passed to dma_map_page)
148 * Unmap a page streaming mode DMA translation. The handle and size
149 * must match what was provided in the previous dma_map_page() call.
150 * All other usages are undefined.
152 * After this call, reads by the CPU to the buffer are guaranteed to see
153 * whatever the device wrote there.
155 static void arm_dma_unmap_page(struct device *dev, dma_addr_t handle,
156 size_t size, enum dma_data_direction dir, unsigned long attrs)
158 if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
159 __dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev, handle)),
160 handle & ~PAGE_MASK, size, dir);
163 static void arm_dma_sync_single_for_cpu(struct device *dev,
164 dma_addr_t handle, size_t size, enum dma_data_direction dir)
166 unsigned int offset = handle & (PAGE_SIZE - 1);
167 struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
168 __dma_page_dev_to_cpu(page, offset, size, dir);
171 static void arm_dma_sync_single_for_device(struct device *dev,
172 dma_addr_t handle, size_t size, enum dma_data_direction dir)
174 unsigned int offset = handle & (PAGE_SIZE - 1);
175 struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
176 __dma_page_cpu_to_dev(page, offset, size, dir);
179 const struct dma_map_ops arm_dma_ops = {
180 .alloc = arm_dma_alloc,
181 .free = arm_dma_free,
182 .mmap = arm_dma_mmap,
183 .get_sgtable = arm_dma_get_sgtable,
184 .map_page = arm_dma_map_page,
185 .unmap_page = arm_dma_unmap_page,
186 .map_sg = arm_dma_map_sg,
187 .unmap_sg = arm_dma_unmap_sg,
188 .map_resource = dma_direct_map_resource,
189 .sync_single_for_cpu = arm_dma_sync_single_for_cpu,
190 .sync_single_for_device = arm_dma_sync_single_for_device,
191 .sync_sg_for_cpu = arm_dma_sync_sg_for_cpu,
192 .sync_sg_for_device = arm_dma_sync_sg_for_device,
193 .dma_supported = arm_dma_supported,
195 EXPORT_SYMBOL(arm_dma_ops);
197 static void *arm_coherent_dma_alloc(struct device *dev, size_t size,
198 dma_addr_t *handle, gfp_t gfp, unsigned long attrs);
199 static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_addr,
200 dma_addr_t handle, unsigned long attrs);
201 static int arm_coherent_dma_mmap(struct device *dev, struct vm_area_struct *vma,
202 void *cpu_addr, dma_addr_t dma_addr, size_t size,
203 unsigned long attrs);
205 const struct dma_map_ops arm_coherent_dma_ops = {
206 .alloc = arm_coherent_dma_alloc,
207 .free = arm_coherent_dma_free,
208 .mmap = arm_coherent_dma_mmap,
209 .get_sgtable = arm_dma_get_sgtable,
210 .map_page = arm_coherent_dma_map_page,
211 .map_sg = arm_dma_map_sg,
212 .map_resource = dma_direct_map_resource,
213 .dma_supported = arm_dma_supported,
215 EXPORT_SYMBOL(arm_coherent_dma_ops);
217 static int __dma_supported(struct device *dev, u64 mask, bool warn)
219 unsigned long max_dma_pfn;
222 * If the mask allows for more memory than we can address,
223 * and we actually have that much memory, then we must
224 * indicate that DMA to this device is not supported.
226 if (sizeof(mask) != sizeof(dma_addr_t) &&
227 mask > (dma_addr_t)~0 &&
228 dma_to_pfn(dev, ~0) < max_pfn - 1) {
230 dev_warn(dev, "Coherent DMA mask %#llx is larger than dma_addr_t allows\n",
232 dev_warn(dev, "Driver did not use or check the return value from dma_set_coherent_mask()?\n");
237 max_dma_pfn = min(max_pfn, arm_dma_pfn_limit);
240 * Translate the device's DMA mask to a PFN limit. This
241 * PFN number includes the page which we can DMA to.
243 if (dma_to_pfn(dev, mask) < max_dma_pfn) {
245 dev_warn(dev, "Coherent DMA mask %#llx (pfn %#lx-%#lx) covers a smaller range of system memory than the DMA zone pfn 0x0-%#lx\n",
247 dma_to_pfn(dev, 0), dma_to_pfn(dev, mask) + 1,
255 static u64 get_coherent_dma_mask(struct device *dev)
257 u64 mask = (u64)DMA_BIT_MASK(32);
260 mask = dev->coherent_dma_mask;
263 * Sanity check the DMA mask - it must be non-zero, and
264 * must be able to be satisfied by a DMA allocation.
267 dev_warn(dev, "coherent DMA mask is unset\n");
271 if (!__dma_supported(dev, mask, true))
278 static void __dma_clear_buffer(struct page *page, size_t size, int coherent_flag)
281 * Ensure that the allocated pages are zeroed, and that any data
282 * lurking in the kernel direct-mapped region is invalidated.
284 if (PageHighMem(page)) {
285 phys_addr_t base = __pfn_to_phys(page_to_pfn(page));
286 phys_addr_t end = base + size;
288 void *ptr = kmap_atomic(page);
289 memset(ptr, 0, PAGE_SIZE);
290 if (coherent_flag != COHERENT)
291 dmac_flush_range(ptr, ptr + PAGE_SIZE);
296 if (coherent_flag != COHERENT)
297 outer_flush_range(base, end);
299 void *ptr = page_address(page);
300 memset(ptr, 0, size);
301 if (coherent_flag != COHERENT) {
302 dmac_flush_range(ptr, ptr + size);
303 outer_flush_range(__pa(ptr), __pa(ptr) + size);
309 * Allocate a DMA buffer for 'dev' of size 'size' using the
310 * specified gfp mask. Note that 'size' must be page aligned.
312 static struct page *__dma_alloc_buffer(struct device *dev, size_t size,
313 gfp_t gfp, int coherent_flag)
315 unsigned long order = get_order(size);
316 struct page *page, *p, *e;
318 page = alloc_pages(gfp, order);
323 * Now split the huge page and free the excess pages
325 split_page(page, order);
326 for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++)
329 __dma_clear_buffer(page, size, coherent_flag);
335 * Free a DMA buffer. 'size' must be page aligned.
337 static void __dma_free_buffer(struct page *page, size_t size)
339 struct page *e = page + (size >> PAGE_SHIFT);
347 static void *__alloc_from_contiguous(struct device *dev, size_t size,
348 pgprot_t prot, struct page **ret_page,
349 const void *caller, bool want_vaddr,
350 int coherent_flag, gfp_t gfp);
352 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
353 pgprot_t prot, struct page **ret_page,
354 const void *caller, bool want_vaddr);
357 __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot,
361 * DMA allocation can be mapped to user space, so lets
362 * set VM_USERMAP flags too.
364 return dma_common_contiguous_remap(page, size,
365 VM_ARM_DMA_CONSISTENT | VM_USERMAP,
369 static void __dma_free_remap(void *cpu_addr, size_t size)
371 dma_common_free_remap(cpu_addr, size,
372 VM_ARM_DMA_CONSISTENT | VM_USERMAP);
375 #define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
376 static struct gen_pool *atomic_pool __ro_after_init;
378 static size_t atomic_pool_size __initdata = DEFAULT_DMA_COHERENT_POOL_SIZE;
380 static int __init early_coherent_pool(char *p)
382 atomic_pool_size = memparse(p, &p);
385 early_param("coherent_pool", early_coherent_pool);
388 * Initialise the coherent pool for atomic allocations.
390 static int __init atomic_pool_init(void)
392 pgprot_t prot = pgprot_dmacoherent(PAGE_KERNEL);
393 gfp_t gfp = GFP_KERNEL | GFP_DMA;
397 atomic_pool = gen_pool_create(PAGE_SHIFT, -1);
401 * The atomic pool is only used for non-coherent allocations
402 * so we must pass NORMAL for coherent_flag.
404 if (dev_get_cma_area(NULL))
405 ptr = __alloc_from_contiguous(NULL, atomic_pool_size, prot,
406 &page, atomic_pool_init, true, NORMAL,
409 ptr = __alloc_remap_buffer(NULL, atomic_pool_size, gfp, prot,
410 &page, atomic_pool_init, true);
414 ret = gen_pool_add_virt(atomic_pool, (unsigned long)ptr,
416 atomic_pool_size, -1);
418 goto destroy_genpool;
420 gen_pool_set_algo(atomic_pool,
421 gen_pool_first_fit_order_align,
423 pr_info("DMA: preallocated %zu KiB pool for atomic coherent allocations\n",
424 atomic_pool_size / 1024);
429 gen_pool_destroy(atomic_pool);
432 pr_err("DMA: failed to allocate %zu KiB pool for atomic coherent allocation\n",
433 atomic_pool_size / 1024);
437 * CMA is activated by core_initcall, so we must be called after it.
439 postcore_initcall(atomic_pool_init);
441 struct dma_contig_early_reserve {
446 static struct dma_contig_early_reserve dma_mmu_remap[MAX_CMA_AREAS] __initdata;
448 static int dma_mmu_remap_num __initdata;
450 void __init dma_contiguous_early_fixup(phys_addr_t base, unsigned long size)
452 dma_mmu_remap[dma_mmu_remap_num].base = base;
453 dma_mmu_remap[dma_mmu_remap_num].size = size;
457 void __init dma_contiguous_remap(void)
460 for (i = 0; i < dma_mmu_remap_num; i++) {
461 phys_addr_t start = dma_mmu_remap[i].base;
462 phys_addr_t end = start + dma_mmu_remap[i].size;
466 if (end > arm_lowmem_limit)
467 end = arm_lowmem_limit;
471 map.pfn = __phys_to_pfn(start);
472 map.virtual = __phys_to_virt(start);
473 map.length = end - start;
474 map.type = MT_MEMORY_DMA_READY;
477 * Clear previous low-memory mapping to ensure that the
478 * TLB does not see any conflicting entries, then flush
479 * the TLB of the old entries before creating new mappings.
481 * This ensures that any speculatively loaded TLB entries
482 * (even though they may be rare) can not cause any problems,
483 * and ensures that this code is architecturally compliant.
485 for (addr = __phys_to_virt(start); addr < __phys_to_virt(end);
487 pmd_clear(pmd_off_k(addr));
489 flush_tlb_kernel_range(__phys_to_virt(start),
490 __phys_to_virt(end));
492 iotable_init(&map, 1);
496 static int __dma_update_pte(pte_t *pte, unsigned long addr, void *data)
498 struct page *page = virt_to_page(addr);
499 pgprot_t prot = *(pgprot_t *)data;
501 set_pte_ext(pte, mk_pte(page, prot), 0);
505 static void __dma_remap(struct page *page, size_t size, pgprot_t prot)
507 unsigned long start = (unsigned long) page_address(page);
508 unsigned end = start + size;
510 apply_to_page_range(&init_mm, start, size, __dma_update_pte, &prot);
511 flush_tlb_kernel_range(start, end);
514 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
515 pgprot_t prot, struct page **ret_page,
516 const void *caller, bool want_vaddr)
521 * __alloc_remap_buffer is only called when the device is
524 page = __dma_alloc_buffer(dev, size, gfp, NORMAL);
530 ptr = __dma_alloc_remap(page, size, gfp, prot, caller);
532 __dma_free_buffer(page, size);
541 static void *__alloc_from_pool(size_t size, struct page **ret_page)
547 WARN(1, "coherent pool not initialised!\n");
551 val = gen_pool_alloc(atomic_pool, size);
553 phys_addr_t phys = gen_pool_virt_to_phys(atomic_pool, val);
555 *ret_page = phys_to_page(phys);
562 static bool __in_atomic_pool(void *start, size_t size)
564 return addr_in_gen_pool(atomic_pool, (unsigned long)start, size);
567 static int __free_from_pool(void *start, size_t size)
569 if (!__in_atomic_pool(start, size))
572 gen_pool_free(atomic_pool, (unsigned long)start, size);
577 static void *__alloc_from_contiguous(struct device *dev, size_t size,
578 pgprot_t prot, struct page **ret_page,
579 const void *caller, bool want_vaddr,
580 int coherent_flag, gfp_t gfp)
582 unsigned long order = get_order(size);
583 size_t count = size >> PAGE_SHIFT;
587 page = dma_alloc_from_contiguous(dev, count, order, gfp & __GFP_NOWARN);
591 __dma_clear_buffer(page, size, coherent_flag);
596 if (PageHighMem(page)) {
597 ptr = __dma_alloc_remap(page, size, GFP_KERNEL, prot, caller);
599 dma_release_from_contiguous(dev, page, count);
603 __dma_remap(page, size, prot);
604 ptr = page_address(page);
612 static void __free_from_contiguous(struct device *dev, struct page *page,
613 void *cpu_addr, size_t size, bool want_vaddr)
616 if (PageHighMem(page))
617 __dma_free_remap(cpu_addr, size);
619 __dma_remap(page, size, PAGE_KERNEL);
621 dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT);
624 static inline pgprot_t __get_dma_pgprot(unsigned long attrs, pgprot_t prot)
626 prot = (attrs & DMA_ATTR_WRITE_COMBINE) ?
627 pgprot_writecombine(prot) :
628 pgprot_dmacoherent(prot);
632 static void *__alloc_simple_buffer(struct device *dev, size_t size, gfp_t gfp,
633 struct page **ret_page)
636 /* __alloc_simple_buffer is only called when the device is coherent */
637 page = __dma_alloc_buffer(dev, size, gfp, COHERENT);
642 return page_address(page);
645 static void *simple_allocator_alloc(struct arm_dma_alloc_args *args,
646 struct page **ret_page)
648 return __alloc_simple_buffer(args->dev, args->size, args->gfp,
652 static void simple_allocator_free(struct arm_dma_free_args *args)
654 __dma_free_buffer(args->page, args->size);
657 static struct arm_dma_allocator simple_allocator = {
658 .alloc = simple_allocator_alloc,
659 .free = simple_allocator_free,
662 static void *cma_allocator_alloc(struct arm_dma_alloc_args *args,
663 struct page **ret_page)
665 return __alloc_from_contiguous(args->dev, args->size, args->prot,
666 ret_page, args->caller,
667 args->want_vaddr, args->coherent_flag,
671 static void cma_allocator_free(struct arm_dma_free_args *args)
673 __free_from_contiguous(args->dev, args->page, args->cpu_addr,
674 args->size, args->want_vaddr);
677 static struct arm_dma_allocator cma_allocator = {
678 .alloc = cma_allocator_alloc,
679 .free = cma_allocator_free,
682 static void *pool_allocator_alloc(struct arm_dma_alloc_args *args,
683 struct page **ret_page)
685 return __alloc_from_pool(args->size, ret_page);
688 static void pool_allocator_free(struct arm_dma_free_args *args)
690 __free_from_pool(args->cpu_addr, args->size);
693 static struct arm_dma_allocator pool_allocator = {
694 .alloc = pool_allocator_alloc,
695 .free = pool_allocator_free,
698 static void *remap_allocator_alloc(struct arm_dma_alloc_args *args,
699 struct page **ret_page)
701 return __alloc_remap_buffer(args->dev, args->size, args->gfp,
702 args->prot, ret_page, args->caller,
706 static void remap_allocator_free(struct arm_dma_free_args *args)
708 if (args->want_vaddr)
709 __dma_free_remap(args->cpu_addr, args->size);
711 __dma_free_buffer(args->page, args->size);
714 static struct arm_dma_allocator remap_allocator = {
715 .alloc = remap_allocator_alloc,
716 .free = remap_allocator_free,
719 static void *__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
720 gfp_t gfp, pgprot_t prot, bool is_coherent,
721 unsigned long attrs, const void *caller)
723 u64 mask = get_coherent_dma_mask(dev);
724 struct page *page = NULL;
726 bool allowblock, cma;
727 struct arm_dma_buffer *buf;
728 struct arm_dma_alloc_args args = {
730 .size = PAGE_ALIGN(size),
734 .want_vaddr = ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) == 0),
735 .coherent_flag = is_coherent ? COHERENT : NORMAL,
738 #ifdef CONFIG_DMA_API_DEBUG
739 u64 limit = (mask + 1) & ~mask;
740 if (limit && size >= limit) {
741 dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n",
750 buf = kzalloc(sizeof(*buf),
751 gfp & ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM));
755 if (mask < 0xffffffffULL)
759 * Following is a work-around (a.k.a. hack) to prevent pages
760 * with __GFP_COMP being passed to split_page() which cannot
761 * handle them. The real problem is that this flag probably
762 * should be 0 on ARM as it is not supported on this
763 * platform; see CONFIG_HUGETLBFS.
765 gfp &= ~(__GFP_COMP);
768 *handle = DMA_MAPPING_ERROR;
769 allowblock = gfpflags_allow_blocking(gfp);
770 cma = allowblock ? dev_get_cma_area(dev) : false;
773 buf->allocator = &cma_allocator;
774 else if (is_coherent)
775 buf->allocator = &simple_allocator;
777 buf->allocator = &remap_allocator;
779 buf->allocator = &pool_allocator;
781 addr = buf->allocator->alloc(&args, &page);
786 *handle = pfn_to_dma(dev, page_to_pfn(page));
787 buf->virt = args.want_vaddr ? addr : page;
789 spin_lock_irqsave(&arm_dma_bufs_lock, flags);
790 list_add(&buf->list, &arm_dma_bufs);
791 spin_unlock_irqrestore(&arm_dma_bufs_lock, flags);
796 return args.want_vaddr ? addr : page;
800 * Allocate DMA-coherent memory space and return both the kernel remapped
801 * virtual and bus address for that space.
803 void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
804 gfp_t gfp, unsigned long attrs)
806 pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL);
808 return __dma_alloc(dev, size, handle, gfp, prot, false,
809 attrs, __builtin_return_address(0));
812 static void *arm_coherent_dma_alloc(struct device *dev, size_t size,
813 dma_addr_t *handle, gfp_t gfp, unsigned long attrs)
815 return __dma_alloc(dev, size, handle, gfp, PAGE_KERNEL, true,
816 attrs, __builtin_return_address(0));
819 static int __arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
820 void *cpu_addr, dma_addr_t dma_addr, size_t size,
824 unsigned long nr_vma_pages = vma_pages(vma);
825 unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
826 unsigned long pfn = dma_to_pfn(dev, dma_addr);
827 unsigned long off = vma->vm_pgoff;
829 if (dma_mmap_from_dev_coherent(dev, vma, cpu_addr, size, &ret))
832 if (off < nr_pages && nr_vma_pages <= (nr_pages - off)) {
833 ret = remap_pfn_range(vma, vma->vm_start,
835 vma->vm_end - vma->vm_start,
843 * Create userspace mapping for the DMA-coherent memory.
845 static int arm_coherent_dma_mmap(struct device *dev, struct vm_area_struct *vma,
846 void *cpu_addr, dma_addr_t dma_addr, size_t size,
849 return __arm_dma_mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
852 int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
853 void *cpu_addr, dma_addr_t dma_addr, size_t size,
856 vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
857 return __arm_dma_mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
861 * Free a buffer as defined by the above mapping.
863 static void __arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
864 dma_addr_t handle, unsigned long attrs,
867 struct page *page = pfn_to_page(dma_to_pfn(dev, handle));
868 struct arm_dma_buffer *buf;
869 struct arm_dma_free_args args = {
871 .size = PAGE_ALIGN(size),
872 .cpu_addr = cpu_addr,
874 .want_vaddr = ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) == 0),
877 buf = arm_dma_buffer_find(cpu_addr);
878 if (WARN(!buf, "Freeing invalid buffer %p\n", cpu_addr))
881 buf->allocator->free(&args);
885 void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
886 dma_addr_t handle, unsigned long attrs)
888 __arm_dma_free(dev, size, cpu_addr, handle, attrs, false);
891 static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_addr,
892 dma_addr_t handle, unsigned long attrs)
894 __arm_dma_free(dev, size, cpu_addr, handle, attrs, true);
898 * The whole dma_get_sgtable() idea is fundamentally unsafe - it seems
899 * that the intention is to allow exporting memory allocated via the
900 * coherent DMA APIs through the dma_buf API, which only accepts a
901 * scattertable. This presents a couple of problems:
902 * 1. Not all memory allocated via the coherent DMA APIs is backed by
904 * 2. Passing coherent DMA memory into the streaming APIs is not allowed
905 * as we will try to flush the memory through a different alias to that
906 * actually being used (and the flushes are redundant.)
908 int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt,
909 void *cpu_addr, dma_addr_t handle, size_t size,
912 unsigned long pfn = dma_to_pfn(dev, handle);
916 /* If the PFN is not valid, we do not have a struct page */
920 page = pfn_to_page(pfn);
922 ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
926 sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0);
930 static void dma_cache_maint_page(struct page *page, unsigned long offset,
931 size_t size, enum dma_data_direction dir,
932 void (*op)(const void *, size_t, int))
937 pfn = page_to_pfn(page) + offset / PAGE_SIZE;
941 * A single sg entry may refer to multiple physically contiguous
942 * pages. But we still need to process highmem pages individually.
943 * If highmem is not configured then the bulk of this loop gets
950 page = pfn_to_page(pfn);
952 if (PageHighMem(page)) {
953 if (len + offset > PAGE_SIZE)
954 len = PAGE_SIZE - offset;
956 if (cache_is_vipt_nonaliasing()) {
957 vaddr = kmap_atomic(page);
958 op(vaddr + offset, len, dir);
959 kunmap_atomic(vaddr);
961 vaddr = kmap_high_get(page);
963 op(vaddr + offset, len, dir);
968 vaddr = page_address(page) + offset;
978 * Make an area consistent for devices.
979 * Note: Drivers should NOT use this function directly, as it will break
980 * platforms with CONFIG_DMABOUNCE.
981 * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
983 static void __dma_page_cpu_to_dev(struct page *page, unsigned long off,
984 size_t size, enum dma_data_direction dir)
988 dma_cache_maint_page(page, off, size, dir, dmac_map_area);
990 paddr = page_to_phys(page) + off;
991 if (dir == DMA_FROM_DEVICE) {
992 outer_inv_range(paddr, paddr + size);
994 outer_clean_range(paddr, paddr + size);
996 /* FIXME: non-speculating: flush on bidirectional mappings? */
999 static void __dma_page_dev_to_cpu(struct page *page, unsigned long off,
1000 size_t size, enum dma_data_direction dir)
1002 phys_addr_t paddr = page_to_phys(page) + off;
1004 /* FIXME: non-speculating: not required */
1005 /* in any case, don't bother invalidating if DMA to device */
1006 if (dir != DMA_TO_DEVICE) {
1007 outer_inv_range(paddr, paddr + size);
1009 dma_cache_maint_page(page, off, size, dir, dmac_unmap_area);
1013 * Mark the D-cache clean for these pages to avoid extra flushing.
1015 if (dir != DMA_TO_DEVICE && size >= PAGE_SIZE) {
1019 pfn = page_to_pfn(page) + off / PAGE_SIZE;
1023 left -= PAGE_SIZE - off;
1025 while (left >= PAGE_SIZE) {
1026 page = pfn_to_page(pfn++);
1027 set_bit(PG_dcache_clean, &page->flags);
1034 * arm_dma_map_sg - map a set of SG buffers for streaming mode DMA
1035 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1036 * @sg: list of buffers
1037 * @nents: number of buffers to map
1038 * @dir: DMA transfer direction
1040 * Map a set of buffers described by scatterlist in streaming mode for DMA.
1041 * This is the scatter-gather version of the dma_map_single interface.
1042 * Here the scatter gather list elements are each tagged with the
1043 * appropriate dma address and length. They are obtained via
1044 * sg_dma_{address,length}.
1046 * Device ownership issues as mentioned for dma_map_single are the same
1049 int arm_dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
1050 enum dma_data_direction dir, unsigned long attrs)
1052 const struct dma_map_ops *ops = get_dma_ops(dev);
1053 struct scatterlist *s;
1056 for_each_sg(sg, s, nents, i) {
1057 #ifdef CONFIG_NEED_SG_DMA_LENGTH
1058 s->dma_length = s->length;
1060 s->dma_address = ops->map_page(dev, sg_page(s), s->offset,
1061 s->length, dir, attrs);
1062 if (dma_mapping_error(dev, s->dma_address))
1068 for_each_sg(sg, s, i, j)
1069 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
1074 * arm_dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1075 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1076 * @sg: list of buffers
1077 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1078 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1080 * Unmap a set of streaming mode DMA translations. Again, CPU access
1081 * rules concerning calls here are the same as for dma_unmap_single().
1083 void arm_dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
1084 enum dma_data_direction dir, unsigned long attrs)
1086 const struct dma_map_ops *ops = get_dma_ops(dev);
1087 struct scatterlist *s;
1091 for_each_sg(sg, s, nents, i)
1092 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
1096 * arm_dma_sync_sg_for_cpu
1097 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1098 * @sg: list of buffers
1099 * @nents: number of buffers to map (returned from dma_map_sg)
1100 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1102 void arm_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
1103 int nents, enum dma_data_direction dir)
1105 const struct dma_map_ops *ops = get_dma_ops(dev);
1106 struct scatterlist *s;
1109 for_each_sg(sg, s, nents, i)
1110 ops->sync_single_for_cpu(dev, sg_dma_address(s), s->length,
1115 * arm_dma_sync_sg_for_device
1116 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1117 * @sg: list of buffers
1118 * @nents: number of buffers to map (returned from dma_map_sg)
1119 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1121 void arm_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
1122 int nents, enum dma_data_direction dir)
1124 const struct dma_map_ops *ops = get_dma_ops(dev);
1125 struct scatterlist *s;
1128 for_each_sg(sg, s, nents, i)
1129 ops->sync_single_for_device(dev, sg_dma_address(s), s->length,
1134 * Return whether the given device DMA address mask can be supported
1135 * properly. For example, if your device can only drive the low 24-bits
1136 * during bus mastering, then you would pass 0x00ffffff as the mask
1139 int arm_dma_supported(struct device *dev, u64 mask)
1141 return __dma_supported(dev, mask, false);
1144 static const struct dma_map_ops *arm_get_dma_map_ops(bool coherent)
1146 return coherent ? &arm_coherent_dma_ops : &arm_dma_ops;
1149 #ifdef CONFIG_ARM_DMA_USE_IOMMU
1151 static int __dma_info_to_prot(enum dma_data_direction dir, unsigned long attrs)
1155 if (attrs & DMA_ATTR_PRIVILEGED)
1159 case DMA_BIDIRECTIONAL:
1160 return prot | IOMMU_READ | IOMMU_WRITE;
1162 return prot | IOMMU_READ;
1163 case DMA_FROM_DEVICE:
1164 return prot | IOMMU_WRITE;
1172 static int extend_iommu_mapping(struct dma_iommu_mapping *mapping);
1174 static inline dma_addr_t __alloc_iova(struct dma_iommu_mapping *mapping,
1177 unsigned int order = get_order(size);
1178 unsigned int align = 0;
1179 unsigned int count, start;
1180 size_t mapping_size = mapping->bits << PAGE_SHIFT;
1181 unsigned long flags;
1185 if (order > CONFIG_ARM_DMA_IOMMU_ALIGNMENT)
1186 order = CONFIG_ARM_DMA_IOMMU_ALIGNMENT;
1188 count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1189 align = (1 << order) - 1;
1191 spin_lock_irqsave(&mapping->lock, flags);
1192 for (i = 0; i < mapping->nr_bitmaps; i++) {
1193 start = bitmap_find_next_zero_area(mapping->bitmaps[i],
1194 mapping->bits, 0, count, align);
1196 if (start > mapping->bits)
1199 bitmap_set(mapping->bitmaps[i], start, count);
1204 * No unused range found. Try to extend the existing mapping
1205 * and perform a second attempt to reserve an IO virtual
1206 * address range of size bytes.
1208 if (i == mapping->nr_bitmaps) {
1209 if (extend_iommu_mapping(mapping)) {
1210 spin_unlock_irqrestore(&mapping->lock, flags);
1211 return DMA_MAPPING_ERROR;
1214 start = bitmap_find_next_zero_area(mapping->bitmaps[i],
1215 mapping->bits, 0, count, align);
1217 if (start > mapping->bits) {
1218 spin_unlock_irqrestore(&mapping->lock, flags);
1219 return DMA_MAPPING_ERROR;
1222 bitmap_set(mapping->bitmaps[i], start, count);
1224 spin_unlock_irqrestore(&mapping->lock, flags);
1226 iova = mapping->base + (mapping_size * i);
1227 iova += start << PAGE_SHIFT;
1232 static inline void __free_iova(struct dma_iommu_mapping *mapping,
1233 dma_addr_t addr, size_t size)
1235 unsigned int start, count;
1236 size_t mapping_size = mapping->bits << PAGE_SHIFT;
1237 unsigned long flags;
1238 dma_addr_t bitmap_base;
1244 bitmap_index = (u32) (addr - mapping->base) / (u32) mapping_size;
1245 BUG_ON(addr < mapping->base || bitmap_index > mapping->extensions);
1247 bitmap_base = mapping->base + mapping_size * bitmap_index;
1249 start = (addr - bitmap_base) >> PAGE_SHIFT;
1251 if (addr + size > bitmap_base + mapping_size) {
1253 * The address range to be freed reaches into the iova
1254 * range of the next bitmap. This should not happen as
1255 * we don't allow this in __alloc_iova (at the
1260 count = size >> PAGE_SHIFT;
1262 spin_lock_irqsave(&mapping->lock, flags);
1263 bitmap_clear(mapping->bitmaps[bitmap_index], start, count);
1264 spin_unlock_irqrestore(&mapping->lock, flags);
1267 /* We'll try 2M, 1M, 64K, and finally 4K; array must end with 0! */
1268 static const int iommu_order_array[] = { 9, 8, 4, 0 };
1270 static struct page **__iommu_alloc_buffer(struct device *dev, size_t size,
1271 gfp_t gfp, unsigned long attrs,
1274 struct page **pages;
1275 int count = size >> PAGE_SHIFT;
1276 int array_size = count * sizeof(struct page *);
1280 if (array_size <= PAGE_SIZE)
1281 pages = kzalloc(array_size, GFP_KERNEL);
1283 pages = vzalloc(array_size);
1287 if (attrs & DMA_ATTR_FORCE_CONTIGUOUS)
1289 unsigned long order = get_order(size);
1292 page = dma_alloc_from_contiguous(dev, count, order,
1293 gfp & __GFP_NOWARN);
1297 __dma_clear_buffer(page, size, coherent_flag);
1299 for (i = 0; i < count; i++)
1300 pages[i] = page + i;
1305 /* Go straight to 4K chunks if caller says it's OK. */
1306 if (attrs & DMA_ATTR_ALLOC_SINGLE_PAGES)
1307 order_idx = ARRAY_SIZE(iommu_order_array) - 1;
1310 * IOMMU can map any pages, so himem can also be used here
1312 gfp |= __GFP_NOWARN | __GFP_HIGHMEM;
1317 order = iommu_order_array[order_idx];
1319 /* Drop down when we get small */
1320 if (__fls(count) < order) {
1326 /* See if it's easy to allocate a high-order chunk */
1327 pages[i] = alloc_pages(gfp | __GFP_NORETRY, order);
1329 /* Go down a notch at first sign of pressure */
1335 pages[i] = alloc_pages(gfp, 0);
1341 split_page(pages[i], order);
1344 pages[i + j] = pages[i] + j;
1347 __dma_clear_buffer(pages[i], PAGE_SIZE << order, coherent_flag);
1349 count -= 1 << order;
1356 __free_pages(pages[i], 0);
1361 static int __iommu_free_buffer(struct device *dev, struct page **pages,
1362 size_t size, unsigned long attrs)
1364 int count = size >> PAGE_SHIFT;
1367 if (attrs & DMA_ATTR_FORCE_CONTIGUOUS) {
1368 dma_release_from_contiguous(dev, pages[0], count);
1370 for (i = 0; i < count; i++)
1372 __free_pages(pages[i], 0);
1380 * Create a CPU mapping for a specified pages
1383 __iommu_alloc_remap(struct page **pages, size_t size, gfp_t gfp, pgprot_t prot,
1386 return dma_common_pages_remap(pages, size,
1387 VM_ARM_DMA_CONSISTENT | VM_USERMAP, prot, caller);
1391 * Create a mapping in device IO address space for specified pages
1394 __iommu_create_mapping(struct device *dev, struct page **pages, size_t size,
1395 unsigned long attrs)
1397 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1398 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1399 dma_addr_t dma_addr, iova;
1402 dma_addr = __alloc_iova(mapping, size);
1403 if (dma_addr == DMA_MAPPING_ERROR)
1407 for (i = 0; i < count; ) {
1410 unsigned int next_pfn = page_to_pfn(pages[i]) + 1;
1411 phys_addr_t phys = page_to_phys(pages[i]);
1412 unsigned int len, j;
1414 for (j = i + 1; j < count; j++, next_pfn++)
1415 if (page_to_pfn(pages[j]) != next_pfn)
1418 len = (j - i) << PAGE_SHIFT;
1419 ret = iommu_map(mapping->domain, iova, phys, len,
1420 __dma_info_to_prot(DMA_BIDIRECTIONAL, attrs));
1428 iommu_unmap(mapping->domain, dma_addr, iova-dma_addr);
1429 __free_iova(mapping, dma_addr, size);
1430 return DMA_MAPPING_ERROR;
1433 static int __iommu_remove_mapping(struct device *dev, dma_addr_t iova, size_t size)
1435 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1438 * add optional in-page offset from iova to size and align
1439 * result to page size
1441 size = PAGE_ALIGN((iova & ~PAGE_MASK) + size);
1444 iommu_unmap(mapping->domain, iova, size);
1445 __free_iova(mapping, iova, size);
1449 static struct page **__atomic_get_pages(void *addr)
1454 phys = gen_pool_virt_to_phys(atomic_pool, (unsigned long)addr);
1455 page = phys_to_page(phys);
1457 return (struct page **)page;
1460 static struct page **__iommu_get_pages(void *cpu_addr, unsigned long attrs)
1462 struct vm_struct *area;
1464 if (__in_atomic_pool(cpu_addr, PAGE_SIZE))
1465 return __atomic_get_pages(cpu_addr);
1467 if (attrs & DMA_ATTR_NO_KERNEL_MAPPING)
1470 area = find_vm_area(cpu_addr);
1471 if (area && (area->flags & VM_ARM_DMA_CONSISTENT))
1476 static void *__iommu_alloc_simple(struct device *dev, size_t size, gfp_t gfp,
1477 dma_addr_t *handle, int coherent_flag,
1478 unsigned long attrs)
1483 if (coherent_flag == COHERENT)
1484 addr = __alloc_simple_buffer(dev, size, gfp, &page);
1486 addr = __alloc_from_pool(size, &page);
1490 *handle = __iommu_create_mapping(dev, &page, size, attrs);
1491 if (*handle == DMA_MAPPING_ERROR)
1497 __free_from_pool(addr, size);
1501 static void __iommu_free_atomic(struct device *dev, void *cpu_addr,
1502 dma_addr_t handle, size_t size, int coherent_flag)
1504 __iommu_remove_mapping(dev, handle, size);
1505 if (coherent_flag == COHERENT)
1506 __dma_free_buffer(virt_to_page(cpu_addr), size);
1508 __free_from_pool(cpu_addr, size);
1511 static void *__arm_iommu_alloc_attrs(struct device *dev, size_t size,
1512 dma_addr_t *handle, gfp_t gfp, unsigned long attrs,
1515 pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL);
1516 struct page **pages;
1519 *handle = DMA_MAPPING_ERROR;
1520 size = PAGE_ALIGN(size);
1522 if (coherent_flag == COHERENT || !gfpflags_allow_blocking(gfp))
1523 return __iommu_alloc_simple(dev, size, gfp, handle,
1524 coherent_flag, attrs);
1527 * Following is a work-around (a.k.a. hack) to prevent pages
1528 * with __GFP_COMP being passed to split_page() which cannot
1529 * handle them. The real problem is that this flag probably
1530 * should be 0 on ARM as it is not supported on this
1531 * platform; see CONFIG_HUGETLBFS.
1533 gfp &= ~(__GFP_COMP);
1535 pages = __iommu_alloc_buffer(dev, size, gfp, attrs, coherent_flag);
1539 *handle = __iommu_create_mapping(dev, pages, size, attrs);
1540 if (*handle == DMA_MAPPING_ERROR)
1543 if (attrs & DMA_ATTR_NO_KERNEL_MAPPING)
1546 addr = __iommu_alloc_remap(pages, size, gfp, prot,
1547 __builtin_return_address(0));
1554 __iommu_remove_mapping(dev, *handle, size);
1556 __iommu_free_buffer(dev, pages, size, attrs);
1560 static void *arm_iommu_alloc_attrs(struct device *dev, size_t size,
1561 dma_addr_t *handle, gfp_t gfp, unsigned long attrs)
1563 return __arm_iommu_alloc_attrs(dev, size, handle, gfp, attrs, NORMAL);
1566 static void *arm_coherent_iommu_alloc_attrs(struct device *dev, size_t size,
1567 dma_addr_t *handle, gfp_t gfp, unsigned long attrs)
1569 return __arm_iommu_alloc_attrs(dev, size, handle, gfp, attrs, COHERENT);
1572 static int __arm_iommu_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
1573 void *cpu_addr, dma_addr_t dma_addr, size_t size,
1574 unsigned long attrs)
1576 struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1577 unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
1583 if (vma->vm_pgoff >= nr_pages)
1586 err = vm_map_pages(vma, pages, nr_pages);
1588 pr_err("Remapping memory failed: %d\n", err);
1592 static int arm_iommu_mmap_attrs(struct device *dev,
1593 struct vm_area_struct *vma, void *cpu_addr,
1594 dma_addr_t dma_addr, size_t size, unsigned long attrs)
1596 vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
1598 return __arm_iommu_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, attrs);
1601 static int arm_coherent_iommu_mmap_attrs(struct device *dev,
1602 struct vm_area_struct *vma, void *cpu_addr,
1603 dma_addr_t dma_addr, size_t size, unsigned long attrs)
1605 return __arm_iommu_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, attrs);
1609 * free a page as defined by the above mapping.
1610 * Must not be called with IRQs disabled.
1612 void __arm_iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr,
1613 dma_addr_t handle, unsigned long attrs, int coherent_flag)
1615 struct page **pages;
1616 size = PAGE_ALIGN(size);
1618 if (coherent_flag == COHERENT || __in_atomic_pool(cpu_addr, size)) {
1619 __iommu_free_atomic(dev, cpu_addr, handle, size, coherent_flag);
1623 pages = __iommu_get_pages(cpu_addr, attrs);
1625 WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr);
1629 if ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) == 0) {
1630 dma_common_free_remap(cpu_addr, size,
1631 VM_ARM_DMA_CONSISTENT | VM_USERMAP);
1634 __iommu_remove_mapping(dev, handle, size);
1635 __iommu_free_buffer(dev, pages, size, attrs);
1638 void arm_iommu_free_attrs(struct device *dev, size_t size,
1639 void *cpu_addr, dma_addr_t handle, unsigned long attrs)
1641 __arm_iommu_free_attrs(dev, size, cpu_addr, handle, attrs, NORMAL);
1644 void arm_coherent_iommu_free_attrs(struct device *dev, size_t size,
1645 void *cpu_addr, dma_addr_t handle, unsigned long attrs)
1647 __arm_iommu_free_attrs(dev, size, cpu_addr, handle, attrs, COHERENT);
1650 static int arm_iommu_get_sgtable(struct device *dev, struct sg_table *sgt,
1651 void *cpu_addr, dma_addr_t dma_addr,
1652 size_t size, unsigned long attrs)
1654 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1655 struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1660 return sg_alloc_table_from_pages(sgt, pages, count, 0, size,
1665 * Map a part of the scatter-gather list into contiguous io address space
1667 static int __map_sg_chunk(struct device *dev, struct scatterlist *sg,
1668 size_t size, dma_addr_t *handle,
1669 enum dma_data_direction dir, unsigned long attrs,
1672 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1673 dma_addr_t iova, iova_base;
1676 struct scatterlist *s;
1679 size = PAGE_ALIGN(size);
1680 *handle = DMA_MAPPING_ERROR;
1682 iova_base = iova = __alloc_iova(mapping, size);
1683 if (iova == DMA_MAPPING_ERROR)
1686 for (count = 0, s = sg; count < (size >> PAGE_SHIFT); s = sg_next(s)) {
1687 phys_addr_t phys = page_to_phys(sg_page(s));
1688 unsigned int len = PAGE_ALIGN(s->offset + s->length);
1690 if (!is_coherent && (attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
1691 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1693 prot = __dma_info_to_prot(dir, attrs);
1695 ret = iommu_map(mapping->domain, iova, phys, len, prot);
1698 count += len >> PAGE_SHIFT;
1701 *handle = iova_base;
1705 iommu_unmap(mapping->domain, iova_base, count * PAGE_SIZE);
1706 __free_iova(mapping, iova_base, size);
1710 static int __iommu_map_sg(struct device *dev, struct scatterlist *sg, int nents,
1711 enum dma_data_direction dir, unsigned long attrs,
1714 struct scatterlist *s = sg, *dma = sg, *start = sg;
1716 unsigned int offset = s->offset;
1717 unsigned int size = s->offset + s->length;
1718 unsigned int max = dma_get_max_seg_size(dev);
1720 for (i = 1; i < nents; i++) {
1723 s->dma_address = DMA_MAPPING_ERROR;
1726 if (s->offset || (size & ~PAGE_MASK) || size + s->length > max) {
1727 if (__map_sg_chunk(dev, start, size, &dma->dma_address,
1728 dir, attrs, is_coherent) < 0)
1731 dma->dma_address += offset;
1732 dma->dma_length = size - offset;
1734 size = offset = s->offset;
1741 if (__map_sg_chunk(dev, start, size, &dma->dma_address, dir, attrs,
1745 dma->dma_address += offset;
1746 dma->dma_length = size - offset;
1751 for_each_sg(sg, s, count, i)
1752 __iommu_remove_mapping(dev, sg_dma_address(s), sg_dma_len(s));
1757 * arm_coherent_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1758 * @dev: valid struct device pointer
1759 * @sg: list of buffers
1760 * @nents: number of buffers to map
1761 * @dir: DMA transfer direction
1763 * Map a set of i/o coherent buffers described by scatterlist in streaming
1764 * mode for DMA. The scatter gather list elements are merged together (if
1765 * possible) and tagged with the appropriate dma address and length. They are
1766 * obtained via sg_dma_{address,length}.
1768 int arm_coherent_iommu_map_sg(struct device *dev, struct scatterlist *sg,
1769 int nents, enum dma_data_direction dir, unsigned long attrs)
1771 return __iommu_map_sg(dev, sg, nents, dir, attrs, true);
1775 * arm_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1776 * @dev: valid struct device pointer
1777 * @sg: list of buffers
1778 * @nents: number of buffers to map
1779 * @dir: DMA transfer direction
1781 * Map a set of buffers described by scatterlist in streaming mode for DMA.
1782 * The scatter gather list elements are merged together (if possible) and
1783 * tagged with the appropriate dma address and length. They are obtained via
1784 * sg_dma_{address,length}.
1786 int arm_iommu_map_sg(struct device *dev, struct scatterlist *sg,
1787 int nents, enum dma_data_direction dir, unsigned long attrs)
1789 return __iommu_map_sg(dev, sg, nents, dir, attrs, false);
1792 static void __iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
1793 int nents, enum dma_data_direction dir,
1794 unsigned long attrs, bool is_coherent)
1796 struct scatterlist *s;
1799 for_each_sg(sg, s, nents, i) {
1801 __iommu_remove_mapping(dev, sg_dma_address(s),
1803 if (!is_coherent && (attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
1804 __dma_page_dev_to_cpu(sg_page(s), s->offset,
1810 * arm_coherent_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1811 * @dev: valid struct device pointer
1812 * @sg: list of buffers
1813 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1814 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1816 * Unmap a set of streaming mode DMA translations. Again, CPU access
1817 * rules concerning calls here are the same as for dma_unmap_single().
1819 void arm_coherent_iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
1820 int nents, enum dma_data_direction dir,
1821 unsigned long attrs)
1823 __iommu_unmap_sg(dev, sg, nents, dir, attrs, true);
1827 * arm_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1828 * @dev: valid struct device pointer
1829 * @sg: list of buffers
1830 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1831 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1833 * Unmap a set of streaming mode DMA translations. Again, CPU access
1834 * rules concerning calls here are the same as for dma_unmap_single().
1836 void arm_iommu_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
1837 enum dma_data_direction dir,
1838 unsigned long attrs)
1840 __iommu_unmap_sg(dev, sg, nents, dir, attrs, false);
1844 * arm_iommu_sync_sg_for_cpu
1845 * @dev: valid struct device pointer
1846 * @sg: list of buffers
1847 * @nents: number of buffers to map (returned from dma_map_sg)
1848 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1850 void arm_iommu_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
1851 int nents, enum dma_data_direction dir)
1853 struct scatterlist *s;
1856 for_each_sg(sg, s, nents, i)
1857 __dma_page_dev_to_cpu(sg_page(s), s->offset, s->length, dir);
1862 * arm_iommu_sync_sg_for_device
1863 * @dev: valid struct device pointer
1864 * @sg: list of buffers
1865 * @nents: number of buffers to map (returned from dma_map_sg)
1866 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1868 void arm_iommu_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
1869 int nents, enum dma_data_direction dir)
1871 struct scatterlist *s;
1874 for_each_sg(sg, s, nents, i)
1875 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1880 * arm_coherent_iommu_map_page
1881 * @dev: valid struct device pointer
1882 * @page: page that buffer resides in
1883 * @offset: offset into page for start of buffer
1884 * @size: size of buffer to map
1885 * @dir: DMA transfer direction
1887 * Coherent IOMMU aware version of arm_dma_map_page()
1889 static dma_addr_t arm_coherent_iommu_map_page(struct device *dev, struct page *page,
1890 unsigned long offset, size_t size, enum dma_data_direction dir,
1891 unsigned long attrs)
1893 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1894 dma_addr_t dma_addr;
1895 int ret, prot, len = PAGE_ALIGN(size + offset);
1897 dma_addr = __alloc_iova(mapping, len);
1898 if (dma_addr == DMA_MAPPING_ERROR)
1901 prot = __dma_info_to_prot(dir, attrs);
1903 ret = iommu_map(mapping->domain, dma_addr, page_to_phys(page), len, prot);
1907 return dma_addr + offset;
1909 __free_iova(mapping, dma_addr, len);
1910 return DMA_MAPPING_ERROR;
1914 * arm_iommu_map_page
1915 * @dev: valid struct device pointer
1916 * @page: page that buffer resides in
1917 * @offset: offset into page for start of buffer
1918 * @size: size of buffer to map
1919 * @dir: DMA transfer direction
1921 * IOMMU aware version of arm_dma_map_page()
1923 static dma_addr_t arm_iommu_map_page(struct device *dev, struct page *page,
1924 unsigned long offset, size_t size, enum dma_data_direction dir,
1925 unsigned long attrs)
1927 if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
1928 __dma_page_cpu_to_dev(page, offset, size, dir);
1930 return arm_coherent_iommu_map_page(dev, page, offset, size, dir, attrs);
1934 * arm_coherent_iommu_unmap_page
1935 * @dev: valid struct device pointer
1936 * @handle: DMA address of buffer
1937 * @size: size of buffer (same as passed to dma_map_page)
1938 * @dir: DMA transfer direction (same as passed to dma_map_page)
1940 * Coherent IOMMU aware version of arm_dma_unmap_page()
1942 static void arm_coherent_iommu_unmap_page(struct device *dev, dma_addr_t handle,
1943 size_t size, enum dma_data_direction dir, unsigned long attrs)
1945 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1946 dma_addr_t iova = handle & PAGE_MASK;
1947 int offset = handle & ~PAGE_MASK;
1948 int len = PAGE_ALIGN(size + offset);
1953 iommu_unmap(mapping->domain, iova, len);
1954 __free_iova(mapping, iova, len);
1958 * arm_iommu_unmap_page
1959 * @dev: valid struct device pointer
1960 * @handle: DMA address of buffer
1961 * @size: size of buffer (same as passed to dma_map_page)
1962 * @dir: DMA transfer direction (same as passed to dma_map_page)
1964 * IOMMU aware version of arm_dma_unmap_page()
1966 static void arm_iommu_unmap_page(struct device *dev, dma_addr_t handle,
1967 size_t size, enum dma_data_direction dir, unsigned long attrs)
1969 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1970 dma_addr_t iova = handle & PAGE_MASK;
1971 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1972 int offset = handle & ~PAGE_MASK;
1973 int len = PAGE_ALIGN(size + offset);
1978 if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
1979 __dma_page_dev_to_cpu(page, offset, size, dir);
1981 iommu_unmap(mapping->domain, iova, len);
1982 __free_iova(mapping, iova, len);
1986 * arm_iommu_map_resource - map a device resource for DMA
1987 * @dev: valid struct device pointer
1988 * @phys_addr: physical address of resource
1989 * @size: size of resource to map
1990 * @dir: DMA transfer direction
1992 static dma_addr_t arm_iommu_map_resource(struct device *dev,
1993 phys_addr_t phys_addr, size_t size,
1994 enum dma_data_direction dir, unsigned long attrs)
1996 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1997 dma_addr_t dma_addr;
1999 phys_addr_t addr = phys_addr & PAGE_MASK;
2000 unsigned int offset = phys_addr & ~PAGE_MASK;
2001 size_t len = PAGE_ALIGN(size + offset);
2003 dma_addr = __alloc_iova(mapping, len);
2004 if (dma_addr == DMA_MAPPING_ERROR)
2007 prot = __dma_info_to_prot(dir, attrs) | IOMMU_MMIO;
2009 ret = iommu_map(mapping->domain, dma_addr, addr, len, prot);
2013 return dma_addr + offset;
2015 __free_iova(mapping, dma_addr, len);
2016 return DMA_MAPPING_ERROR;
2020 * arm_iommu_unmap_resource - unmap a device DMA resource
2021 * @dev: valid struct device pointer
2022 * @dma_handle: DMA address to resource
2023 * @size: size of resource to map
2024 * @dir: DMA transfer direction
2026 static void arm_iommu_unmap_resource(struct device *dev, dma_addr_t dma_handle,
2027 size_t size, enum dma_data_direction dir,
2028 unsigned long attrs)
2030 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2031 dma_addr_t iova = dma_handle & PAGE_MASK;
2032 unsigned int offset = dma_handle & ~PAGE_MASK;
2033 size_t len = PAGE_ALIGN(size + offset);
2038 iommu_unmap(mapping->domain, iova, len);
2039 __free_iova(mapping, iova, len);
2042 static void arm_iommu_sync_single_for_cpu(struct device *dev,
2043 dma_addr_t handle, size_t size, enum dma_data_direction dir)
2045 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2046 dma_addr_t iova = handle & PAGE_MASK;
2047 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
2048 unsigned int offset = handle & ~PAGE_MASK;
2053 __dma_page_dev_to_cpu(page, offset, size, dir);
2056 static void arm_iommu_sync_single_for_device(struct device *dev,
2057 dma_addr_t handle, size_t size, enum dma_data_direction dir)
2059 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2060 dma_addr_t iova = handle & PAGE_MASK;
2061 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
2062 unsigned int offset = handle & ~PAGE_MASK;
2067 __dma_page_cpu_to_dev(page, offset, size, dir);
2070 const struct dma_map_ops iommu_ops = {
2071 .alloc = arm_iommu_alloc_attrs,
2072 .free = arm_iommu_free_attrs,
2073 .mmap = arm_iommu_mmap_attrs,
2074 .get_sgtable = arm_iommu_get_sgtable,
2076 .map_page = arm_iommu_map_page,
2077 .unmap_page = arm_iommu_unmap_page,
2078 .sync_single_for_cpu = arm_iommu_sync_single_for_cpu,
2079 .sync_single_for_device = arm_iommu_sync_single_for_device,
2081 .map_sg = arm_iommu_map_sg,
2082 .unmap_sg = arm_iommu_unmap_sg,
2083 .sync_sg_for_cpu = arm_iommu_sync_sg_for_cpu,
2084 .sync_sg_for_device = arm_iommu_sync_sg_for_device,
2086 .map_resource = arm_iommu_map_resource,
2087 .unmap_resource = arm_iommu_unmap_resource,
2089 .dma_supported = arm_dma_supported,
2092 const struct dma_map_ops iommu_coherent_ops = {
2093 .alloc = arm_coherent_iommu_alloc_attrs,
2094 .free = arm_coherent_iommu_free_attrs,
2095 .mmap = arm_coherent_iommu_mmap_attrs,
2096 .get_sgtable = arm_iommu_get_sgtable,
2098 .map_page = arm_coherent_iommu_map_page,
2099 .unmap_page = arm_coherent_iommu_unmap_page,
2101 .map_sg = arm_coherent_iommu_map_sg,
2102 .unmap_sg = arm_coherent_iommu_unmap_sg,
2104 .map_resource = arm_iommu_map_resource,
2105 .unmap_resource = arm_iommu_unmap_resource,
2107 .dma_supported = arm_dma_supported,
2111 * arm_iommu_create_mapping
2112 * @bus: pointer to the bus holding the client device (for IOMMU calls)
2113 * @base: start address of the valid IO address space
2114 * @size: maximum size of the valid IO address space
2116 * Creates a mapping structure which holds information about used/unused
2117 * IO address ranges, which is required to perform memory allocation and
2118 * mapping with IOMMU aware functions.
2120 * The client device need to be attached to the mapping with
2121 * arm_iommu_attach_device function.
2123 struct dma_iommu_mapping *
2124 arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, u64 size)
2126 unsigned int bits = size >> PAGE_SHIFT;
2127 unsigned int bitmap_size = BITS_TO_LONGS(bits) * sizeof(long);
2128 struct dma_iommu_mapping *mapping;
2132 /* currently only 32-bit DMA address space is supported */
2133 if (size > DMA_BIT_MASK(32) + 1)
2134 return ERR_PTR(-ERANGE);
2137 return ERR_PTR(-EINVAL);
2139 if (bitmap_size > PAGE_SIZE) {
2140 extensions = bitmap_size / PAGE_SIZE;
2141 bitmap_size = PAGE_SIZE;
2144 mapping = kzalloc(sizeof(struct dma_iommu_mapping), GFP_KERNEL);
2148 mapping->bitmap_size = bitmap_size;
2149 mapping->bitmaps = kcalloc(extensions, sizeof(unsigned long *),
2151 if (!mapping->bitmaps)
2154 mapping->bitmaps[0] = kzalloc(bitmap_size, GFP_KERNEL);
2155 if (!mapping->bitmaps[0])
2158 mapping->nr_bitmaps = 1;
2159 mapping->extensions = extensions;
2160 mapping->base = base;
2161 mapping->bits = BITS_PER_BYTE * bitmap_size;
2163 spin_lock_init(&mapping->lock);
2165 mapping->domain = iommu_domain_alloc(bus);
2166 if (!mapping->domain)
2169 kref_init(&mapping->kref);
2172 kfree(mapping->bitmaps[0]);
2174 kfree(mapping->bitmaps);
2178 return ERR_PTR(err);
2180 EXPORT_SYMBOL_GPL(arm_iommu_create_mapping);
2182 static void release_iommu_mapping(struct kref *kref)
2185 struct dma_iommu_mapping *mapping =
2186 container_of(kref, struct dma_iommu_mapping, kref);
2188 iommu_domain_free(mapping->domain);
2189 for (i = 0; i < mapping->nr_bitmaps; i++)
2190 kfree(mapping->bitmaps[i]);
2191 kfree(mapping->bitmaps);
2195 static int extend_iommu_mapping(struct dma_iommu_mapping *mapping)
2199 if (mapping->nr_bitmaps >= mapping->extensions)
2202 next_bitmap = mapping->nr_bitmaps;
2203 mapping->bitmaps[next_bitmap] = kzalloc(mapping->bitmap_size,
2205 if (!mapping->bitmaps[next_bitmap])
2208 mapping->nr_bitmaps++;
2213 void arm_iommu_release_mapping(struct dma_iommu_mapping *mapping)
2216 kref_put(&mapping->kref, release_iommu_mapping);
2218 EXPORT_SYMBOL_GPL(arm_iommu_release_mapping);
2220 static int __arm_iommu_attach_device(struct device *dev,
2221 struct dma_iommu_mapping *mapping)
2225 err = iommu_attach_device(mapping->domain, dev);
2229 kref_get(&mapping->kref);
2230 to_dma_iommu_mapping(dev) = mapping;
2232 pr_debug("Attached IOMMU controller to %s device.\n", dev_name(dev));
2237 * arm_iommu_attach_device
2238 * @dev: valid struct device pointer
2239 * @mapping: io address space mapping structure (returned from
2240 * arm_iommu_create_mapping)
2242 * Attaches specified io address space mapping to the provided device.
2243 * This replaces the dma operations (dma_map_ops pointer) with the
2244 * IOMMU aware version.
2246 * More than one client might be attached to the same io address space
2249 int arm_iommu_attach_device(struct device *dev,
2250 struct dma_iommu_mapping *mapping)
2254 err = __arm_iommu_attach_device(dev, mapping);
2258 set_dma_ops(dev, &iommu_ops);
2261 EXPORT_SYMBOL_GPL(arm_iommu_attach_device);
2264 * arm_iommu_detach_device
2265 * @dev: valid struct device pointer
2267 * Detaches the provided device from a previously attached map.
2268 * This overwrites the dma_ops pointer with appropriate non-IOMMU ops.
2270 void arm_iommu_detach_device(struct device *dev)
2272 struct dma_iommu_mapping *mapping;
2274 mapping = to_dma_iommu_mapping(dev);
2276 dev_warn(dev, "Not attached\n");
2280 iommu_detach_device(mapping->domain, dev);
2281 kref_put(&mapping->kref, release_iommu_mapping);
2282 to_dma_iommu_mapping(dev) = NULL;
2283 set_dma_ops(dev, arm_get_dma_map_ops(dev->archdata.dma_coherent));
2285 pr_debug("Detached IOMMU controller from %s device.\n", dev_name(dev));
2287 EXPORT_SYMBOL_GPL(arm_iommu_detach_device);
2289 static const struct dma_map_ops *arm_get_iommu_dma_map_ops(bool coherent)
2291 return coherent ? &iommu_coherent_ops : &iommu_ops;
2294 static bool arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size,
2295 const struct iommu_ops *iommu)
2297 struct dma_iommu_mapping *mapping;
2302 mapping = arm_iommu_create_mapping(dev->bus, dma_base, size);
2303 if (IS_ERR(mapping)) {
2304 pr_warn("Failed to create %llu-byte IOMMU mapping for device %s\n",
2305 size, dev_name(dev));
2309 if (__arm_iommu_attach_device(dev, mapping)) {
2310 pr_warn("Failed to attached device %s to IOMMU_mapping\n",
2312 arm_iommu_release_mapping(mapping);
2319 static void arm_teardown_iommu_dma_ops(struct device *dev)
2321 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2326 arm_iommu_detach_device(dev);
2327 arm_iommu_release_mapping(mapping);
2332 static bool arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size,
2333 const struct iommu_ops *iommu)
2338 static void arm_teardown_iommu_dma_ops(struct device *dev) { }
2340 #define arm_get_iommu_dma_map_ops arm_get_dma_map_ops
2342 #endif /* CONFIG_ARM_DMA_USE_IOMMU */
2344 void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
2345 const struct iommu_ops *iommu, bool coherent)
2347 const struct dma_map_ops *dma_ops;
2349 dev->archdata.dma_coherent = coherent;
2352 * Don't override the dma_ops if they have already been set. Ideally
2353 * this should be the only location where dma_ops are set, remove this
2354 * check when all other callers of set_dma_ops will have disappeared.
2359 if (arm_setup_iommu_dma_ops(dev, dma_base, size, iommu))
2360 dma_ops = arm_get_iommu_dma_map_ops(coherent);
2362 dma_ops = arm_get_dma_map_ops(coherent);
2364 set_dma_ops(dev, dma_ops);
2367 if (xen_initial_domain()) {
2368 dev->archdata.dev_dma_ops = dev->dma_ops;
2369 dev->dma_ops = xen_dma_ops;
2372 dev->archdata.dma_ops_setup = true;
2375 void arch_teardown_dma_ops(struct device *dev)
2377 if (!dev->archdata.dma_ops_setup)
2380 arm_teardown_iommu_dma_ops(dev);
2381 /* Let arch_setup_dma_ops() start again from scratch upon re-probe */
2382 set_dma_ops(dev, NULL);