2 * arch/arm/mach-spear6xx/spear6xx.c
4 * SPEAr6XX machines common source file
6 * Copyright (C) 2009 ST Microelectronics
7 * Rajeev Kumar<rajeev-dlh.kumar@st.com>
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
14 #include <linux/types.h>
15 #include <linux/amba/pl061.h>
16 #include <linux/ptrace.h>
18 #include <asm/hardware/vic.h>
20 #include <asm/mach/arch.h>
21 #include <mach/generic.h>
22 #include <mach/hardware.h>
23 #include <mach/irqs.h>
25 /* Add spear6xx machines common devices here */
26 /* uart device registration */
27 struct amba_device uart_device[] = {
33 .start = SPEAR6XX_ICM1_UART0_BASE,
34 .end = SPEAR6XX_ICM1_UART0_BASE + SZ_4K - 1,
35 .flags = IORESOURCE_MEM,
37 .irq = {IRQ_UART_0, NO_IRQ},
43 .start = SPEAR6XX_ICM1_UART1_BASE,
44 .end = SPEAR6XX_ICM1_UART1_BASE + SZ_4K - 1,
45 .flags = IORESOURCE_MEM,
47 .irq = {IRQ_UART_1, NO_IRQ},
51 /* gpio device registration */
52 static struct pl061_platform_data gpio_plat_data[] = {
55 .irq_base = SPEAR_GPIO0_INT_BASE,
58 .irq_base = SPEAR_GPIO1_INT_BASE,
61 .irq_base = SPEAR_GPIO2_INT_BASE,
65 struct amba_device gpio_device[] = {
69 .platform_data = &gpio_plat_data[0],
72 .start = SPEAR6XX_CPU_GPIO_BASE,
73 .end = SPEAR6XX_CPU_GPIO_BASE + SZ_4K - 1,
74 .flags = IORESOURCE_MEM,
76 .irq = {IRQ_LOCAL_GPIO, NO_IRQ},
80 .platform_data = &gpio_plat_data[1],
83 .start = SPEAR6XX_ICM3_GPIO_BASE,
84 .end = SPEAR6XX_ICM3_GPIO_BASE + SZ_4K - 1,
85 .flags = IORESOURCE_MEM,
87 .irq = {IRQ_BASIC_GPIO, NO_IRQ},
91 .platform_data = &gpio_plat_data[2],
94 .start = SPEAR6XX_ICM2_GPIO_BASE,
95 .end = SPEAR6XX_ICM2_GPIO_BASE + SZ_4K - 1,
96 .flags = IORESOURCE_MEM,
98 .irq = {IRQ_APPL_GPIO, NO_IRQ},
102 /* This will add devices, and do machine specific tasks */
103 void __init spear6xx_init(void)
105 /* nothing to do for now */
108 /* This will initialize vic */
109 void __init spear6xx_init_irq(void)
111 vic_init((void __iomem *)VA_SPEAR6XX_CPU_VIC_PRI_BASE, 0, ~0, 0);
112 vic_init((void __iomem *)VA_SPEAR6XX_CPU_VIC_SEC_BASE, 32, ~0, 0);
115 /* Following will create static virtual/physical mappings */
116 static struct map_desc spear6xx_io_desc[] __initdata = {
118 .virtual = VA_SPEAR6XX_ICM1_UART0_BASE,
119 .pfn = __phys_to_pfn(SPEAR6XX_ICM1_UART0_BASE),
123 .virtual = VA_SPEAR6XX_CPU_VIC_PRI_BASE,
124 .pfn = __phys_to_pfn(SPEAR6XX_CPU_VIC_PRI_BASE),
128 .virtual = VA_SPEAR6XX_CPU_VIC_SEC_BASE,
129 .pfn = __phys_to_pfn(SPEAR6XX_CPU_VIC_SEC_BASE),
133 .virtual = VA_SPEAR6XX_ICM3_SYS_CTRL_BASE,
134 .pfn = __phys_to_pfn(SPEAR6XX_ICM3_SYS_CTRL_BASE),
138 .virtual = VA_SPEAR6XX_ICM3_MISC_REG_BASE,
139 .pfn = __phys_to_pfn(SPEAR6XX_ICM3_MISC_REG_BASE),
145 /* This will create static memory mapping for selected devices */
146 void __init spear6xx_map_io(void)
148 iotable_init(spear6xx_io_desc, ARRAY_SIZE(spear6xx_io_desc));
150 /* This will initialize clock framework */
154 static void __init spear6xx_timer_init(void)
156 char pclk_name[] = "pll3_48m_clk";
157 struct clk *gpt_clk, *pclk;
159 /* get the system timer clock */
160 gpt_clk = clk_get_sys("gpt0", NULL);
161 if (IS_ERR(gpt_clk)) {
162 pr_err("%s:couldn't get clk for gpt\n", __func__);
166 /* get the suitable parent clock for timer*/
167 pclk = clk_get(NULL, pclk_name);
169 pr_err("%s:couldn't get %s as parent for gpt\n",
170 __func__, pclk_name);
174 clk_set_parent(gpt_clk, pclk);
181 struct sys_timer spear6xx_timer = {
182 .init = spear6xx_timer_init,