arch/arm/mach-shmobile/setup-r8a7740.c

   1 /*
   2  * R8A7740 processor support
   3  *
   4  * Copyright (C) 2011  Renesas Solutions Corp.
   5  * Copyright (C) 2011  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; version 2 of the License.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  19  */
  20 #include <linux/delay.h>
  21 #include <linux/kernel.h>
  22 #include <linux/init.h>
  23 #include <linux/io.h>
  24 #include <linux/platform_device.h>
  25 #include <linux/serial_sci.h>
  26 #include <linux/sh_timer.h>
  27 #include <mach/r8a7740.h>
  28 #include <mach/common.h>
  29 #include <asm/mach-types.h>
  30 #include <asm/mach/map.h>
  31 #include <asm/mach/arch.h>
  32 #include <asm/mach/time.h>
  33
  34 static struct map_desc r8a7740_io_desc[] __initdata = {
  35          /*
  36           * for CPGA/INTC/PFC
  37           * 0xe6000000-0xefffffff -> 0xe6000000-0xefffffff
  38           */
  39         {
  40                 .virtual        = 0xe6000000,
  41                 .pfn            = __phys_to_pfn(0xe6000000),
  42                 .length         = 160 << 20,
  43                 .type           = MT_DEVICE_NONSHARED
  44         },
  45 #ifdef CONFIG_CACHE_L2X0
  46         /*
  47          * for l2x0_init()
  48          * 0xf0100000-0xf0101000 -> 0xf0002000-0xf0003000
  49          */
  50         {
  51                 .virtual        = 0xf0002000,
  52                 .pfn            = __phys_to_pfn(0xf0100000),
  53                 .length         = PAGE_SIZE,
  54                 .type           = MT_DEVICE_NONSHARED
  55         },
  56 #endif
  57 };
  58
  59 void __init r8a7740_map_io(void)
  60 {
  61         iotable_init(r8a7740_io_desc, ARRAY_SIZE(r8a7740_io_desc));
  62 }
  63
  64 /* SCIFA0 */
  65 static struct plat_sci_port scif0_platform_data = {
  66         .mapbase        = 0xe6c40000,
  67         .flags          = UPF_BOOT_AUTOCONF,
  68         .scscr          = SCSCR_RE | SCSCR_TE,
  69         .scbrr_algo_id  = SCBRR_ALGO_4,
  70         .type           = PORT_SCIFA,
  71         .irqs           = SCIx_IRQ_MUXED(evt2irq(0x0c00)),
  72 };
  73
  74 static struct platform_device scif0_device = {
  75         .name           = "sh-sci",
  76         .id             = 0,
  77         .dev            = {
  78                 .platform_data  = &scif0_platform_data,
  79         },
  80 };
  81
  82 /* SCIFA1 */
  83 static struct plat_sci_port scif1_platform_data = {
  84         .mapbase        = 0xe6c50000,
  85         .flags          = UPF_BOOT_AUTOCONF,
  86         .scscr          = SCSCR_RE | SCSCR_TE,
  87         .scbrr_algo_id  = SCBRR_ALGO_4,
  88         .type           = PORT_SCIFA,
  89         .irqs           = SCIx_IRQ_MUXED(evt2irq(0x0c20)),
  90 };
  91
  92 static struct platform_device scif1_device = {
  93         .name           = "sh-sci",
  94         .id             = 1,
  95         .dev            = {
  96                 .platform_data  = &scif1_platform_data,
  97         },
  98 };
  99
 100 /* SCIFA2 */
 101 static struct plat_sci_port scif2_platform_data = {
 102         .mapbase        = 0xe6c60000,
 103         .flags          = UPF_BOOT_AUTOCONF,
 104         .scscr          = SCSCR_RE | SCSCR_TE,
 105         .scbrr_algo_id  = SCBRR_ALGO_4,
 106         .type           = PORT_SCIFA,
 107         .irqs           = SCIx_IRQ_MUXED(evt2irq(0x0c40)),
 108 };
 109
 110 static struct platform_device scif2_device = {
 111         .name           = "sh-sci",
 112         .id             = 2,
 113         .dev            = {
 114                 .platform_data  = &scif2_platform_data,
 115         },
 116 };
 117
 118 /* SCIFA3 */
 119 static struct plat_sci_port scif3_platform_data = {
 120         .mapbase        = 0xe6c70000,
 121         .flags          = UPF_BOOT_AUTOCONF,
 122         .scscr          = SCSCR_RE | SCSCR_TE,
 123         .scbrr_algo_id  = SCBRR_ALGO_4,
 124         .type           = PORT_SCIFA,
 125         .irqs           = SCIx_IRQ_MUXED(evt2irq(0x0c60)),
 126 };
 127
 128 static struct platform_device scif3_device = {
 129         .name           = "sh-sci",
 130         .id             = 3,
 131         .dev            = {
 132                 .platform_data  = &scif3_platform_data,
 133         },
 134 };
 135
 136 /* SCIFA4 */
 137 static struct plat_sci_port scif4_platform_data = {
 138         .mapbase        = 0xe6c80000,
 139         .flags          = UPF_BOOT_AUTOCONF,
 140         .scscr          = SCSCR_RE | SCSCR_TE,
 141         .scbrr_algo_id  = SCBRR_ALGO_4,
 142         .type           = PORT_SCIFA,
 143         .irqs           = SCIx_IRQ_MUXED(evt2irq(0x0d20)),
 144 };
 145
 146 static struct platform_device scif4_device = {
 147         .name           = "sh-sci",
 148         .id             = 4,
 149         .dev            = {
 150                 .platform_data  = &scif4_platform_data,
 151         },
 152 };
 153
 154 /* SCIFA5 */
 155 static struct plat_sci_port scif5_platform_data = {
 156         .mapbase        = 0xe6cb0000,
 157         .flags          = UPF_BOOT_AUTOCONF,
 158         .scscr          = SCSCR_RE | SCSCR_TE,
 159         .scbrr_algo_id  = SCBRR_ALGO_4,
 160         .type           = PORT_SCIFA,
 161         .irqs           = SCIx_IRQ_MUXED(evt2irq(0x0d40)),
 162 };
 163
 164 static struct platform_device scif5_device = {
 165         .name           = "sh-sci",
 166         .id             = 5,
 167         .dev            = {
 168                 .platform_data  = &scif5_platform_data,
 169         },
 170 };
 171
 172 /* SCIFA6 */
 173 static struct plat_sci_port scif6_platform_data = {
 174         .mapbase        = 0xe6cc0000,
 175         .flags          = UPF_BOOT_AUTOCONF,
 176         .scscr          = SCSCR_RE | SCSCR_TE,
 177         .scbrr_algo_id  = SCBRR_ALGO_4,
 178         .type           = PORT_SCIFA,
 179         .irqs           = SCIx_IRQ_MUXED(evt2irq(0x04c0)),
 180 };
 181
 182 static struct platform_device scif6_device = {
 183         .name           = "sh-sci",
 184         .id             = 6,
 185         .dev            = {
 186                 .platform_data  = &scif6_platform_data,
 187         },
 188 };
 189
 190 /* SCIFA7 */
 191 static struct plat_sci_port scif7_platform_data = {
 192         .mapbase        = 0xe6cd0000,
 193         .flags          = UPF_BOOT_AUTOCONF,
 194         .scscr          = SCSCR_RE | SCSCR_TE,
 195         .scbrr_algo_id  = SCBRR_ALGO_4,
 196         .type           = PORT_SCIFA,
 197         .irqs           = SCIx_IRQ_MUXED(evt2irq(0x04e0)),
 198 };
 199
 200 static struct platform_device scif7_device = {
 201         .name           = "sh-sci",
 202         .id             = 7,
 203         .dev            = {
 204                 .platform_data  = &scif7_platform_data,
 205         },
 206 };
 207
 208 /* SCIFB */
 209 static struct plat_sci_port scifb_platform_data = {
 210         .mapbase        = 0xe6c30000,
 211         .flags          = UPF_BOOT_AUTOCONF,
 212         .scscr          = SCSCR_RE | SCSCR_TE,
 213         .scbrr_algo_id  = SCBRR_ALGO_4,
 214         .type           = PORT_SCIFB,
 215         .irqs           = SCIx_IRQ_MUXED(evt2irq(0x0d60)),
 216 };
 217
 218 static struct platform_device scifb_device = {
 219         .name           = "sh-sci",
 220         .id             = 8,
 221         .dev            = {
 222                 .platform_data  = &scifb_platform_data,
 223         },
 224 };
 225
 226 /* CMT */
 227 static struct sh_timer_config cmt10_platform_data = {
 228         .name = "CMT10",
 229         .channel_offset = 0x10,
 230         .timer_bit = 0,
 231         .clockevent_rating = 125,
 232         .clocksource_rating = 125,
 233 };
 234
 235 static struct resource cmt10_resources[] = {
 236         [0] = {
 237                 .name   = "CMT10",
 238                 .start  = 0xe6138010,
 239                 .end    = 0xe613801b,
 240                 .flags  = IORESOURCE_MEM,
 241         },
 242         [1] = {
 243                 .start  = evt2irq(0x0b00),
 244                 .flags  = IORESOURCE_IRQ,
 245         },
 246 };
 247
 248 static struct platform_device cmt10_device = {
 249         .name           = "sh_cmt",
 250         .id             = 10,
 251         .dev = {
 252                 .platform_data  = &cmt10_platform_data,
 253         },
 254         .resource       = cmt10_resources,
 255         .num_resources  = ARRAY_SIZE(cmt10_resources),
 256 };
 257
 258 static struct platform_device *r8a7740_early_devices[] __initdata = {
 259         &scif0_device,
 260         &scif1_device,
 261         &scif2_device,
 262         &scif3_device,
 263         &scif4_device,
 264         &scif5_device,
 265         &scif6_device,
 266         &scif7_device,
 267         &scifb_device,
 268         &cmt10_device,
 269 };
 270
 271 /* I2C */
 272 static struct resource i2c0_resources[] = {
 273         [0] = {
 274                 .name   = "IIC0",
 275                 .start  = 0xfff20000,
 276                 .end    = 0xfff20425 - 1,
 277                 .flags  = IORESOURCE_MEM,
 278         },
 279         [1] = {
 280                 .start  = intcs_evt2irq(0xe00),
 281                 .end    = intcs_evt2irq(0xe60),
 282                 .flags  = IORESOURCE_IRQ,
 283         },
 284 };
 285
 286 static struct resource i2c1_resources[] = {
 287         [0] = {
 288                 .name   = "IIC1",
 289                 .start  = 0xe6c20000,
 290                 .end    = 0xe6c20425 - 1,
 291                 .flags  = IORESOURCE_MEM,
 292         },
 293         [1] = {
 294                 .start  = evt2irq(0x780), /* IIC1_ALI1 */
 295                 .end    = evt2irq(0x7e0), /* IIC1_DTEI1 */
 296                 .flags  = IORESOURCE_IRQ,
 297         },
 298 };
 299
 300 static struct platform_device i2c0_device = {
 301         .name           = "i2c-sh_mobile",
 302         .id             = 0,
 303         .resource       = i2c0_resources,
 304         .num_resources  = ARRAY_SIZE(i2c0_resources),
 305 };
 306
 307 static struct platform_device i2c1_device = {
 308         .name           = "i2c-sh_mobile",
 309         .id             = 1,
 310         .resource       = i2c1_resources,
 311         .num_resources  = ARRAY_SIZE(i2c1_resources),
 312 };
 313
 314 static struct platform_device *r8a7740_late_devices[] __initdata = {
 315         &i2c0_device,
 316         &i2c1_device,
 317 };
 318
 319 #define ICCR    0x0004
 320 #define ICSTART 0x0070
 321
 322 #define i2c_read(reg, offset)           ioread8(reg + offset)
 323 #define i2c_write(reg, offset, data)    iowrite8(data, reg + offset)
 324
 325 /*
 326  * r8a7740 chip has lasting errata on I2C I/O pad reset.
 327  * this is work-around for it.
 328  */
 329 static void r8a7740_i2c_workaround(struct platform_device *pdev)
 330 {
 331         struct resource *res;
 332         void __iomem *reg;
 333
 334         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 335         if (unlikely(!res)) {
 336                 pr_err("r8a7740 i2c workaround fail (cannot find resource)\n");
 337                 return;
 338         }
 339
 340         reg = ioremap(res->start, resource_size(res));
 341         if (unlikely(!reg)) {
 342                 pr_err("r8a7740 i2c workaround fail (cannot map IO)\n");
 343                 return;
 344         }
 345
 346         i2c_write(reg, ICCR, i2c_read(reg, ICCR) | 0x80);
 347         i2c_read(reg, ICCR); /* dummy read */
 348
 349         i2c_write(reg, ICSTART, i2c_read(reg, ICSTART) | 0x10);
 350         i2c_read(reg, ICSTART); /* dummy read */
 351
 352         mdelay(100);
 353
 354         i2c_write(reg, ICCR, 0x01);
 355         i2c_read(reg, ICCR);
 356         i2c_write(reg, ICSTART, 0x00);
 357         i2c_read(reg, ICSTART);
 358
 359         i2c_write(reg, ICCR, 0x10);
 360         mdelay(100);
 361         i2c_write(reg, ICCR, 0x00);
 362         mdelay(100);
 363         i2c_write(reg, ICCR, 0x10);
 364         mdelay(100);
 365
 366         iounmap(reg);
 367 }
 368
 369 void __init r8a7740_add_standard_devices(void)
 370 {
 371         /* I2C work-around */
 372         r8a7740_i2c_workaround(&i2c0_device);
 373         r8a7740_i2c_workaround(&i2c1_device);
 374
 375         platform_add_devices(r8a7740_early_devices,
 376                             ARRAY_SIZE(r8a7740_early_devices));
 377         platform_add_devices(r8a7740_late_devices,
 378                              ARRAY_SIZE(r8a7740_late_devices));
 379 }
 380
 381 static void __init r8a7740_earlytimer_init(void)
 382 {
 383         r8a7740_clock_init(0);
 384         shmobile_earlytimer_init();
 385 }
 386
 387 void __init r8a7740_add_early_devices(void)
 388 {
 389         early_platform_add_devices(r8a7740_early_devices,
 390                                    ARRAY_SIZE(r8a7740_early_devices));
 391
 392         /* setup early console here as well */
 393         shmobile_setup_console();
 394
 395         /* override timer setup with soc-specific code */
 396         shmobile_timer.init = r8a7740_earlytimer_init;
 397 }