2 * R8A7740 processor support
4 * Copyright (C) 2011 Renesas Solutions Corp.
5 * Copyright (C) 2011 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 #include <linux/delay.h>
21 #include <linux/dma-mapping.h>
22 #include <linux/kernel.h>
23 #include <linux/init.h>
25 #include <linux/platform_device.h>
26 #include <linux/of_platform.h>
27 #include <linux/serial_sci.h>
28 #include <linux/sh_dma.h>
29 #include <linux/sh_timer.h>
30 #include <linux/platform_data/sh_ipmmu.h>
31 #include <mach/dma-register.h>
32 #include <mach/r8a7740.h>
33 #include <mach/pm-rmobile.h>
34 #include <mach/common.h>
35 #include <mach/irqs.h>
36 #include <asm/mach-types.h>
37 #include <asm/mach/map.h>
38 #include <asm/mach/arch.h>
39 #include <asm/mach/time.h>
41 static struct map_desc r8a7740_io_desc[] __initdata = {
44 * 0xe6000000-0xefffffff -> 0xe6000000-0xefffffff
47 .virtual = 0xe6000000,
48 .pfn = __phys_to_pfn(0xe6000000),
50 .type = MT_DEVICE_NONSHARED
52 #ifdef CONFIG_CACHE_L2X0
55 * 0xf0100000-0xf0101000 -> 0xf0002000-0xf0003000
58 .virtual = 0xf0002000,
59 .pfn = __phys_to_pfn(0xf0100000),
61 .type = MT_DEVICE_NONSHARED
66 void __init r8a7740_map_io(void)
68 iotable_init(r8a7740_io_desc, ARRAY_SIZE(r8a7740_io_desc));
72 static struct resource r8a7740_pfc_resources[] = {
76 .flags = IORESOURCE_MEM,
81 .flags = IORESOURCE_MEM,
85 static struct platform_device r8a7740_pfc_device = {
86 .name = "pfc-r8a7740",
88 .resource = r8a7740_pfc_resources,
89 .num_resources = ARRAY_SIZE(r8a7740_pfc_resources),
92 void __init r8a7740_pinmux_init(void)
94 platform_device_register(&r8a7740_pfc_device);
98 static struct plat_sci_port scif0_platform_data = {
99 .mapbase = 0xe6c40000,
100 .flags = UPF_BOOT_AUTOCONF,
101 .scscr = SCSCR_RE | SCSCR_TE,
102 .scbrr_algo_id = SCBRR_ALGO_4,
104 .irqs = SCIx_IRQ_MUXED(evt2irq(0x0c00)),
107 static struct platform_device scif0_device = {
111 .platform_data = &scif0_platform_data,
116 static struct plat_sci_port scif1_platform_data = {
117 .mapbase = 0xe6c50000,
118 .flags = UPF_BOOT_AUTOCONF,
119 .scscr = SCSCR_RE | SCSCR_TE,
120 .scbrr_algo_id = SCBRR_ALGO_4,
122 .irqs = SCIx_IRQ_MUXED(evt2irq(0x0c20)),
125 static struct platform_device scif1_device = {
129 .platform_data = &scif1_platform_data,
134 static struct plat_sci_port scif2_platform_data = {
135 .mapbase = 0xe6c60000,
136 .flags = UPF_BOOT_AUTOCONF,
137 .scscr = SCSCR_RE | SCSCR_TE,
138 .scbrr_algo_id = SCBRR_ALGO_4,
140 .irqs = SCIx_IRQ_MUXED(evt2irq(0x0c40)),
143 static struct platform_device scif2_device = {
147 .platform_data = &scif2_platform_data,
152 static struct plat_sci_port scif3_platform_data = {
153 .mapbase = 0xe6c70000,
154 .flags = UPF_BOOT_AUTOCONF,
155 .scscr = SCSCR_RE | SCSCR_TE,
156 .scbrr_algo_id = SCBRR_ALGO_4,
158 .irqs = SCIx_IRQ_MUXED(evt2irq(0x0c60)),
161 static struct platform_device scif3_device = {
165 .platform_data = &scif3_platform_data,
170 static struct plat_sci_port scif4_platform_data = {
171 .mapbase = 0xe6c80000,
172 .flags = UPF_BOOT_AUTOCONF,
173 .scscr = SCSCR_RE | SCSCR_TE,
174 .scbrr_algo_id = SCBRR_ALGO_4,
176 .irqs = SCIx_IRQ_MUXED(evt2irq(0x0d20)),
179 static struct platform_device scif4_device = {
183 .platform_data = &scif4_platform_data,
188 static struct plat_sci_port scif5_platform_data = {
189 .mapbase = 0xe6cb0000,
190 .flags = UPF_BOOT_AUTOCONF,
191 .scscr = SCSCR_RE | SCSCR_TE,
192 .scbrr_algo_id = SCBRR_ALGO_4,
194 .irqs = SCIx_IRQ_MUXED(evt2irq(0x0d40)),
197 static struct platform_device scif5_device = {
201 .platform_data = &scif5_platform_data,
206 static struct plat_sci_port scif6_platform_data = {
207 .mapbase = 0xe6cc0000,
208 .flags = UPF_BOOT_AUTOCONF,
209 .scscr = SCSCR_RE | SCSCR_TE,
210 .scbrr_algo_id = SCBRR_ALGO_4,
212 .irqs = SCIx_IRQ_MUXED(evt2irq(0x04c0)),
215 static struct platform_device scif6_device = {
219 .platform_data = &scif6_platform_data,
224 static struct plat_sci_port scif7_platform_data = {
225 .mapbase = 0xe6cd0000,
226 .flags = UPF_BOOT_AUTOCONF,
227 .scscr = SCSCR_RE | SCSCR_TE,
228 .scbrr_algo_id = SCBRR_ALGO_4,
230 .irqs = SCIx_IRQ_MUXED(evt2irq(0x04e0)),
233 static struct platform_device scif7_device = {
237 .platform_data = &scif7_platform_data,
242 static struct plat_sci_port scifb_platform_data = {
243 .mapbase = 0xe6c30000,
244 .flags = UPF_BOOT_AUTOCONF,
245 .scscr = SCSCR_RE | SCSCR_TE,
246 .scbrr_algo_id = SCBRR_ALGO_4,
248 .irqs = SCIx_IRQ_MUXED(evt2irq(0x0d60)),
251 static struct platform_device scifb_device = {
255 .platform_data = &scifb_platform_data,
260 static struct sh_timer_config cmt10_platform_data = {
262 .channel_offset = 0x10,
264 .clockevent_rating = 125,
265 .clocksource_rating = 125,
268 static struct resource cmt10_resources[] = {
273 .flags = IORESOURCE_MEM,
276 .start = evt2irq(0x0b00),
277 .flags = IORESOURCE_IRQ,
281 static struct platform_device cmt10_device = {
285 .platform_data = &cmt10_platform_data,
287 .resource = cmt10_resources,
288 .num_resources = ARRAY_SIZE(cmt10_resources),
292 static struct sh_timer_config tmu00_platform_data = {
294 .channel_offset = 0x4,
296 .clockevent_rating = 200,
299 static struct resource tmu00_resources[] = {
303 .end = 0xfff80014 - 1,
304 .flags = IORESOURCE_MEM,
307 .start = intcs_evt2irq(0xe80),
308 .flags = IORESOURCE_IRQ,
312 static struct platform_device tmu00_device = {
316 .platform_data = &tmu00_platform_data,
318 .resource = tmu00_resources,
319 .num_resources = ARRAY_SIZE(tmu00_resources),
322 static struct sh_timer_config tmu01_platform_data = {
324 .channel_offset = 0x10,
326 .clocksource_rating = 200,
329 static struct resource tmu01_resources[] = {
333 .end = 0xfff80020 - 1,
334 .flags = IORESOURCE_MEM,
337 .start = intcs_evt2irq(0xea0),
338 .flags = IORESOURCE_IRQ,
342 static struct platform_device tmu01_device = {
346 .platform_data = &tmu01_platform_data,
348 .resource = tmu01_resources,
349 .num_resources = ARRAY_SIZE(tmu01_resources),
352 static struct sh_timer_config tmu02_platform_data = {
354 .channel_offset = 0x1C,
356 .clocksource_rating = 200,
359 static struct resource tmu02_resources[] = {
363 .end = 0xfff8002C - 1,
364 .flags = IORESOURCE_MEM,
367 .start = intcs_evt2irq(0xec0),
368 .flags = IORESOURCE_IRQ,
372 static struct platform_device tmu02_device = {
376 .platform_data = &tmu02_platform_data,
378 .resource = tmu02_resources,
379 .num_resources = ARRAY_SIZE(tmu02_resources),
382 /* IPMMUI (an IPMMU module for ICB/LMB) */
383 static struct resource ipmmu_resources[] = {
388 .flags = IORESOURCE_MEM,
392 static const char * const ipmmu_dev_names[] = {
393 "sh_mobile_lcdc_fb.0",
394 "sh_mobile_lcdc_fb.1",
398 static struct shmobile_ipmmu_platform_data ipmmu_platform_data = {
399 .dev_names = ipmmu_dev_names,
400 .num_dev_names = ARRAY_SIZE(ipmmu_dev_names),
403 static struct platform_device ipmmu_device = {
407 .platform_data = &ipmmu_platform_data,
409 .resource = ipmmu_resources,
410 .num_resources = ARRAY_SIZE(ipmmu_resources),
413 static struct platform_device *r8a7740_early_devices[] __initdata = {
431 static const struct sh_dmae_slave_config r8a7740_dmae_slaves[] = {
433 .slave_id = SHDMA_SLAVE_SDHI0_TX,
435 .chcr = CHCR_TX(XMIT_SZ_16BIT),
438 .slave_id = SHDMA_SLAVE_SDHI0_RX,
440 .chcr = CHCR_RX(XMIT_SZ_16BIT),
443 .slave_id = SHDMA_SLAVE_SDHI1_TX,
445 .chcr = CHCR_TX(XMIT_SZ_16BIT),
448 .slave_id = SHDMA_SLAVE_SDHI1_RX,
450 .chcr = CHCR_RX(XMIT_SZ_16BIT),
453 .slave_id = SHDMA_SLAVE_SDHI2_TX,
455 .chcr = CHCR_TX(XMIT_SZ_16BIT),
458 .slave_id = SHDMA_SLAVE_SDHI2_RX,
460 .chcr = CHCR_RX(XMIT_SZ_16BIT),
463 .slave_id = SHDMA_SLAVE_FSIA_TX,
465 .chcr = CHCR_TX(XMIT_SZ_32BIT),
468 .slave_id = SHDMA_SLAVE_FSIA_RX,
470 .chcr = CHCR_RX(XMIT_SZ_32BIT),
473 .slave_id = SHDMA_SLAVE_FSIB_TX,
475 .chcr = CHCR_TX(XMIT_SZ_32BIT),
480 #define DMA_CHANNEL(a, b, c) \
485 .chclr_offset = (0x220 - 0x20) + a \
488 static const struct sh_dmae_channel r8a7740_dmae_channels[] = {
489 DMA_CHANNEL(0x00, 0, 0),
490 DMA_CHANNEL(0x10, 0, 8),
491 DMA_CHANNEL(0x20, 4, 0),
492 DMA_CHANNEL(0x30, 4, 8),
493 DMA_CHANNEL(0x50, 8, 0),
494 DMA_CHANNEL(0x60, 8, 8),
497 static struct sh_dmae_pdata dma_platform_data = {
498 .slave = r8a7740_dmae_slaves,
499 .slave_num = ARRAY_SIZE(r8a7740_dmae_slaves),
500 .channel = r8a7740_dmae_channels,
501 .channel_num = ARRAY_SIZE(r8a7740_dmae_channels),
502 .ts_low_shift = TS_LOW_SHIFT,
503 .ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT,
504 .ts_high_shift = TS_HI_SHIFT,
505 .ts_high_mask = TS_HI_BIT << TS_HI_SHIFT,
506 .ts_shift = dma_ts_shift,
507 .ts_shift_num = ARRAY_SIZE(dma_ts_shift),
508 .dmaor_init = DMAOR_DME,
512 /* Resource order important! */
513 static struct resource r8a7740_dmae0_resources[] = {
515 /* Channel registers and DMAOR */
518 .flags = IORESOURCE_MEM,
524 .flags = IORESOURCE_MEM,
528 .start = evt2irq(0x20c0),
529 .end = evt2irq(0x20c0),
530 .flags = IORESOURCE_IRQ,
533 /* IRQ for channels 0-5 */
534 .start = evt2irq(0x2000),
535 .end = evt2irq(0x20a0),
536 .flags = IORESOURCE_IRQ,
540 /* Resource order important! */
541 static struct resource r8a7740_dmae1_resources[] = {
543 /* Channel registers and DMAOR */
546 .flags = IORESOURCE_MEM,
552 .flags = IORESOURCE_MEM,
556 .start = evt2irq(0x21c0),
557 .end = evt2irq(0x21c0),
558 .flags = IORESOURCE_IRQ,
561 /* IRQ for channels 0-5 */
562 .start = evt2irq(0x2100),
563 .end = evt2irq(0x21a0),
564 .flags = IORESOURCE_IRQ,
568 /* Resource order important! */
569 static struct resource r8a7740_dmae2_resources[] = {
571 /* Channel registers and DMAOR */
574 .flags = IORESOURCE_MEM,
580 .flags = IORESOURCE_MEM,
584 .start = evt2irq(0x22c0),
585 .end = evt2irq(0x22c0),
586 .flags = IORESOURCE_IRQ,
589 /* IRQ for channels 0-5 */
590 .start = evt2irq(0x2200),
591 .end = evt2irq(0x22a0),
592 .flags = IORESOURCE_IRQ,
596 static struct platform_device dma0_device = {
597 .name = "sh-dma-engine",
599 .resource = r8a7740_dmae0_resources,
600 .num_resources = ARRAY_SIZE(r8a7740_dmae0_resources),
602 .platform_data = &dma_platform_data,
606 static struct platform_device dma1_device = {
607 .name = "sh-dma-engine",
609 .resource = r8a7740_dmae1_resources,
610 .num_resources = ARRAY_SIZE(r8a7740_dmae1_resources),
612 .platform_data = &dma_platform_data,
616 static struct platform_device dma2_device = {
617 .name = "sh-dma-engine",
619 .resource = r8a7740_dmae2_resources,
620 .num_resources = ARRAY_SIZE(r8a7740_dmae2_resources),
622 .platform_data = &dma_platform_data,
627 static const struct sh_dmae_channel r8a7740_usb_dma_channels[] = {
635 static const struct sh_dmae_slave_config r8a7740_usb_dma_slaves[] = {
637 .slave_id = SHDMA_SLAVE_USBHS_TX,
638 .chcr = USBTS_INDEX2VAL(USBTS_XMIT_SZ_8BYTE),
640 .slave_id = SHDMA_SLAVE_USBHS_RX,
641 .chcr = USBTS_INDEX2VAL(USBTS_XMIT_SZ_8BYTE),
645 static struct sh_dmae_pdata usb_dma_platform_data = {
646 .slave = r8a7740_usb_dma_slaves,
647 .slave_num = ARRAY_SIZE(r8a7740_usb_dma_slaves),
648 .channel = r8a7740_usb_dma_channels,
649 .channel_num = ARRAY_SIZE(r8a7740_usb_dma_channels),
650 .ts_low_shift = USBTS_LOW_SHIFT,
651 .ts_low_mask = USBTS_LOW_BIT << USBTS_LOW_SHIFT,
652 .ts_high_shift = USBTS_HI_SHIFT,
653 .ts_high_mask = USBTS_HI_BIT << USBTS_HI_SHIFT,
654 .ts_shift = dma_usbts_shift,
655 .ts_shift_num = ARRAY_SIZE(dma_usbts_shift),
656 .dmaor_init = DMAOR_DME,
658 .chcr_ie_bit = 1 << 5,
665 static struct resource r8a7740_usb_dma_resources[] = {
667 /* Channel registers and DMAOR */
669 .end = 0xe68a0064 - 1,
670 .flags = IORESOURCE_MEM,
675 .end = 0xe68a0014 - 1,
676 .flags = IORESOURCE_MEM,
679 /* IRQ for channels */
680 .start = evt2irq(0x0a00),
681 .end = evt2irq(0x0a00),
682 .flags = IORESOURCE_IRQ,
686 static struct platform_device usb_dma_device = {
687 .name = "sh-dma-engine",
689 .resource = r8a7740_usb_dma_resources,
690 .num_resources = ARRAY_SIZE(r8a7740_usb_dma_resources),
692 .platform_data = &usb_dma_platform_data,
697 static struct resource i2c0_resources[] = {
701 .end = 0xfff20425 - 1,
702 .flags = IORESOURCE_MEM,
705 .start = intcs_evt2irq(0xe00),
706 .end = intcs_evt2irq(0xe60),
707 .flags = IORESOURCE_IRQ,
711 static struct resource i2c1_resources[] = {
715 .end = 0xe6c20425 - 1,
716 .flags = IORESOURCE_MEM,
719 .start = evt2irq(0x780), /* IIC1_ALI1 */
720 .end = evt2irq(0x7e0), /* IIC1_DTEI1 */
721 .flags = IORESOURCE_IRQ,
725 static struct platform_device i2c0_device = {
726 .name = "i2c-sh_mobile",
728 .resource = i2c0_resources,
729 .num_resources = ARRAY_SIZE(i2c0_resources),
732 static struct platform_device i2c1_device = {
733 .name = "i2c-sh_mobile",
735 .resource = i2c1_resources,
736 .num_resources = ARRAY_SIZE(i2c1_resources),
739 static struct resource pmu_resources[] = {
741 .start = evt2irq(0x19a0),
742 .end = evt2irq(0x19a0),
743 .flags = IORESOURCE_IRQ,
747 static struct platform_device pmu_device = {
750 .num_resources = ARRAY_SIZE(pmu_resources),
751 .resource = pmu_resources,
754 static struct platform_device *r8a7740_late_devices[] __initdata = {
765 * r8a7740 chip has lasting errata on MERAM buffer.
766 * this is work-around for it.
768 * "Media RAM (MERAM)" on r8a7740 documentation
770 #define MEBUFCNTR 0xFE950098
771 void r8a7740_meram_workaround(void)
775 reg = ioremap_nocache(MEBUFCNTR, 4);
777 iowrite32(0x01600164, reg);
783 #define ICSTART 0x0070
785 #define i2c_read(reg, offset) ioread8(reg + offset)
786 #define i2c_write(reg, offset, data) iowrite8(data, reg + offset)
789 * r8a7740 chip has lasting errata on I2C I/O pad reset.
790 * this is work-around for it.
792 static void r8a7740_i2c_workaround(struct platform_device *pdev)
794 struct resource *res;
797 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
798 if (unlikely(!res)) {
799 pr_err("r8a7740 i2c workaround fail (cannot find resource)\n");
803 reg = ioremap(res->start, resource_size(res));
804 if (unlikely(!reg)) {
805 pr_err("r8a7740 i2c workaround fail (cannot map IO)\n");
809 i2c_write(reg, ICCR, i2c_read(reg, ICCR) | 0x80);
810 i2c_read(reg, ICCR); /* dummy read */
812 i2c_write(reg, ICSTART, i2c_read(reg, ICSTART) | 0x10);
813 i2c_read(reg, ICSTART); /* dummy read */
817 i2c_write(reg, ICCR, 0x01);
818 i2c_write(reg, ICSTART, 0x00);
822 i2c_write(reg, ICCR, 0x10);
824 i2c_write(reg, ICCR, 0x00);
826 i2c_write(reg, ICCR, 0x10);
832 void __init r8a7740_add_standard_devices(void)
834 /* I2C work-around */
835 r8a7740_i2c_workaround(&i2c0_device);
836 r8a7740_i2c_workaround(&i2c1_device);
838 r8a7740_init_pm_domains();
841 platform_add_devices(r8a7740_early_devices,
842 ARRAY_SIZE(r8a7740_early_devices));
843 platform_add_devices(r8a7740_late_devices,
844 ARRAY_SIZE(r8a7740_late_devices));
846 /* add devices to PM domain */
848 rmobile_add_device_to_domain("A3SP", &scif0_device);
849 rmobile_add_device_to_domain("A3SP", &scif1_device);
850 rmobile_add_device_to_domain("A3SP", &scif2_device);
851 rmobile_add_device_to_domain("A3SP", &scif3_device);
852 rmobile_add_device_to_domain("A3SP", &scif4_device);
853 rmobile_add_device_to_domain("A3SP", &scif5_device);
854 rmobile_add_device_to_domain("A3SP", &scif6_device);
855 rmobile_add_device_to_domain("A3SP", &scif7_device);
856 rmobile_add_device_to_domain("A3SP", &scifb_device);
857 rmobile_add_device_to_domain("A3SP", &i2c1_device);
860 void __init r8a7740_add_early_devices(void)
862 early_platform_add_devices(r8a7740_early_devices,
863 ARRAY_SIZE(r8a7740_early_devices));
865 /* setup early console here as well */
866 shmobile_setup_console();
871 void __init r8a7740_add_early_devices_dt(void)
873 shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */
875 early_platform_add_devices(r8a7740_early_devices,
876 ARRAY_SIZE(r8a7740_early_devices));
878 /* setup early console here as well */
879 shmobile_setup_console();
882 static const struct of_dev_auxdata r8a7740_auxdata_lookup[] __initconst = {
886 void __init r8a7740_add_standard_devices_dt(void)
888 /* clocks are setup late during boot in the case of DT */
889 r8a7740_clock_init(0);
891 platform_add_devices(r8a7740_early_devices,
892 ARRAY_SIZE(r8a7740_early_devices));
894 of_platform_populate(NULL, of_default_bus_match_table,
895 r8a7740_auxdata_lookup, NULL);
898 static const char *r8a7740_boards_compat_dt[] __initdata = {
903 DT_MACHINE_START(R8A7740_DT, "Generic R8A7740 (Flattened Device Tree)")
904 .map_io = r8a7740_map_io,
905 .init_early = r8a7740_add_early_devices_dt,
906 .init_irq = r8a7740_init_irq,
907 .handle_irq = shmobile_handle_irq_intc,
908 .init_machine = r8a7740_add_standard_devices_dt,
909 .dt_compat = r8a7740_boards_compat_dt,
912 #endif /* CONFIG_USE_OF */